142 static const unsigned long enabled_socs =
158 static bool
166 static const u32 jz4730_pull_ups[4] = {
170 static const u32 jz4730_pull_downs[4] = {
174 static int jz4730_mmc_1bit_pins[] = { 0x27, 0x26, 0x22, };
175 static int jz4730_mmc_4bit_pins[] = { 0x23, 0x24, 0x25, };
176 static int jz4730_uart0_data_pins[] = { 0x7e, 0x7f, };
177 static int jz4730_uart1_data_pins[] = { 0x18, 0x19, };
178 static int jz4730_uart2_data_pins[] = { 0x6f, 0x7d, };
179 static int jz4730_uart3_data_pins[] = { 0x10, 0x15, };
180 static int jz4730_uart3_hwflow_pins[] = { 0x11, 0x17, };
181 static int jz4730_lcd_8bit_pins[] = {
185 static int jz4730_lcd_16bit_pins[] = {
188 static int jz4730_lcd_special_pins[] = { 0x3d, 0x3c, 0x3e, 0x3f, };
189 static int jz4730_lcd_generic_pins[] = { 0x3b, };
190 static int jz4730_nand_cs1_pins[] = { 0x53, };
191 static int jz4730_nand_cs2_pins[] = { 0x54, };
192 static int jz4730_nand_cs3_pins[] = { 0x55, };
193 static int jz4730_nand_cs4_pins[] = { 0x56, };
194 static int jz4730_nand_cs5_pins[] = { 0x57, };
195 static int jz4730_pwm_pwm0_pins[] = { 0x5e, };
196 static int jz4730_pwm_pwm1_pins[] = { 0x5f, };
198 static u8 jz4730_lcd_8bit_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, };
200 static const struct group_desc jz4730_groups[] = {
221 static const char *jz4730_mmc_groups[] = { "mmc-1bit", "mmc-4bit", };
222 static const char *jz4730_uart0_groups[] = { "uart0-data", };
223 static const char *jz4730_uart1_groups[] = { "uart1-data", };
224 static const char *jz4730_uart2_groups[] = { "uart2-data", };
225 static const char *jz4730_uart3_groups[] = { "uart3-data", "uart3-hwflow", };
226 static const char *jz4730_lcd_groups[] = {
229 static const char *jz4730_nand_groups[] = {
232 static const char *jz4730_pwm0_groups[] = { "pwm0", };
233 static const char *jz4730_pwm1_groups[] = { "pwm1", };
235 static const struct function_desc jz4730_functions[] = {
247 static const struct ingenic_chip_info jz4730_chip_info = {
259 static const u32 jz4740_pull_ups[4] = {
263 static const u32 jz4740_pull_downs[4] = {
267 static int jz4740_mmc_1bit_pins[] = { 0x69, 0x68, 0x6a, };
268 static int jz4740_mmc_4bit_pins[] = { 0x6b, 0x6c, 0x6d, };
269 static int jz4740_uart0_data_pins[] = { 0x7a, 0x79, };
270 static int jz4740_uart0_hwflow_pins[] = { 0x7e, 0x7f, };
271 static int jz4740_uart1_data_pins[] = { 0x7e, 0x7f, };
272 static int jz4740_lcd_8bit_pins[] = {
276 static int jz4740_lcd_16bit_pins[] = {
279 static int jz4740_lcd_18bit_pins[] = { 0x50, 0x51, };
280 static int jz4740_lcd_special_pins[] = { 0x31, 0x32, 0x56, 0x57, };
281 static int jz4740_lcd_generic_pins[] = { 0x55, };
282 static int jz4740_nand_cs1_pins[] = { 0x39, };
283 static int jz4740_nand_cs2_pins[] = { 0x3a, };
284 static int jz4740_nand_cs3_pins[] = { 0x3b, };
285 static int jz4740_nand_cs4_pins[] = { 0x3c, };
286 static int jz4740_nand_fre_fwe_pins[] = { 0x5c, 0x5d, };
287 static int jz4740_pwm_pwm0_pins[] = { 0x77, };
288 static int jz4740_pwm_pwm1_pins[] = { 0x78, };
289 static int jz4740_pwm_pwm2_pins[] = { 0x79, };
290 static int jz4740_pwm_pwm3_pins[] = { 0x7a, };
291 static int jz4740_pwm_pwm4_pins[] = { 0x7b, };
292 static int jz4740_pwm_pwm5_pins[] = { 0x7c, };
293 static int jz4740_pwm_pwm6_pins[] = { 0x7e, };
294 static int jz4740_pwm_pwm7_pins[] = { 0x7f, };
296 static const struct group_desc jz4740_groups[] = {
322 static const char *jz4740_mmc_groups[] = { "mmc-1bit", "mmc-4bit", };
323 static const char *jz4740_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
324 static const char *jz4740_uart1_groups[] = { "uart1-data", };
325 static const char *jz4740_lcd_groups[] = {
328 static const char *jz4740_nand_groups[] = {
331 static const char *jz4740_pwm0_groups[] = { "pwm0", };
332 static const char *jz4740_pwm1_groups[] = { "pwm1", };
333 static const char *jz4740_pwm2_groups[] = { "pwm2", };
334 static const char *jz4740_pwm3_groups[] = { "pwm3", };
335 static const char *jz4740_pwm4_groups[] = { "pwm4", };
336 static const char *jz4740_pwm5_groups[] = { "pwm5", };
337 static const char *jz4740_pwm6_groups[] = { "pwm6", };
338 static const char *jz4740_pwm7_groups[] = { "pwm7", };
340 static const struct function_desc jz4740_functions[] = {
356 static const struct ingenic_chip_info jz4740_chip_info = {
368 static int jz4725b_mmc0_1bit_pins[] = { 0x48, 0x49, 0x5c, };
369 static int jz4725b_mmc0_4bit_pins[] = { 0x5d, 0x5b, 0x56, };
370 static int jz4725b_mmc1_1bit_pins[] = { 0x7a, 0x7b, 0x7c, };
371 static int jz4725b_mmc1_4bit_pins[] = { 0x7d, 0x7e, 0x7f, };
372 static int jz4725b_uart_data_pins[] = { 0x4c, 0x4d, };
373 static int jz4725b_lcd_8bit_pins[] = {
377 static int jz4725b_lcd_16bit_pins[] = {
380 static int jz4725b_lcd_18bit_pins[] = { 0x70, 0x71, };
381 static int jz4725b_lcd_24bit_pins[] = { 0x76, 0x77, 0x78, 0x79, };
382 static int jz4725b_lcd_special_pins[] = { 0x76, 0x77, 0x78, 0x79, };
383 static int jz4725b_lcd_generic_pins[] = { 0x75, };
384 static int jz4725b_nand_cs1_pins[] = { 0x55, };
385 static int jz4725b_nand_cs2_pins[] = { 0x56, };
386 static int jz4725b_nand_cs3_pins[] = { 0x57, };
387 static int jz4725b_nand_cs4_pins[] = { 0x58, };
388 static int jz4725b_nand_cle_ale_pins[] = { 0x48, 0x49 };
389 static int jz4725b_nand_fre_fwe_pins[] = { 0x5c, 0x5d };
390 static int jz4725b_pwm_pwm0_pins[] = { 0x4a, };
391 static int jz4725b_pwm_pwm1_pins[] = { 0x4b, };
392 static int jz4725b_pwm_pwm2_pins[] = { 0x4c, };
393 static int jz4725b_pwm_pwm3_pins[] = { 0x4d, };
394 static int jz4725b_pwm_pwm4_pins[] = { 0x4e, };
395 static int jz4725b_pwm_pwm5_pins[] = { 0x4f, };
397 static u8 jz4725b_mmc0_4bit_funcs[] = { 1, 0, 1, };
399 static const struct group_desc jz4725b_groups[] = {
426 static const char *jz4725b_mmc0_groups[] = { "mmc0-1bit", "mmc0-4bit", };
427 static const char *jz4725b_mmc1_groups[] = { "mmc1-1bit", "mmc1-4bit", };
428 static const char *jz4725b_uart_groups[] = { "uart-data", };
429 static const char *jz4725b_lcd_groups[] = {
433 static const char *jz4725b_nand_groups[] = {
437 static const char *jz4725b_pwm0_groups[] = { "pwm0", };
438 static const char *jz4725b_pwm1_groups[] = { "pwm1", };
439 static const char *jz4725b_pwm2_groups[] = { "pwm2", };
440 static const char *jz4725b_pwm3_groups[] = { "pwm3", };
441 static const char *jz4725b_pwm4_groups[] = { "pwm4", };
442 static const char *jz4725b_pwm5_groups[] = { "pwm5", };
444 static const struct function_desc jz4725b_functions[] = {
458 static const struct ingenic_chip_info jz4725b_chip_info = {
470 static const u32 jz4750_pull_ups[6] = {
474 static const u32 jz4750_pull_downs[6] = {
478 static int jz4750_uart0_data_pins[] = { 0xa4, 0xa5, };
479 static int jz4750_uart0_hwflow_pins[] = { 0xa6, 0xa7, };
480 static int jz4750_uart1_data_pins[] = { 0x90, 0x91, };
481 static int jz4750_uart1_hwflow_pins[] = { 0x92, 0x93, };
482 static int jz4750_uart2_data_pins[] = { 0x9b, 0x9a, };
483 static int jz4750_uart3_data_pins[] = { 0xb0, 0xb1, };
484 static int jz4750_uart3_hwflow_pins[] = { 0xb2, 0xb3, };
485 static int jz4750_mmc0_1bit_pins[] = { 0xa8, 0xa9, 0xa0, };
486 static int jz4750_mmc0_4bit_pins[] = { 0xa1, 0xa2, 0xa3, };
487 static int jz4750_mmc0_8bit_pins[] = { 0xa4, 0xa5, 0xa6, 0xa7, };
488 static int jz4750_mmc1_1bit_pins[] = { 0xae, 0xaf, 0xaa, };
489 static int jz4750_mmc1_4bit_pins[] = { 0xab, 0xac, 0xad, };
490 static int jz4750_i2c_pins[] = { 0x8c, 0x8d, };
491 static int jz4750_cim_pins[] = {
495 static int jz4750_lcd_8bit_pins[] = {
499 static int jz4750_lcd_16bit_pins[] = {
502 static int jz4750_lcd_18bit_pins[] = { 0x70, 0x71, };
503 static int jz4750_lcd_24bit_pins[] = { 0x76, 0x77, 0x78, 0x79, 0xb2, 0xb3, };
504 static int jz4750_lcd_special_pins[] = { 0x76, 0x77, 0x78, 0x79, };
505 static int jz4750_lcd_generic_pins[] = { 0x75, };
506 static int jz4750_nand_cs1_pins[] = { 0x55, };
507 static int jz4750_nand_cs2_pins[] = { 0x56, };
508 static int jz4750_nand_cs3_pins[] = { 0x57, };
509 static int jz4750_nand_cs4_pins[] = { 0x58, };
510 static int jz4750_nand_fre_fwe_pins[] = { 0x5c, 0x5d, };
511 static int jz4750_pwm_pwm0_pins[] = { 0x94, };
512 static int jz4750_pwm_pwm1_pins[] = { 0x95, };
513 static int jz4750_pwm_pwm2_pins[] = { 0x96, };
514 static int jz4750_pwm_pwm3_pins[] = { 0x97, };
515 static int jz4750_pwm_pwm4_pins[] = { 0x98, };
516 static int jz4750_pwm_pwm5_pins[] = { 0x99, };
518 static const struct group_desc jz4750_groups[] = {
552 static const char *jz4750_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
553 static const char *jz4750_uart1_groups[] = { "uart1-data", "uart1-hwflow", };
554 static const char *jz4750_uart2_groups[] = { "uart2-data", };
555 static const char *jz4750_uart3_groups[] = { "uart3-data", "uart3-hwflow", };
556 static const char *jz4750_mmc0_groups[] = {
559 static const char *jz4750_mmc1_groups[] = { "mmc0-1bit", "mmc0-4bit", };
560 static const char *jz4750_i2c_groups[] = { "i2c-data", };
561 static const char *jz4750_cim_groups[] = { "cim-data", };
562 static const char *jz4750_lcd_groups[] = {
566 static const char *jz4750_nand_groups[] = {
569 static const char *jz4750_pwm0_groups[] = { "pwm0", };
570 static const char *jz4750_pwm1_groups[] = { "pwm1", };
571 static const char *jz4750_pwm2_groups[] = { "pwm2", };
572 static const char *jz4750_pwm3_groups[] = { "pwm3", };
573 static const char *jz4750_pwm4_groups[] = { "pwm4", };
574 static const char *jz4750_pwm5_groups[] = { "pwm5", };
576 static const struct function_desc jz4750_functions[] = {
595 static const struct ingenic_chip_info jz4750_chip_info = {
607 static const u32 jz4755_pull_ups[6] = {
611 static const u32 jz4755_pull_downs[6] = {
615 static int jz4755_uart0_data_pins[] = { 0x7c, 0x7d, };
616 static int jz4755_uart0_hwflow_pins[] = { 0x7e, 0x7f, };
617 static int jz4755_uart1_data_pins[] = { 0x97, 0x99, };
618 static int jz4755_uart2_data_pins[] = { 0x9f, };
619 static int jz4755_ssi_dt_b_pins[] = { 0x3b, };
620 static int jz4755_ssi_dt_f_pins[] = { 0xa1, };
621 static int jz4755_ssi_dr_b_pins[] = { 0x3c, };
622 static int jz4755_ssi_dr_f_pins[] = { 0xa2, };
623 static int jz4755_ssi_clk_b_pins[] = { 0x3a, };
624 static int jz4755_ssi_clk_f_pins[] = { 0xa0, };
625 static int jz4755_ssi_gpc_b_pins[] = { 0x3e, };
626 static int jz4755_ssi_gpc_f_pins[] = { 0xa4, };
627 static int jz4755_ssi_ce0_b_pins[] = { 0x3d, };
628 static int jz4755_ssi_ce0_f_pins[] = { 0xa3, };
629 static int jz4755_ssi_ce1_b_pins[] = { 0x3f, };
630 static int jz4755_ssi_ce1_f_pins[] = { 0xa5, };
631 static int jz4755_mmc0_1bit_pins[] = { 0x2f, 0x50, 0x5c, };
632 static int jz4755_mmc0_4bit_pins[] = { 0x5d, 0x5b, 0x51, };
633 static int jz4755_mmc1_1bit_pins[] = { 0x3a, 0x3d, 0x3c, };
634 static int jz4755_mmc1_4bit_pins[] = { 0x3b, 0x3e, 0x3f, };
635 static int jz4755_i2c_pins[] = { 0x8c, 0x8d, };
636 static int jz4755_cim_pins[] = {
640 static int jz4755_lcd_8bit_pins[] = {
644 static int jz4755_lcd_16bit_pins[] = {
647 static int jz4755_lcd_18bit_pins[] = { 0x70, 0x71, };
648 static int jz4755_lcd_24bit_pins[] = { 0x76, 0x77, 0x78, 0x79, 0x7a, 0x7b, };
649 static int jz4755_lcd_special_pins[] = { 0x76, 0x77, 0x78, 0x79, };
650 static int jz4755_lcd_generic_pins[] = { 0x75, };
651 static int jz4755_nand_cs1_pins[] = { 0x55, };
652 static int jz4755_nand_cs2_pins[] = { 0x56, };
653 static int jz4755_nand_cs3_pins[] = { 0x57, };
654 static int jz4755_nand_cs4_pins[] = { 0x58, };
655 static int jz4755_nand_fre_fwe_pins[] = { 0x5c, 0x5d, };
656 static int jz4755_pwm_pwm0_pins[] = { 0x94, };
657 static int jz4755_pwm_pwm1_pins[] = { 0xab, };
658 static int jz4755_pwm_pwm2_pins[] = { 0x96, };
659 static int jz4755_pwm_pwm3_pins[] = { 0x97, };
660 static int jz4755_pwm_pwm4_pins[] = { 0x98, };
661 static int jz4755_pwm_pwm5_pins[] = { 0x99, };
663 static u8 jz4755_mmc0_1bit_funcs[] = { 2, 2, 1, };
664 static u8 jz4755_mmc0_4bit_funcs[] = { 1, 0, 1, };
665 static u8 jz4755_lcd_24bit_funcs[] = { 1, 1, 1, 1, 0, 0, };
667 static const struct group_desc jz4755_groups[] = {
712 static const char *jz4755_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
713 static const char *jz4755_uart1_groups[] = { "uart1-data", };
714 static const char *jz4755_uart2_groups[] = { "uart2-data", };
715 static const char *jz4755_ssi_groups[] = {
723 static const char *jz4755_mmc0_groups[] = { "mmc0-1bit", "mmc0-4bit", };
724 static const char *jz4755_mmc1_groups[] = { "mmc1-1bit", "mmc1-4bit", };
725 static const char *jz4755_i2c_groups[] = { "i2c-data", };
726 static const char *jz4755_cim_groups[] = { "cim-data", };
727 static const char *jz4755_lcd_groups[] = {
731 static const char *jz4755_nand_groups[] = {
734 static const char *jz4755_pwm0_groups[] = { "pwm0", };
735 static const char *jz4755_pwm1_groups[] = { "pwm1", };
736 static const char *jz4755_pwm2_groups[] = { "pwm2", };
737 static const char *jz4755_pwm3_groups[] = { "pwm3", };
738 static const char *jz4755_pwm4_groups[] = { "pwm4", };
739 static const char *jz4755_pwm5_groups[] = { "pwm5", };
741 static const struct function_desc jz4755_functions[] = {
760 static const struct ingenic_chip_info jz4755_chip_info = {
772 static const u32 jz4760_pull_ups[6] = {
776 static const u32 jz4760_pull_downs[6] = {
780 static int jz4760_uart0_data_pins[] = { 0xa0, 0xa3, };
781 static int jz4760_uart0_hwflow_pins[] = { 0xa1, 0xa2, };
782 static int jz4760_uart1_data_pins[] = { 0x7a, 0x7c, };
783 static int jz4760_uart1_hwflow_pins[] = { 0x7b, 0x7d, };
784 static int jz4760_uart2_data_pins[] = { 0x5c, 0x5e, };
785 static int jz4760_uart2_hwflow_pins[] = { 0x5d, 0x5f, };
786 static int jz4760_uart3_data_pins[] = { 0x6c, 0x85, };
787 static int jz4760_uart3_hwflow_pins[] = { 0x88, 0x89, };
788 static int jz4760_ssi0_dt_a_pins[] = { 0x15, };
789 static int jz4760_ssi0_dt_b_pins[] = { 0x35, };
790 static int jz4760_ssi0_dt_d_pins[] = { 0x75, };
791 static int jz4760_ssi0_dt_e_pins[] = { 0x91, };
792 static int jz4760_ssi0_dr_a_pins[] = { 0x14, };
793 static int jz4760_ssi0_dr_b_pins[] = { 0x34, };
794 static int jz4760_ssi0_dr_d_pins[] = { 0x74, };
795 static int jz4760_ssi0_dr_e_pins[] = { 0x8e, };
796 static int jz4760_ssi0_clk_a_pins[] = { 0x12, };
797 static int jz4760_ssi0_clk_b_pins[] = { 0x3c, };
798 static int jz4760_ssi0_clk_d_pins[] = { 0x78, };
799 static int jz4760_ssi0_clk_e_pins[] = { 0x8f, };
800 static int jz4760_ssi0_gpc_b_pins[] = { 0x3e, };
801 static int jz4760_ssi0_gpc_d_pins[] = { 0x76, };
802 static int jz4760_ssi0_gpc_e_pins[] = { 0x93, };
803 static int jz4760_ssi0_ce0_a_pins[] = { 0x13, };
804 static int jz4760_ssi0_ce0_b_pins[] = { 0x3d, };
805 static int jz4760_ssi0_ce0_d_pins[] = { 0x79, };
806 static int jz4760_ssi0_ce0_e_pins[] = { 0x90, };
807 static int jz4760_ssi0_ce1_b_pins[] = { 0x3f, };
808 static int jz4760_ssi0_ce1_d_pins[] = { 0x77, };
809 static int jz4760_ssi0_ce1_e_pins[] = { 0x92, };
810 static int jz4760_ssi1_dt_b_9_pins[] = { 0x29, };
811 static int jz4760_ssi1_dt_b_21_pins[] = { 0x35, };
812 static int jz4760_ssi1_dt_d_12_pins[] = { 0x6c, };
813 static int jz4760_ssi1_dt_d_21_pins[] = { 0x75, };
814 static int jz4760_ssi1_dt_e_pins[] = { 0x91, };
815 static int jz4760_ssi1_dt_f_pins[] = { 0xa3, };
816 static int jz4760_ssi1_dr_b_6_pins[] = { 0x26, };
817 static int jz4760_ssi1_dr_b_20_pins[] = { 0x34, };
818 static int jz4760_ssi1_dr_d_13_pins[] = { 0x6d, };
819 static int jz4760_ssi1_dr_d_20_pins[] = { 0x74, };
820 static int jz4760_ssi1_dr_e_pins[] = { 0x8e, };
821 static int jz4760_ssi1_dr_f_pins[] = { 0xa0, };
822 static int jz4760_ssi1_clk_b_7_pins[] = { 0x27, };
823 static int jz4760_ssi1_clk_b_28_pins[] = { 0x3c, };
824 static int jz4760_ssi1_clk_d_pins[] = { 0x78, };
825 static int jz4760_ssi1_clk_e_7_pins[] = { 0x87, };
826 static int jz4760_ssi1_clk_e_15_pins[] = { 0x8f, };
827 static int jz4760_ssi1_clk_f_pins[] = { 0xa2, };
828 static int jz4760_ssi1_gpc_b_pins[] = { 0x3e, };
829 static int jz4760_ssi1_gpc_d_pins[] = { 0x76, };
830 static int jz4760_ssi1_gpc_e_pins[] = { 0x93, };
831 static int jz4760_ssi1_ce0_b_8_pins[] = { 0x28, };
832 static int jz4760_ssi1_ce0_b_29_pins[] = { 0x3d, };
833 static int jz4760_ssi1_ce0_d_pins[] = { 0x79, };
834 static int jz4760_ssi1_ce0_e_6_pins[] = { 0x86, };
835 static int jz4760_ssi1_ce0_e_16_pins[] = { 0x90, };
836 static int jz4760_ssi1_ce0_f_pins[] = { 0xa1, };
837 static int jz4760_ssi1_ce1_b_pins[] = { 0x3f, };
838 static int jz4760_ssi1_ce1_d_pins[] = { 0x77, };
839 static int jz4760_ssi1_ce1_e_pins[] = { 0x92, };
840 static int jz4760_mmc0_1bit_a_pins[] = { 0x12, 0x13, 0x14, };
841 static int jz4760_mmc0_4bit_a_pins[] = { 0x15, 0x16, 0x17, };
842 static int jz4760_mmc0_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
843 static int jz4760_mmc0_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
844 static int jz4760_mmc0_8bit_e_pins[] = { 0x98, 0x99, 0x9a, 0x9b, };
845 static int jz4760_mmc1_1bit_d_pins[] = { 0x78, 0x79, 0x74, };
846 static int jz4760_mmc1_4bit_d_pins[] = { 0x75, 0x76, 0x77, };
847 static int jz4760_mmc1_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
848 static int jz4760_mmc1_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
849 static int jz4760_mmc1_8bit_e_pins[] = { 0x98, 0x99, 0x9a, 0x9b, };
850 static int jz4760_mmc2_1bit_b_pins[] = { 0x3c, 0x3d, 0x34, };
851 static int jz4760_mmc2_4bit_b_pins[] = { 0x35, 0x3e, 0x3f, };
852 static int jz4760_mmc2_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
853 static int jz4760_mmc2_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
854 static int jz4760_mmc2_8bit_e_pins[] = { 0x98, 0x99, 0x9a, 0x9b, };
855 static int jz4760_nemc_8bit_data_pins[] = {
858 static int jz4760_nemc_16bit_data_pins[] = {
861 static int jz4760_nemc_cle_ale_pins[] = { 0x20, 0x21, };
862 static int jz4760_nemc_addr_pins[] = { 0x22, 0x23, 0x24, 0x25, };
863 static int jz4760_nemc_rd_we_pins[] = { 0x10, 0x11, };
864 static int jz4760_nemc_frd_fwe_pins[] = { 0x12, 0x13, };
865 static int jz4760_nemc_wait_pins[] = { 0x1b, };
866 static int jz4760_nemc_cs1_pins[] = { 0x15, };
867 static int jz4760_nemc_cs2_pins[] = { 0x16, };
868 static int jz4760_nemc_cs3_pins[] = { 0x17, };
869 static int jz4760_nemc_cs4_pins[] = { 0x18, };
870 static int jz4760_nemc_cs5_pins[] = { 0x19, };
871 static int jz4760_nemc_cs6_pins[] = { 0x1a, };
872 static int jz4760_i2c0_pins[] = { 0x7e, 0x7f, };
873 static int jz4760_i2c1_pins[] = { 0x9e, 0x9f, };
874 static int jz4760_cim_pins[] = {
878 static int jz4760_lcd_8bit_pins[] = {
882 static int jz4760_lcd_16bit_pins[] = {
885 static int jz4760_lcd_18bit_pins[] = {
888 static int jz4760_lcd_24bit_pins[] = {
891 static int jz4760_lcd_special_pins[] = { 0x54, 0x4a, 0x41, 0x40, };
892 static int jz4760_lcd_generic_pins[] = { 0x49, };
893 static int jz4760_pwm_pwm0_pins[] = { 0x80, };
894 static int jz4760_pwm_pwm1_pins[] = { 0x81, };
895 static int jz4760_pwm_pwm2_pins[] = { 0x82, };
896 static int jz4760_pwm_pwm3_pins[] = { 0x83, };
897 static int jz4760_pwm_pwm4_pins[] = { 0x84, };
898 static int jz4760_pwm_pwm5_pins[] = { 0x85, };
899 static int jz4760_pwm_pwm6_pins[] = { 0x6a, };
900 static int jz4760_pwm_pwm7_pins[] = { 0x6b, };
901 static int jz4760_otg_pins[] = { 0x8a, };
903 static u8 jz4760_uart3_data_funcs[] = { 0, 1, };
904 static u8 jz4760_mmc0_1bit_a_funcs[] = { 1, 1, 0, };
906 static const struct group_desc jz4760_groups[] = {
1017 static const char *jz4760_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
1018 static const char *jz4760_uart1_groups[] = { "uart1-data", "uart1-hwflow", };
1019 static const char *jz4760_uart2_groups[] = { "uart2-data", "uart2-hwflow", };
1020 static const char *jz4760_uart3_groups[] = { "uart3-data", "uart3-hwflow", };
1021 static const char *jz4760_ssi0_groups[] = {
1029 static const char *jz4760_ssi1_groups[] = {
1037 static const char *jz4760_mmc0_groups[] = {
1041 static const char *jz4760_mmc1_groups[] = {
1045 static const char *jz4760_mmc2_groups[] = {
1049 static const char *jz4760_nemc_groups[] = {
1053 static const char *jz4760_cs1_groups[] = { "nemc-cs1", };
1054 static const char *jz4760_cs2_groups[] = { "nemc-cs2", };
1055 static const char *jz4760_cs3_groups[] = { "nemc-cs3", };
1056 static const char *jz4760_cs4_groups[] = { "nemc-cs4", };
1057 static const char *jz4760_cs5_groups[] = { "nemc-cs5", };
1058 static const char *jz4760_cs6_groups[] = { "nemc-cs6", };
1059 static const char *jz4760_i2c0_groups[] = { "i2c0-data", };
1060 static const char *jz4760_i2c1_groups[] = { "i2c1-data", };
1061 static const char *jz4760_cim_groups[] = { "cim-data", };
1062 static const char *jz4760_lcd_groups[] = {
1066 static const char *jz4760_pwm0_groups[] = { "pwm0", };
1067 static const char *jz4760_pwm1_groups[] = { "pwm1", };
1068 static const char *jz4760_pwm2_groups[] = { "pwm2", };
1069 static const char *jz4760_pwm3_groups[] = { "pwm3", };
1070 static const char *jz4760_pwm4_groups[] = { "pwm4", };
1071 static const char *jz4760_pwm5_groups[] = { "pwm5", };
1072 static const char *jz4760_pwm6_groups[] = { "pwm6", };
1073 static const char *jz4760_pwm7_groups[] = { "pwm7", };
1074 static const char *jz4760_otg_groups[] = { "otg-vbus", };
1076 static const struct function_desc jz4760_functions[] = {
1108 static const struct ingenic_chip_info jz4760_chip_info = {
1120 static const u32 jz4770_pull_ups[6] = {
1124 static const u32 jz4770_pull_downs[6] = {
1128 static int jz4770_uart0_data_pins[] = { 0xa0, 0xa3, };
1129 static int jz4770_uart0_hwflow_pins[] = { 0xa1, 0xa2, };
1130 static int jz4770_uart1_data_pins[] = { 0x7a, 0x7c, };
1131 static int jz4770_uart1_hwflow_pins[] = { 0x7b, 0x7d, };
1132 static int jz4770_uart2_data_pins[] = { 0x5c, 0x5e, };
1133 static int jz4770_uart2_hwflow_pins[] = { 0x5d, 0x5f, };
1134 static int jz4770_uart3_data_pins[] = { 0x6c, 0x85, };
1135 static int jz4770_uart3_hwflow_pins[] = { 0x88, 0x89, };
1136 static int jz4770_ssi0_dt_a_pins[] = { 0x15, };
1137 static int jz4770_ssi0_dt_b_pins[] = { 0x35, };
1138 static int jz4770_ssi0_dt_d_pins[] = { 0x75, };
1139 static int jz4770_ssi0_dt_e_pins[] = { 0x91, };
1140 static int jz4770_ssi0_dr_a_pins[] = { 0x14, };
1141 static int jz4770_ssi0_dr_b_pins[] = { 0x34, };
1142 static int jz4770_ssi0_dr_d_pins[] = { 0x74, };
1143 static int jz4770_ssi0_dr_e_pins[] = { 0x8e, };
1144 static int jz4770_ssi0_clk_a_pins[] = { 0x12, };
1145 static int jz4770_ssi0_clk_b_pins[] = { 0x3c, };
1146 static int jz4770_ssi0_clk_d_pins[] = { 0x78, };
1147 static int jz4770_ssi0_clk_e_pins[] = { 0x8f, };
1148 static int jz4770_ssi0_gpc_b_pins[] = { 0x3e, };
1149 static int jz4770_ssi0_gpc_d_pins[] = { 0x76, };
1150 static int jz4770_ssi0_gpc_e_pins[] = { 0x93, };
1151 static int jz4770_ssi0_ce0_a_pins[] = { 0x13, };
1152 static int jz4770_ssi0_ce0_b_pins[] = { 0x3d, };
1153 static int jz4770_ssi0_ce0_d_pins[] = { 0x79, };
1154 static int jz4770_ssi0_ce0_e_pins[] = { 0x90, };
1155 static int jz4770_ssi0_ce1_b_pins[] = { 0x3f, };
1156 static int jz4770_ssi0_ce1_d_pins[] = { 0x77, };
1157 static int jz4770_ssi0_ce1_e_pins[] = { 0x92, };
1158 static int jz4770_ssi1_dt_b_pins[] = { 0x35, };
1159 static int jz4770_ssi1_dt_d_pins[] = { 0x75, };
1160 static int jz4770_ssi1_dt_e_pins[] = { 0x91, };
1161 static int jz4770_ssi1_dr_b_pins[] = { 0x34, };
1162 static int jz4770_ssi1_dr_d_pins[] = { 0x74, };
1163 static int jz4770_ssi1_dr_e_pins[] = { 0x8e, };
1164 static int jz4770_ssi1_clk_b_pins[] = { 0x3c, };
1165 static int jz4770_ssi1_clk_d_pins[] = { 0x78, };
1166 static int jz4770_ssi1_clk_e_pins[] = { 0x8f, };
1167 static int jz4770_ssi1_gpc_b_pins[] = { 0x3e, };
1168 static int jz4770_ssi1_gpc_d_pins[] = { 0x76, };
1169 static int jz4770_ssi1_gpc_e_pins[] = { 0x93, };
1170 static int jz4770_ssi1_ce0_b_pins[] = { 0x3d, };
1171 static int jz4770_ssi1_ce0_d_pins[] = { 0x79, };
1172 static int jz4770_ssi1_ce0_e_pins[] = { 0x90, };
1173 static int jz4770_ssi1_ce1_b_pins[] = { 0x3f, };
1174 static int jz4770_ssi1_ce1_d_pins[] = { 0x77, };
1175 static int jz4770_ssi1_ce1_e_pins[] = { 0x92, };
1176 static int jz4770_mmc0_1bit_a_pins[] = { 0x12, 0x13, 0x14, };
1177 static int jz4770_mmc0_4bit_a_pins[] = { 0x15, 0x16, 0x17, };
1178 static int jz4770_mmc0_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
1179 static int jz4770_mmc0_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
1180 static int jz4770_mmc0_8bit_e_pins[] = { 0x98, 0x99, 0x9a, 0x9b, };
1181 static int jz4770_mmc1_1bit_d_pins[] = { 0x78, 0x79, 0x74, };
1182 static int jz4770_mmc1_4bit_d_pins[] = { 0x75, 0x76, 0x77, };
1183 static int jz4770_mmc1_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
1184 static int jz4770_mmc1_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
1185 static int jz4770_mmc1_8bit_e_pins[] = { 0x98, 0x99, 0x9a, 0x9b, };
1186 static int jz4770_mmc2_1bit_b_pins[] = { 0x3c, 0x3d, 0x34, };
1187 static int jz4770_mmc2_4bit_b_pins[] = { 0x35, 0x3e, 0x3f, };
1188 static int jz4770_mmc2_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
1189 static int jz4770_mmc2_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
1190 static int jz4770_mmc2_8bit_e_pins[] = { 0x98, 0x99, 0x9a, 0x9b, };
1191 static int jz4770_nemc_8bit_data_pins[] = {
1194 static int jz4770_nemc_16bit_data_pins[] = {
1197 static int jz4770_nemc_cle_ale_pins[] = { 0x20, 0x21, };
1198 static int jz4770_nemc_addr_pins[] = { 0x22, 0x23, 0x24, 0x25, };
1199 static int jz4770_nemc_rd_we_pins[] = { 0x10, 0x11, };
1200 static int jz4770_nemc_frd_fwe_pins[] = { 0x12, 0x13, };
1201 static int jz4770_nemc_wait_pins[] = { 0x1b, };
1202 static int jz4770_nemc_cs1_pins[] = { 0x15, };
1203 static int jz4770_nemc_cs2_pins[] = { 0x16, };
1204 static int jz4770_nemc_cs3_pins[] = { 0x17, };
1205 static int jz4770_nemc_cs4_pins[] = { 0x18, };
1206 static int jz4770_nemc_cs5_pins[] = { 0x19, };
1207 static int jz4770_nemc_cs6_pins[] = { 0x1a, };
1208 static int jz4770_i2c0_pins[] = { 0x7e, 0x7f, };
1209 static int jz4770_i2c1_pins[] = { 0x9e, 0x9f, };
1210 static int jz4770_i2c2_pins[] = { 0xb0, 0xb1, };
1211 static int jz4770_cim_8bit_pins[] = {
1215 static int jz4770_cim_12bit_pins[] = {
1218 static int jz4770_lcd_8bit_pins[] = {
1222 static int jz4770_lcd_16bit_pins[] = {
1225 static int jz4770_lcd_18bit_pins[] = {
1228 static int jz4770_lcd_24bit_pins[] = {
1234 static int jz4770_lcd_special_pins[] = { 0x54, 0x4a, 0x41, 0x40, };
1235 static int jz4770_lcd_generic_pins[] = { 0x49, };
1236 static int jz4770_pwm_pwm0_pins[] = { 0x80, };
1237 static int jz4770_pwm_pwm1_pins[] = { 0x81, };
1238 static int jz4770_pwm_pwm2_pins[] = { 0x82, };
1239 static int jz4770_pwm_pwm3_pins[] = { 0x83, };
1240 static int jz4770_pwm_pwm4_pins[] = { 0x84, };
1241 static int jz4770_pwm_pwm5_pins[] = { 0x85, };
1242 static int jz4770_pwm_pwm6_pins[] = { 0x6a, };
1243 static int jz4770_pwm_pwm7_pins[] = { 0x6b, };
1244 static int jz4770_mac_rmii_pins[] = {
1247 static int jz4770_mac_mii_pins[] = {
1251 static const struct group_desc jz4770_groups[] = {
1354 static const char *jz4770_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
1355 static const char *jz4770_uart1_groups[] = { "uart1-data", "uart1-hwflow", };
1356 static const char *jz4770_uart2_groups[] = { "uart2-data", "uart2-hwflow", };
1357 static const char *jz4770_uart3_groups[] = { "uart3-data", "uart3-hwflow", };
1358 static const char *jz4770_ssi0_groups[] = {
1366 static const char *jz4770_ssi1_groups[] = {
1374 static const char *jz4770_mmc0_groups[] = {
1378 static const char *jz4770_mmc1_groups[] = {
1382 static const char *jz4770_mmc2_groups[] = {
1386 static const char *jz4770_nemc_groups[] = {
1390 static const char *jz4770_cs1_groups[] = { "nemc-cs1", };
1391 static const char *jz4770_cs2_groups[] = { "nemc-cs2", };
1392 static const char *jz4770_cs3_groups[] = { "nemc-cs3", };
1393 static const char *jz4770_cs4_groups[] = { "nemc-cs4", };
1394 static const char *jz4770_cs5_groups[] = { "nemc-cs5", };
1395 static const char *jz4770_cs6_groups[] = { "nemc-cs6", };
1396 static const char *jz4770_i2c0_groups[] = { "i2c0-data", };
1397 static const char *jz4770_i2c1_groups[] = { "i2c1-data", };
1398 static const char *jz4770_i2c2_groups[] = { "i2c2-data", };
1399 static const char *jz4770_cim_groups[] = { "cim-data-8bit", "cim-data-12bit", };
1400 static const char *jz4770_lcd_groups[] = {
1404 static const char *jz4770_pwm0_groups[] = { "pwm0", };
1405 static const char *jz4770_pwm1_groups[] = { "pwm1", };
1406 static const char *jz4770_pwm2_groups[] = { "pwm2", };
1407 static const char *jz4770_pwm3_groups[] = { "pwm3", };
1408 static const char *jz4770_pwm4_groups[] = { "pwm4", };
1409 static const char *jz4770_pwm5_groups[] = { "pwm5", };
1410 static const char *jz4770_pwm6_groups[] = { "pwm6", };
1411 static const char *jz4770_pwm7_groups[] = { "pwm7", };
1412 static const char *jz4770_mac_groups[] = { "mac-rmii", "mac-mii", };
1414 static const struct function_desc jz4770_functions[] = {
1448 static const struct ingenic_chip_info jz4770_chip_info = {
1460 static const u32 jz4775_pull_ups[7] = {
1464 static const u32 jz4775_pull_downs[7] = {
1468 static int jz4775_uart0_data_pins[] = { 0xa0, 0xa3, };
1469 static int jz4775_uart0_hwflow_pins[] = { 0xa1, 0xa2, };
1470 static int jz4775_uart1_data_pins[] = { 0x7a, 0x7c, };
1471 static int jz4775_uart1_hwflow_pins[] = { 0x7b, 0x7d, };
1472 static int jz4775_uart2_data_c_pins[] = { 0x54, 0x4a, };
1473 static int jz4775_uart2_data_f_pins[] = { 0xa5, 0xa4, };
1474 static int jz4775_uart3_data_pins[] = { 0x1e, 0x1f, };
1475 static int jz4775_ssi_dt_a_pins[] = { 0x13, };
1476 static int jz4775_ssi_dt_d_pins[] = { 0x75, };
1477 static int jz4775_ssi_dr_a_pins[] = { 0x14, };
1478 static int jz4775_ssi_dr_d_pins[] = { 0x74, };
1479 static int jz4775_ssi_clk_a_pins[] = { 0x12, };
1480 static int jz4775_ssi_clk_d_pins[] = { 0x78, };
1481 static int jz4775_ssi_gpc_pins[] = { 0x76, };
1482 static int jz4775_ssi_ce0_a_pins[] = { 0x17, };
1483 static int jz4775_ssi_ce0_d_pins[] = { 0x79, };
1484 static int jz4775_ssi_ce1_pins[] = { 0x77, };
1485 static int jz4775_mmc0_1bit_a_pins[] = { 0x12, 0x13, 0x14, };
1486 static int jz4775_mmc0_4bit_a_pins[] = { 0x15, 0x16, 0x17, };
1487 static int jz4775_mmc0_8bit_a_pins[] = { 0x04, 0x05, 0x06, 0x07, };
1488 static int jz4775_mmc0_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
1489 static int jz4775_mmc0_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
1490 static int jz4775_mmc1_1bit_d_pins[] = { 0x78, 0x79, 0x74, };
1491 static int jz4775_mmc1_4bit_d_pins[] = { 0x75, 0x76, 0x77, };
1492 static int jz4775_mmc1_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
1493 static int jz4775_mmc1_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
1494 static int jz4775_mmc2_1bit_b_pins[] = { 0x3c, 0x3d, 0x34, };
1495 static int jz4775_mmc2_4bit_b_pins[] = { 0x35, 0x3e, 0x3f, };
1496 static int jz4775_mmc2_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
1497 static int jz4775_mmc2_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
1498 static int jz4775_nemc_8bit_data_pins[] = {
1501 static int jz4775_nemc_16bit_data_pins[] = {
1504 static int jz4775_nemc_cle_ale_pins[] = { 0x20, 0x21, };
1505 static int jz4775_nemc_addr_pins[] = { 0x22, 0x23, 0x24, 0x25, };
1506 static int jz4775_nemc_rd_we_pins[] = { 0x10, 0x11, };
1507 static int jz4775_nemc_frd_fwe_pins[] = { 0x12, 0x13, };
1508 static int jz4775_nemc_wait_pins[] = { 0x1b, };
1509 static int jz4775_nemc_cs1_pins[] = { 0x15, };
1510 static int jz4775_nemc_cs2_pins[] = { 0x16, };
1511 static int jz4775_nemc_cs3_pins[] = { 0x17, };
1512 static int jz4775_i2c0_pins[] = { 0x7e, 0x7f, };
1513 static int jz4775_i2c1_pins[] = { 0x9e, 0x9f, };
1514 static int jz4775_i2c2_pins[] = { 0x80, 0x83, };
1515 static int jz4775_i2s_data_tx_pins[] = { 0xa3, };
1516 static int jz4775_i2s_data_rx_pins[] = { 0xa2, };
1517 static int jz4775_i2s_clk_txrx_pins[] = { 0xa0, 0xa1, };
1518 static int jz4775_i2s_sysclk_pins[] = { 0x83, };
1519 static int jz4775_dmic_pins[] = { 0xaa, 0xab, };
1520 static int jz4775_cim_pins[] = {
1524 static int jz4775_lcd_8bit_pins[] = {
1528 static int jz4775_lcd_16bit_pins[] = {
1531 static int jz4775_lcd_18bit_pins[] = {
1534 static int jz4775_lcd_24bit_pins[] = {
1537 static int jz4775_lcd_special_pins[] = { 0x54, 0x4a, 0x41, 0x40, };
1538 static int jz4775_lcd_generic_pins[] = { 0x49, };
1539 static int jz4775_pwm_pwm0_pins[] = { 0x80, };
1540 static int jz4775_pwm_pwm1_pins[] = { 0x81, };
1541 static int jz4775_pwm_pwm2_pins[] = { 0x82, };
1542 static int jz4775_pwm_pwm3_pins[] = { 0x83, };
1543 static int jz4775_mac_rmii_pins[] = {
1546 static int jz4775_mac_mii_pins[] = {
1549 static int jz4775_mac_rgmii_pins[] = {
1553 static int jz4775_mac_gmii_pins[] = {
1557 static int jz4775_otg_pins[] = { 0x8a, };
1559 static u8 jz4775_uart3_data_funcs[] = { 0, 1, };
1560 static u8 jz4775_mac_mii_funcs[] = { 1, 1, 1, 1, 0, 1, 0, };
1561 static u8 jz4775_mac_rgmii_funcs[] = {
1565 static u8 jz4775_mac_gmii_funcs[] = {
1570 static const struct group_desc jz4775_groups[] = {
1641 static const char *jz4775_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
1642 static const char *jz4775_uart1_groups[] = { "uart1-data", "uart1-hwflow", };
1643 static const char *jz4775_uart2_groups[] = { "uart2-data-c", "uart2-data-f", };
1644 static const char *jz4775_uart3_groups[] = { "uart3-data", };
1645 static const char *jz4775_ssi_groups[] = {
1653 static const char *jz4775_mmc0_groups[] = {
1657 static const char *jz4775_mmc1_groups[] = {
1661 static const char *jz4775_mmc2_groups[] = {
1665 static const char *jz4775_nemc_groups[] = {
1669 static const char *jz4775_cs1_groups[] = { "nemc-cs1", };
1670 static const char *jz4775_cs2_groups[] = { "nemc-cs2", };
1671 static const char *jz4775_cs3_groups[] = { "nemc-cs3", };
1672 static const char *jz4775_i2c0_groups[] = { "i2c0-data", };
1673 static const char *jz4775_i2c1_groups[] = { "i2c1-data", };
1674 static const char *jz4775_i2c2_groups[] = { "i2c2-data", };
1675 static const char *jz4775_i2s_groups[] = {
1678 static const char *jz4775_dmic_groups[] = { "dmic", };
1679 static const char *jz4775_cim_groups[] = { "cim-data", };
1680 static const char *jz4775_lcd_groups[] = {
1684 static const char *jz4775_pwm0_groups[] = { "pwm0", };
1685 static const char *jz4775_pwm1_groups[] = { "pwm1", };
1686 static const char *jz4775_pwm2_groups[] = { "pwm2", };
1687 static const char *jz4775_pwm3_groups[] = { "pwm3", };
1688 static const char *jz4775_mac_groups[] = {
1691 static const char *jz4775_otg_groups[] = { "otg-vbus", };
1693 static const struct function_desc jz4775_functions[] = {
1721 static const struct ingenic_chip_info jz4775_chip_info = {
1733 static const u32 jz4780_pull_ups[6] = {
1737 static const u32 jz4780_pull_downs[6] = {
1741 static int jz4780_uart2_data_pins[] = { 0x66, 0x67, };
1742 static int jz4780_uart2_hwflow_pins[] = { 0x65, 0x64, };
1743 static int jz4780_uart4_data_pins[] = { 0x54, 0x4a, };
1744 static int jz4780_ssi0_dt_a_19_pins[] = { 0x13, };
1745 static int jz4780_ssi0_dt_a_21_pins[] = { 0x15, };
1746 static int jz4780_ssi0_dt_a_28_pins[] = { 0x1c, };
1747 static int jz4780_ssi0_dt_b_pins[] = { 0x3d, };
1748 static int jz4780_ssi0_dt_d_pins[] = { 0x79, };
1749 static int jz4780_ssi0_dr_a_20_pins[] = { 0x14, };
1750 static int jz4780_ssi0_dr_a_27_pins[] = { 0x1b, };
1751 static int jz4780_ssi0_dr_b_pins[] = { 0x34, };
1752 static int jz4780_ssi0_dr_d_pins[] = { 0x74, };
1753 static int jz4780_ssi0_clk_a_pins[] = { 0x12, };
1754 static int jz4780_ssi0_clk_b_5_pins[] = { 0x25, };
1755 static int jz4780_ssi0_clk_b_28_pins[] = { 0x3c, };
1756 static int jz4780_ssi0_clk_d_pins[] = { 0x78, };
1757 static int jz4780_ssi0_gpc_b_pins[] = { 0x3e, };
1758 static int jz4780_ssi0_gpc_d_pins[] = { 0x76, };
1759 static int jz4780_ssi0_ce0_a_23_pins[] = { 0x17, };
1760 static int jz4780_ssi0_ce0_a_25_pins[] = { 0x19, };
1761 static int jz4780_ssi0_ce0_b_pins[] = { 0x3f, };
1762 static int jz4780_ssi0_ce0_d_pins[] = { 0x77, };
1763 static int jz4780_ssi0_ce1_b_pins[] = { 0x35, };
1764 static int jz4780_ssi0_ce1_d_pins[] = { 0x75, };
1765 static int jz4780_ssi1_dt_b_pins[] = { 0x3d, };
1766 static int jz4780_ssi1_dt_d_pins[] = { 0x79, };
1767 static int jz4780_ssi1_dr_b_pins[] = { 0x34, };
1768 static int jz4780_ssi1_dr_d_pins[] = { 0x74, };
1769 static int jz4780_ssi1_clk_b_pins[] = { 0x3c, };
1770 static int jz4780_ssi1_clk_d_pins[] = { 0x78, };
1771 static int jz4780_ssi1_gpc_b_pins[] = { 0x3e, };
1772 static int jz4780_ssi1_gpc_d_pins[] = { 0x76, };
1773 static int jz4780_ssi1_ce0_b_pins[] = { 0x3f, };
1774 static int jz4780_ssi1_ce0_d_pins[] = { 0x77, };
1775 static int jz4780_ssi1_ce1_b_pins[] = { 0x35, };
1776 static int jz4780_ssi1_ce1_d_pins[] = { 0x75, };
1777 static int jz4780_mmc0_8bit_a_pins[] = { 0x04, 0x05, 0x06, 0x07, 0x18, };
1778 static int jz4780_i2c3_pins[] = { 0x6a, 0x6b, };
1779 static int jz4780_i2c4_e_pins[] = { 0x8c, 0x8d, };
1780 static int jz4780_i2c4_f_pins[] = { 0xb9, 0xb8, };
1781 static int jz4780_i2s_data_tx_pins[] = { 0x87, };
1782 static int jz4780_i2s_data_rx_pins[] = { 0x86, };
1783 static int jz4780_i2s_clk_txrx_pins[] = { 0x6c, 0x6d, };
1784 static int jz4780_i2s_clk_rx_pins[] = { 0x88, 0x89, };
1785 static int jz4780_i2s_sysclk_pins[] = { 0x85, };
1786 static int jz4780_dmic_pins[] = { 0x32, 0x33, };
1787 static int jz4780_hdmi_ddc_pins[] = { 0xb9, 0xb8, };
1789 static u8 jz4780_i2s_clk_txrx_funcs[] = { 1, 0, };
1791 static const struct group_desc jz4780_groups[] = {
1905 static const char *jz4780_uart2_groups[] = { "uart2-data", "uart2-hwflow", };
1906 static const char *jz4780_uart4_groups[] = { "uart4-data", };
1907 static const char *jz4780_ssi0_groups[] = {
1915 static const char *jz4780_ssi1_groups[] = {
1923 static const char *jz4780_mmc0_groups[] = {
1927 static const char *jz4780_mmc1_groups[] = {
1930 static const char *jz4780_mmc2_groups[] = {
1933 static const char *jz4780_nemc_groups[] = {
1937 static const char *jz4780_i2c3_groups[] = { "i2c3-data", };
1938 static const char *jz4780_i2c4_groups[] = { "i2c4-data-e", "i2c4-data-f", };
1939 static const char *jz4780_i2s_groups[] = {
1942 static const char *jz4780_dmic_groups[] = { "dmic", };
1943 static const char *jz4780_cim_groups[] = { "cim-data", };
1944 static const char *jz4780_hdmi_ddc_groups[] = { "hdmi-ddc", };
1946 static const struct function_desc jz4780_functions[] = {
1985 static const struct ingenic_chip_info jz4780_chip_info = {
1997 static const u32 x1000_pull_ups[4] = {
2001 static const u32 x1000_pull_downs[4] = {
2005 static int x1000_uart0_data_pins[] = { 0x4a, 0x4b, };
2006 static int x1000_uart0_hwflow_pins[] = { 0x4c, 0x4d, };
2007 static int x1000_uart1_data_a_pins[] = { 0x04, 0x05, };
2008 static int x1000_uart1_data_d_pins[] = { 0x62, 0x63, };
2009 static int x1000_uart1_hwflow_pins[] = { 0x64, 0x65, };
2010 static int x1000_uart2_data_a_pins[] = { 0x02, 0x03, };
2011 static int x1000_uart2_data_d_pins[] = { 0x65, 0x64, };
2012 static int x1000_sfc_data_pins[] = { 0x1d, 0x1c, 0x1e, 0x1f, };
2013 static int x1000_sfc_clk_pins[] = { 0x1a, };
2014 static int x1000_sfc_ce_pins[] = { 0x1b, };
2015 static int x1000_ssi_dt_a_22_pins[] = { 0x16, };
2016 static int x1000_ssi_dt_a_29_pins[] = { 0x1d, };
2017 static int x1000_ssi_dt_d_pins[] = { 0x62, };
2018 static int x1000_ssi_dr_a_23_pins[] = { 0x17, };
2019 static int x1000_ssi_dr_a_28_pins[] = { 0x1c, };
2020 static int x1000_ssi_dr_d_pins[] = { 0x63, };
2021 static int x1000_ssi_clk_a_24_pins[] = { 0x18, };
2022 static int x1000_ssi_clk_a_26_pins[] = { 0x1a, };
2023 static int x1000_ssi_clk_d_pins[] = { 0x60, };
2024 static int x1000_ssi_gpc_a_20_pins[] = { 0x14, };
2025 static int x1000_ssi_gpc_a_31_pins[] = { 0x1f, };
2026 static int x1000_ssi_ce0_a_25_pins[] = { 0x19, };
2027 static int x1000_ssi_ce0_a_27_pins[] = { 0x1b, };
2028 static int x1000_ssi_ce0_d_pins[] = { 0x61, };
2029 static int x1000_ssi_ce1_a_21_pins[] = { 0x15, };
2030 static int x1000_ssi_ce1_a_30_pins[] = { 0x1e, };
2031 static int x1000_mmc0_1bit_pins[] = { 0x18, 0x19, 0x17, };
2032 static int x1000_mmc0_4bit_pins[] = { 0x16, 0x15, 0x14, };
2033 static int x1000_mmc0_8bit_pins[] = { 0x13, 0x12, 0x11, 0x10, };
2034 static int x1000_mmc1_1bit_pins[] = { 0x40, 0x41, 0x42, };
2035 static int x1000_mmc1_4bit_pins[] = { 0x43, 0x44, 0x45, };
2036 static int x1000_emc_8bit_data_pins[] = {
2039 static int x1000_emc_16bit_data_pins[] = {
2042 static int x1000_emc_addr_pins[] = {
2046 static int x1000_emc_rd_we_pins[] = { 0x30, 0x31, };
2047 static int x1000_emc_wait_pins[] = { 0x34, };
2048 static int x1000_emc_cs1_pins[] = { 0x32, };
2049 static int x1000_emc_cs2_pins[] = { 0x33, };
2050 static int x1000_i2c0_pins[] = { 0x38, 0x37, };
2051 static int x1000_i2c1_a_pins[] = { 0x01, 0x00, };
2052 static int x1000_i2c1_c_pins[] = { 0x5b, 0x5a, };
2053 static int x1000_i2c2_pins[] = { 0x61, 0x60, };
2054 static int x1000_i2s_data_tx_pins[] = { 0x24, };
2055 static int x1000_i2s_data_rx_pins[] = { 0x23, };
2056 static int x1000_i2s_clk_txrx_pins[] = { 0x21, 0x22, };
2057 static int x1000_i2s_sysclk_pins[] = { 0x20, };
2058 static int x1000_dmic_if0_pins[] = { 0x35, 0x36, };
2059 static int x1000_dmic_if1_pins[] = { 0x25, };
2060 static int x1000_cim_pins[] = {
2064 static int x1000_lcd_8bit_pins[] = {
2068 static int x1000_lcd_16bit_pins[] = {
2071 static int x1000_pwm_pwm0_pins[] = { 0x59, };
2072 static int x1000_pwm_pwm1_pins[] = { 0x5a, };
2073 static int x1000_pwm_pwm2_pins[] = { 0x5b, };
2074 static int x1000_pwm_pwm3_pins[] = { 0x26, };
2075 static int x1000_pwm_pwm4_pins[] = { 0x58, };
2076 static int x1000_mac_pins[] = {
2080 static const struct group_desc x1000_groups[] = {
2140 static const char *x1000_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
2141 static const char *x1000_uart1_groups[] = {
2144 static const char *x1000_uart2_groups[] = { "uart2-data-a", "uart2-data-d", };
2145 static const char *x1000_sfc_groups[] = { "sfc-data", "sfc-clk", "sfc-ce", };
2146 static const char *x1000_ssi_groups[] = {
2154 static const char *x1000_mmc0_groups[] = {
2157 static const char *x1000_mmc1_groups[] = {
2160 static const char *x1000_emc_groups[] = {
2164 static const char *x1000_cs1_groups[] = { "emc-cs1", };
2165 static const char *x1000_cs2_groups[] = { "emc-cs2", };
2166 static const char *x1000_i2c0_groups[] = { "i2c0-data", };
2167 static const char *x1000_i2c1_groups[] = { "i2c1-data-a", "i2c1-data-c", };
2168 static const char *x1000_i2c2_groups[] = { "i2c2-data", };
2169 static const char *x1000_i2s_groups[] = {
2172 static const char *x1000_dmic_groups[] = { "dmic-if0", "dmic-if1", };
2173 static const char *x1000_cim_groups[] = { "cim-data", };
2174 static const char *x1000_lcd_groups[] = { "lcd-8bit", "lcd-16bit", };
2175 static const char *x1000_pwm0_groups[] = { "pwm0", };
2176 static const char *x1000_pwm1_groups[] = { "pwm1", };
2177 static const char *x1000_pwm2_groups[] = { "pwm2", };
2178 static const char *x1000_pwm3_groups[] = { "pwm3", };
2179 static const char *x1000_pwm4_groups[] = { "pwm4", };
2180 static const char *x1000_mac_groups[] = { "mac", };
2182 static const struct function_desc x1000_functions[] = {
2208 static const struct regmap_range x1000_access_ranges[] = {
2214 static const struct regmap_access_table x1000_access_table = {
2219 static const struct ingenic_chip_info x1000_chip_info = {
2232 static int x1500_uart0_data_pins[] = { 0x4a, 0x4b, };
2233 static int x1500_uart0_hwflow_pins[] = { 0x4c, 0x4d, };
2234 static int x1500_uart1_data_a_pins[] = { 0x04, 0x05, };
2235 static int x1500_uart1_data_d_pins[] = { 0x62, 0x63, };
2236 static int x1500_uart1_hwflow_pins[] = { 0x64, 0x65, };
2237 static int x1500_uart2_data_a_pins[] = { 0x02, 0x03, };
2238 static int x1500_uart2_data_d_pins[] = { 0x65, 0x64, };
2239 static int x1500_mmc_1bit_pins[] = { 0x18, 0x19, 0x17, };
2240 static int x1500_mmc_4bit_pins[] = { 0x16, 0x15, 0x14, };
2241 static int x1500_i2c0_pins[] = { 0x38, 0x37, };
2242 static int x1500_i2c1_a_pins[] = { 0x01, 0x00, };
2243 static int x1500_i2c1_c_pins[] = { 0x5b, 0x5a, };
2244 static int x1500_i2c2_pins[] = { 0x61, 0x60, };
2245 static int x1500_i2s_data_tx_pins[] = { 0x24, };
2246 static int x1500_i2s_data_rx_pins[] = { 0x23, };
2247 static int x1500_i2s_clk_txrx_pins[] = { 0x21, 0x22, };
2248 static int x1500_i2s_sysclk_pins[] = { 0x20, };
2249 static int x1500_dmic_if0_pins[] = { 0x35, 0x36, };
2250 static int x1500_dmic_if1_pins[] = { 0x25, };
2251 static int x1500_cim_pins[] = {
2255 static int x1500_pwm_pwm0_pins[] = { 0x59, };
2256 static int x1500_pwm_pwm1_pins[] = { 0x5a, };
2257 static int x1500_pwm_pwm2_pins[] = { 0x5b, };
2258 static int x1500_pwm_pwm3_pins[] = { 0x26, };
2259 static int x1500_pwm_pwm4_pins[] = { 0x58, };
2261 static const struct group_desc x1500_groups[] = {
2292 static const char *x1500_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
2293 static const char *x1500_uart1_groups[] = {
2296 static const char *x1500_uart2_groups[] = { "uart2-data-a", "uart2-data-d", };
2297 static const char *x1500_mmc_groups[] = { "mmc-1bit", "mmc-4bit", };
2298 static const char *x1500_i2c0_groups[] = { "i2c0-data", };
2299 static const char *x1500_i2c1_groups[] = { "i2c1-data-a", "i2c1-data-c", };
2300 static const char *x1500_i2c2_groups[] = { "i2c2-data", };
2301 static const char *x1500_i2s_groups[] = {
2304 static const char *x1500_dmic_groups[] = { "dmic-if0", "dmic-if1", };
2305 static const char *x1500_cim_groups[] = { "cim-data", };
2306 static const char *x1500_pwm0_groups[] = { "pwm0", };
2307 static const char *x1500_pwm1_groups[] = { "pwm1", };
2308 static const char *x1500_pwm2_groups[] = { "pwm2", };
2309 static const char *x1500_pwm3_groups[] = { "pwm3", };
2310 static const char *x1500_pwm4_groups[] = { "pwm4", };
2312 static const struct function_desc x1500_functions[] = {
2331 static const struct ingenic_chip_info x1500_chip_info = {
2344 static const u32 x1830_pull_ups[4] = {
2348 static const u32 x1830_pull_downs[4] = {
2352 static int x1830_uart0_data_pins[] = { 0x33, 0x36, };
2353 static int x1830_uart0_hwflow_pins[] = { 0x34, 0x35, };
2354 static int x1830_uart1_data_pins[] = { 0x38, 0x37, };
2355 static int x1830_sfc_data_pins[] = { 0x17, 0x18, 0x1a, 0x19, };
2356 static int x1830_sfc_clk_pins[] = { 0x1b, };
2357 static int x1830_sfc_ce_pins[] = { 0x1c, };
2358 static int x1830_ssi0_dt_pins[] = { 0x4c, };
2359 static int x1830_ssi0_dr_pins[] = { 0x4b, };
2360 static int x1830_ssi0_clk_pins[] = { 0x4f, };
2361 static int x1830_ssi0_gpc_pins[] = { 0x4d, };
2362 static int x1830_ssi0_ce0_pins[] = { 0x50, };
2363 static int x1830_ssi0_ce1_pins[] = { 0x4e, };
2364 static int x1830_ssi1_dt_c_pins[] = { 0x53, };
2365 static int x1830_ssi1_dt_d_pins[] = { 0x62, };
2366 static int x1830_ssi1_dr_c_pins[] = { 0x54, };
2367 static int x1830_ssi1_dr_d_pins[] = { 0x63, };
2368 static int x1830_ssi1_clk_c_pins[] = { 0x57, };
2369 static int x1830_ssi1_clk_d_pins[] = { 0x66, };
2370 static int x1830_ssi1_gpc_c_pins[] = { 0x55, };
2371 static int x1830_ssi1_gpc_d_pins[] = { 0x64, };
2372 static int x1830_ssi1_ce0_c_pins[] = { 0x58, };
2373 static int x1830_ssi1_ce0_d_pins[] = { 0x67, };
2374 static int x1830_ssi1_ce1_c_pins[] = { 0x56, };
2375 static int x1830_ssi1_ce1_d_pins[] = { 0x65, };
2376 static int x1830_mmc0_1bit_pins[] = { 0x24, 0x25, 0x20, };
2377 static int x1830_mmc0_4bit_pins[] = { 0x21, 0x22, 0x23, };
2378 static int x1830_mmc1_1bit_pins[] = { 0x42, 0x43, 0x44, };
2379 static int x1830_mmc1_4bit_pins[] = { 0x45, 0x46, 0x47, };
2380 static int x1830_i2c0_pins[] = { 0x0c, 0x0d, };
2381 static int x1830_i2c1_pins[] = { 0x39, 0x3a, };
2382 static int x1830_i2c2_pins[] = { 0x5b, 0x5c, };
2383 static int x1830_i2s_data_tx_pins[] = { 0x53, };
2384 static int x1830_i2s_data_rx_pins[] = { 0x54, };
2385 static int x1830_i2s_clk_txrx_pins[] = { 0x58, 0x52, };
2386 static int x1830_i2s_clk_rx_pins[] = { 0x56, 0x55, };
2387 static int x1830_i2s_sysclk_pins[] = { 0x57, };
2388 static int x1830_dmic_if0_pins[] = { 0x48, 0x59, };
2389 static int x1830_dmic_if1_pins[] = { 0x5a, };
2390 static int x1830_lcd_tft_8bit_pins[] = {
2394 static int x1830_lcd_tft_24bit_pins[] = {
2398 static int x1830_lcd_slcd_8bit_pins[] = {
2402 static int x1830_lcd_slcd_16bit_pins[] = {
2405 static int x1830_pwm_pwm0_b_pins[] = { 0x31, };
2406 static int x1830_pwm_pwm0_c_pins[] = { 0x4b, };
2407 static int x1830_pwm_pwm1_b_pins[] = { 0x32, };
2408 static int x1830_pwm_pwm1_c_pins[] = { 0x4c, };
2409 static int x1830_pwm_pwm2_c_8_pins[] = { 0x48, };
2410 static int x1830_pwm_pwm2_c_13_pins[] = { 0x4d, };
2411 static int x1830_pwm_pwm3_c_9_pins[] = { 0x49, };
2412 static int x1830_pwm_pwm3_c_14_pins[] = { 0x4e, };
2413 static int x1830_pwm_pwm4_c_15_pins[] = { 0x4f, };
2414 static int x1830_pwm_pwm4_c_25_pins[] = { 0x59, };
2415 static int x1830_pwm_pwm5_c_16_pins[] = { 0x50, };
2416 static int x1830_pwm_pwm5_c_26_pins[] = { 0x5a, };
2417 static int x1830_pwm_pwm6_c_17_pins[] = { 0x51, };
2418 static int x1830_pwm_pwm6_c_27_pins[] = { 0x5b, };
2419 static int x1830_pwm_pwm7_c_18_pins[] = { 0x52, };
2420 static int x1830_pwm_pwm7_c_28_pins[] = { 0x5c, };
2421 static int x1830_mac_pins[] = {
2425 static const struct group_desc x1830_groups[] = {
2487 static const char *x1830_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
2488 static const char *x1830_uart1_groups[] = { "uart1-data", };
2489 static const char *x1830_sfc_groups[] = { "sfc-data", "sfc-clk", "sfc-ce", };
2490 static const char *x1830_ssi0_groups[] = {
2493 static const char *x1830_ssi1_groups[] = {
2501 static const char *x1830_mmc0_groups[] = { "mmc0-1bit", "mmc0-4bit", };
2502 static const char *x1830_mmc1_groups[] = { "mmc1-1bit", "mmc1-4bit", };
2503 static const char *x1830_i2c0_groups[] = { "i2c0-data", };
2504 static const char *x1830_i2c1_groups[] = { "i2c1-data", };
2505 static const char *x1830_i2c2_groups[] = { "i2c2-data", };
2506 static const char *x1830_i2s_groups[] = {
2509 static const char *x1830_dmic_groups[] = { "dmic-if0", "dmic-if1", };
2510 static const char *x1830_lcd_groups[] = {
2513 static const char *x1830_pwm0_groups[] = { "pwm0-b", "pwm0-c", };
2514 static const char *x1830_pwm1_groups[] = { "pwm1-b", "pwm1-c", };
2515 static const char *x1830_pwm2_groups[] = { "pwm2-c-8", "pwm2-c-13", };
2516 static const char *x1830_pwm3_groups[] = { "pwm3-c-9", "pwm3-c-14", };
2517 static const char *x1830_pwm4_groups[] = { "pwm4-c-15", "pwm4-c-25", };
2518 static const char *x1830_pwm5_groups[] = { "pwm5-c-16", "pwm5-c-26", };
2519 static const char *x1830_pwm6_groups[] = { "pwm6-c-17", "pwm6-c-27", };
2520 static const char *x1830_pwm7_groups[] = { "pwm7-c-18", "pwm7-c-28", };
2521 static const char *x1830_mac_groups[] = { "mac", };
2523 static const struct function_desc x1830_functions[] = {
2548 static const struct regmap_range x1830_access_ranges[] = {
2553 static const struct regmap_access_table x1830_access_table = {
2558 static const struct ingenic_chip_info x1830_chip_info = {
2571 static const u32 x2000_pull_ups[5] = {
2575 static const u32 x2000_pull_downs[5] = {
2579 static int x2000_uart0_data_pins[] = { 0x77, 0x78, };
2580 static int x2000_uart0_hwflow_pins[] = { 0x79, 0x7a, };
2581 static int x2000_uart1_data_pins[] = { 0x57, 0x58, };
2582 static int x2000_uart1_hwflow_pins[] = { 0x55, 0x56, };
2583 static int x2000_uart2_data_pins[] = { 0x7e, 0x7f, };
2584 static int x2000_uart3_data_c_pins[] = { 0x59, 0x5a, };
2585 static int x2000_uart3_data_d_pins[] = { 0x62, 0x63, };
2586 static int x2000_uart3_hwflow_c_pins[] = { 0x5b, 0x5c, };
2587 static int x2000_uart3_hwflow_d_pins[] = { 0x60, 0x61, };
2588 static int x2000_uart4_data_a_pins[] = { 0x02, 0x03, };
2589 static int x2000_uart4_data_c_pins[] = { 0x4b, 0x4c, };
2590 static int x2000_uart4_hwflow_a_pins[] = { 0x00, 0x01, };
2591 static int x2000_uart4_hwflow_c_pins[] = { 0x49, 0x4a, };
2592 static int x2000_uart5_data_a_pins[] = { 0x04, 0x05, };
2593 static int x2000_uart5_data_c_pins[] = { 0x45, 0x46, };
2594 static int x2000_uart6_data_a_pins[] = { 0x06, 0x07, };
2595 static int x2000_uart6_data_c_pins[] = { 0x47, 0x48, };
2596 static int x2000_uart7_data_a_pins[] = { 0x08, 0x09, };
2597 static int x2000_uart7_data_c_pins[] = { 0x41, 0x42, };
2598 static int x2000_uart8_data_pins[] = { 0x3c, 0x3d, };
2599 static int x2000_uart9_data_pins[] = { 0x3e, 0x3f, };
2600 static int x2000_sfc_data_if0_d_pins[] = { 0x73, 0x74, 0x75, 0x76, };
2601 static int x2000_sfc_data_if0_e_pins[] = { 0x92, 0x93, 0x94, 0x95, };
2602 static int x2000_sfc_data_if1_pins[] = { 0x77, 0x78, 0x79, 0x7a, };
2603 static int x2000_sfc_clk_d_pins[] = { 0x71, };
2604 static int x2000_sfc_clk_e_pins[] = { 0x90, };
2605 static int x2000_sfc_ce_d_pins[] = { 0x72, };
2606 static int x2000_sfc_ce_e_pins[] = { 0x91, };
2607 static int x2000_ssi0_dt_b_pins[] = { 0x3e, };
2608 static int x2000_ssi0_dt_d_pins[] = { 0x69, };
2609 static int x2000_ssi0_dr_b_pins[] = { 0x3d, };
2610 static int x2000_ssi0_dr_d_pins[] = { 0x6a, };
2611 static int x2000_ssi0_clk_b_pins[] = { 0x3f, };
2612 static int x2000_ssi0_clk_d_pins[] = { 0x68, };
2613 static int x2000_ssi0_ce_b_pins[] = { 0x3c, };
2614 static int x2000_ssi0_ce_d_pins[] = { 0x6d, };
2615 static int x2000_ssi1_dt_c_pins[] = { 0x4b, };
2616 static int x2000_ssi1_dt_d_pins[] = { 0x72, };
2617 static int x2000_ssi1_dt_e_pins[] = { 0x91, };
2618 static int x2000_ssi1_dr_c_pins[] = { 0x4a, };
2619 static int x2000_ssi1_dr_d_pins[] = { 0x73, };
2620 static int x2000_ssi1_dr_e_pins[] = { 0x92, };
2621 static int x2000_ssi1_clk_c_pins[] = { 0x4c, };
2622 static int x2000_ssi1_clk_d_pins[] = { 0x71, };
2623 static int x2000_ssi1_clk_e_pins[] = { 0x90, };
2624 static int x2000_ssi1_ce_c_pins[] = { 0x49, };
2625 static int x2000_ssi1_ce_d_pins[] = { 0x76, };
2626 static int x2000_ssi1_ce_e_pins[] = { 0x95, };
2627 static int x2000_mmc0_1bit_pins[] = { 0x71, 0x72, 0x73, };
2628 static int x2000_mmc0_4bit_pins[] = { 0x74, 0x75, 0x75, };
2629 static int x2000_mmc0_8bit_pins[] = { 0x77, 0x78, 0x79, 0x7a, };
2630 static int x2000_mmc1_1bit_pins[] = { 0x68, 0x69, 0x6a, };
2631 static int x2000_mmc1_4bit_pins[] = { 0x6b, 0x6c, 0x6d, };
2632 static int x2000_mmc2_1bit_pins[] = { 0x80, 0x81, 0x82, };
2633 static int x2000_mmc2_4bit_pins[] = { 0x83, 0x84, 0x85, };
2634 static int x2000_emc_8bit_data_pins[] = {
2637 static int x2000_emc_16bit_data_pins[] = {
2640 static int x2000_emc_addr_pins[] = {
2644 static int x2000_emc_rd_we_pins[] = { 0x2d, 0x2e, };
2645 static int x2000_emc_wait_pins[] = { 0x2f, };
2646 static int x2000_emc_cs1_pins[] = { 0x57, };
2647 static int x2000_emc_cs2_pins[] = { 0x58, };
2648 static int x2000_i2c0_pins[] = { 0x4e, 0x4d, };
2649 static int x2000_i2c1_c_pins[] = { 0x58, 0x57, };
2650 static int x2000_i2c1_d_pins[] = { 0x6c, 0x6b, };
2651 static int x2000_i2c2_b_pins[] = { 0x37, 0x36, };
2652 static int x2000_i2c2_d_pins[] = { 0x75, 0x74, };
2653 static int x2000_i2c2_e_pins[] = { 0x94, 0x93, };
2654 static int x2000_i2c3_a_pins[] = { 0x11, 0x10, };
2655 static int x2000_i2c3_d_pins[] = { 0x7f, 0x7e, };
2656 static int x2000_i2c4_c_pins[] = { 0x5a, 0x59, };
2657 static int x2000_i2c4_d_pins[] = { 0x61, 0x60, };
2658 static int x2000_i2c5_c_pins[] = { 0x5c, 0x5b, };
2659 static int x2000_i2c5_d_pins[] = { 0x65, 0x64, };
2660 static int x2000_i2s1_data_tx_pins[] = { 0x47, };
2661 static int x2000_i2s1_data_rx_pins[] = { 0x44, };
2662 static int x2000_i2s1_clk_tx_pins[] = { 0x45, 0x46, };
2663 static int x2000_i2s1_clk_rx_pins[] = { 0x42, 0x43, };
2664 static int x2000_i2s1_sysclk_tx_pins[] = { 0x48, };
2665 static int x2000_i2s1_sysclk_rx_pins[] = { 0x41, };
2666 static int x2000_i2s2_data_rx0_pins[] = { 0x0a, };
2667 static int x2000_i2s2_data_rx1_pins[] = { 0x0b, };
2668 static int x2000_i2s2_data_rx2_pins[] = { 0x0c, };
2669 static int x2000_i2s2_data_rx3_pins[] = { 0x0d, };
2670 static int x2000_i2s2_clk_rx_pins[] = { 0x11, 0x09, };
2671 static int x2000_i2s2_sysclk_rx_pins[] = { 0x07, };
2672 static int x2000_i2s3_data_tx0_pins[] = { 0x03, };
2673 static int x2000_i2s3_data_tx1_pins[] = { 0x04, };
2674 static int x2000_i2s3_data_tx2_pins[] = { 0x05, };
2675 static int x2000_i2s3_data_tx3_pins[] = { 0x06, };
2676 static int x2000_i2s3_clk_tx_pins[] = { 0x10, 0x02, };
2677 static int x2000_i2s3_sysclk_tx_pins[] = { 0x00, };
2678 static int x2000_dmic_if0_pins[] = { 0x54, 0x55, };
2679 static int x2000_dmic_if1_pins[] = { 0x56, };
2680 static int x2000_dmic_if2_pins[] = { 0x57, };
2681 static int x2000_dmic_if3_pins[] = { 0x58, };
2682 static int x2000_cim_8bit_pins[] = {
2686 static int x2000_cim_12bit_pins[] = { 0x08, 0x09, 0x0a, 0x0b, };
2687 static int x2000_lcd_tft_8bit_pins[] = {
2691 static int x2000_lcd_tft_16bit_pins[] = {
2694 static int x2000_lcd_tft_18bit_pins[] = {
2697 static int x2000_lcd_tft_24bit_pins[] = {
2700 static int x2000_lcd_slcd_8bit_pins[] = {
2704 static int x2000_pwm_pwm0_c_pins[] = { 0x40, };
2705 static int x2000_pwm_pwm0_d_pins[] = { 0x7e, };
2706 static int x2000_pwm_pwm1_c_pins[] = { 0x41, };
2707 static int x2000_pwm_pwm1_d_pins[] = { 0x7f, };
2708 static int x2000_pwm_pwm2_c_pins[] = { 0x42, };
2709 static int x2000_pwm_pwm2_e_pins[] = { 0x80, };
2710 static int x2000_pwm_pwm3_c_pins[] = { 0x43, };
2711 static int x2000_pwm_pwm3_e_pins[] = { 0x81, };
2712 static int x2000_pwm_pwm4_c_pins[] = { 0x44, };
2713 static int x2000_pwm_pwm4_e_pins[] = { 0x82, };
2714 static int x2000_pwm_pwm5_c_pins[] = { 0x45, };
2715 static int x2000_pwm_pwm5_e_pins[] = { 0x83, };
2716 static int x2000_pwm_pwm6_c_pins[] = { 0x46, };
2717 static int x2000_pwm_pwm6_e_pins[] = { 0x84, };
2718 static int x2000_pwm_pwm7_c_pins[] = { 0x47, };
2719 static int x2000_pwm_pwm7_e_pins[] = { 0x85, };
2720 static int x2000_pwm_pwm8_pins[] = { 0x48, };
2721 static int x2000_pwm_pwm9_pins[] = { 0x49, };
2722 static int x2000_pwm_pwm10_pins[] = { 0x4a, };
2723 static int x2000_pwm_pwm11_pins[] = { 0x4b, };
2724 static int x2000_pwm_pwm12_pins[] = { 0x4c, };
2725 static int x2000_pwm_pwm13_pins[] = { 0x4d, };
2726 static int x2000_pwm_pwm14_pins[] = { 0x4e, };
2727 static int x2000_pwm_pwm15_pins[] = { 0x4f, };
2728 static int x2000_mac0_rmii_pins[] = {
2731 static int x2000_mac0_rgmii_pins[] = {
2735 static int x2000_mac1_rmii_pins[] = {
2738 static int x2000_mac1_rgmii_pins[] = {
2742 static int x2000_otg_pins[] = { 0x96, };
2744 static u8 x2000_cim_8bit_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, };
2746 static const struct group_desc x2000_groups[] = {
2883 static const char *x2000_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
2884 static const char *x2000_uart1_groups[] = { "uart1-data", "uart1-hwflow", };
2885 static const char *x2000_uart2_groups[] = { "uart2-data", };
2886 static const char *x2000_uart3_groups[] = {
2889 static const char *x2000_uart4_groups[] = {
2892 static const char *x2000_uart5_groups[] = { "uart5-data-a", "uart5-data-c", };
2893 static const char *x2000_uart6_groups[] = { "uart6-data-a", "uart6-data-c", };
2894 static const char *x2000_uart7_groups[] = { "uart7-data-a", "uart7-data-c", };
2895 static const char *x2000_uart8_groups[] = { "uart8-data", };
2896 static const char *x2000_uart9_groups[] = { "uart9-data", };
2897 static const char *x2000_sfc_groups[] = {
2901 static const char *x2000_ssi0_groups[] = {
2907 static const char *x2000_ssi1_groups[] = {
2913 static const char *x2000_mmc0_groups[] = { "mmc0-1bit", "mmc0-4bit", "mmc0-8bit", };
2914 static const char *x2000_mmc1_groups[] = { "mmc1-1bit", "mmc1-4bit", };
2915 static const char *x2000_mmc2_groups[] = { "mmc2-1bit", "mmc2-4bit", };
2916 static const char *x2000_emc_groups[] = {
2920 static const char *x2000_cs1_groups[] = { "emc-cs1", };
2921 static const char *x2000_cs2_groups[] = { "emc-cs2", };
2922 static const char *x2000_i2c0_groups[] = { "i2c0-data", };
2923 static const char *x2000_i2c1_groups[] = { "i2c1-data-c", "i2c1-data-d", };
2924 static const char *x2000_i2c2_groups[] = { "i2c2-data-b", "i2c2-data-d", };
2925 static const char *x2000_i2c3_groups[] = { "i2c3-data-a", "i2c3-data-d", };
2926 static const char *x2000_i2c4_groups[] = { "i2c4-data-c", "i2c4-data-d", };
2927 static const char *x2000_i2c5_groups[] = { "i2c5-data-c", "i2c5-data-d", };
2928 static const char *x2000_i2s1_groups[] = {
2933 static const char *x2000_i2s2_groups[] = {
2937 static const char *x2000_i2s3_groups[] = {
2941 static const char *x2000_dmic_groups[] = {
2944 static const char *x2000_cim_groups[] = { "cim-data-8bit", "cim-data-12bit", };
2945 static const char *x2000_lcd_groups[] = {
2949 static const char *x2000_pwm0_groups[] = { "pwm0-c", "pwm0-d", };
2950 static const char *x2000_pwm1_groups[] = { "pwm1-c", "pwm1-d", };
2951 static const char *x2000_pwm2_groups[] = { "pwm2-c", "pwm2-e", };
2952 static const char *x2000_pwm3_groups[] = { "pwm3-c", "pwm3-r", };
2953 static const char *x2000_pwm4_groups[] = { "pwm4-c", "pwm4-e", };
2954 static const char *x2000_pwm5_groups[] = { "pwm5-c", "pwm5-e", };
2955 static const char *x2000_pwm6_groups[] = { "pwm6-c", "pwm6-e", };
2956 static const char *x2000_pwm7_groups[] = { "pwm7-c", "pwm7-e", };
2957 static const char *x2000_pwm8_groups[] = { "pwm8", };
2958 static const char *x2000_pwm9_groups[] = { "pwm9", };
2959 static const char *x2000_pwm10_groups[] = { "pwm10", };
2960 static const char *x2000_pwm11_groups[] = { "pwm11", };
2961 static const char *x2000_pwm12_groups[] = { "pwm12", };
2962 static const char *x2000_pwm13_groups[] = { "pwm13", };
2963 static const char *x2000_pwm14_groups[] = { "pwm14", };
2964 static const char *x2000_pwm15_groups[] = { "pwm15", };
2965 static const char *x2000_mac0_groups[] = { "mac0-rmii", "mac0-rgmii", };
2966 static const char *x2000_mac1_groups[] = { "mac1-rmii", "mac1-rgmii", };
2967 static const char *x2000_otg_groups[] = { "otg-vbus", };
2969 static const struct function_desc x2000_functions[] = {
3022 static const struct regmap_range x2000_access_ranges[] = {
3028 static const struct regmap_access_table x2000_access_table = {
3033 static const struct ingenic_chip_info x2000_chip_info = {
3046 static const u32 x2100_pull_ups[5] = {
3050 static const u32 x2100_pull_downs[5] = {
3054 static int x2100_mac_pins[] = {
3058 static const struct group_desc x2100_groups[] = {
3191 static const char *x2100_mac_groups[] = { "mac", };
3193 static const struct function_desc x2100_functions[] = {
3244 static const struct ingenic_chip_info x2100_chip_info = {
3257 static u32 ingenic_gpio_read_reg(struct ingenic_gpio_chip *jzgc, u8 reg)  in ingenic_gpio_read_reg()
3266 static void ingenic_gpio_set_bit(struct ingenic_gpio_chip *jzgc,  in ingenic_gpio_set_bit()
3283 static void ingenic_gpio_shadow_set_bit(struct ingenic_gpio_chip *jzgc,  in ingenic_gpio_shadow_set_bit()
3295 static void ingenic_gpio_shadow_set_bit_load(struct ingenic_gpio_chip *jzgc)  in ingenic_gpio_shadow_set_bit_load()
3302 static void jz4730_gpio_set_bits(struct ingenic_gpio_chip *jzgc,  in jz4730_gpio_set_bits()
3316 static inline bool ingenic_gpio_get_value(struct ingenic_gpio_chip *jzgc,  in ingenic_gpio_get_value()
3324 static void ingenic_gpio_set_value(struct ingenic_gpio_chip *jzgc,  in ingenic_gpio_set_value()
3335 static void irq_set_type(struct ingenic_gpio_chip *jzgc,  in irq_set_type()
3392 static void ingenic_gpio_irq_mask(struct irq_data *irqd)  in ingenic_gpio_irq_mask()
3404 static void ingenic_gpio_irq_unmask(struct irq_data *irqd)  in ingenic_gpio_irq_unmask()
3416 static void ingenic_gpio_irq_enable(struct irq_data *irqd)  in ingenic_gpio_irq_enable()
3434 static void ingenic_gpio_irq_disable(struct irq_data *irqd)  in ingenic_gpio_irq_disable()
3452 static void ingenic_gpio_irq_ack(struct irq_data *irqd)  in ingenic_gpio_irq_ack()
3480 static int ingenic_gpio_irq_set_type(struct irq_data *irqd, unsigned int type)  in ingenic_gpio_irq_set_type()
3515 static int ingenic_gpio_irq_set_wake(struct irq_data *irqd, unsigned int on)  in ingenic_gpio_irq_set_wake()
3523 static void ingenic_gpio_irq_handler(struct irq_desc *desc)  in ingenic_gpio_irq_handler()
3544 static void ingenic_gpio_set(struct gpio_chip *gc,  in ingenic_gpio_set()
3552 static int ingenic_gpio_get(struct gpio_chip *gc, unsigned int offset)  in ingenic_gpio_get()
3559 static int ingenic_gpio_direction_input(struct gpio_chip *gc,  in ingenic_gpio_direction_input()
3565 static int ingenic_gpio_direction_output(struct gpio_chip *gc,  in ingenic_gpio_direction_output()
3572 static inline void ingenic_config_pin(struct ingenic_pinctrl *jzpc,  in ingenic_config_pin()
3595 static inline void ingenic_shadow_config_pin(struct ingenic_pinctrl *jzpc,  in ingenic_shadow_config_pin()
3604 static inline void ingenic_shadow_config_pin_load(struct ingenic_pinctrl *jzpc,  in ingenic_shadow_config_pin_load()
3611 static inline void jz4730_config_pin_function(struct ingenic_pinctrl *jzpc,  in jz4730_config_pin_function()
3627 static inline bool ingenic_get_pin_config(struct ingenic_pinctrl *jzpc,  in ingenic_get_pin_config()
3639 static int ingenic_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)  in ingenic_gpio_get_direction()
3665 static const struct pinctrl_ops ingenic_pctlops = {
3673 static int ingenic_gpio_irq_request(struct irq_data *data)  in ingenic_gpio_irq_request()
3686 static void ingenic_gpio_irq_release(struct irq_data *data)  in ingenic_gpio_irq_release()
3694 static void ingenic_gpio_irq_print_chip(struct irq_data *data, struct seq_file *p)  in ingenic_gpio_irq_print_chip()
3701 static const struct irq_chip ingenic_gpio_irqchip = {
3715 static int ingenic_pinmux_set_pin_fn(struct ingenic_pinctrl *jzpc,  in ingenic_pinmux_set_pin_fn()
3747 static int ingenic_pinmux_set_mux(struct pinctrl_dev *pctldev,  in ingenic_pinmux_set_mux()
3782 static int ingenic_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev,  in ingenic_pinmux_gpio_set_direction()
3815 static const struct pinmux_ops ingenic_pmxops = {
3823 static int ingenic_pinconf_get(struct pinctrl_dev *pctldev,  in ingenic_pinconf_get()
3919 static void ingenic_set_bias(struct ingenic_pinctrl *jzpc,  in ingenic_set_bias()
3967 static void ingenic_set_schmitt_trigger(struct ingenic_pinctrl *jzpc,  in ingenic_set_schmitt_trigger()
3976 static void ingenic_set_output_level(struct ingenic_pinctrl *jzpc,  in ingenic_set_output_level()
3987 static void ingenic_set_slew_rate(struct ingenic_pinctrl *jzpc,  in ingenic_set_slew_rate()
3996 static int ingenic_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,  in ingenic_pinconf_set()
4076 static int ingenic_pinconf_group_get(struct pinctrl_dev *pctldev,  in ingenic_pinconf_group_get()
4101 static int ingenic_pinconf_group_set(struct pinctrl_dev *pctldev,  in ingenic_pinconf_group_set()
4123 static const struct pinconf_ops ingenic_confops = {
4131 static const struct regmap_config ingenic_pinctrl_regmap_config = {
4137 static const struct of_device_id ingenic_gpio_of_matches[] __initconst = {
4154 static int __init ingenic_gpio_probe(struct ingenic_pinctrl *jzpc,  in ingenic_gpio_probe()
4226 static int __init ingenic_pinctrl_probe(struct platform_device *pdev)  in ingenic_pinctrl_probe()
4340 static const struct of_device_id ingenic_pinctrl_of_matches[] = {
4412 static struct platform_driver ingenic_pinctrl_driver = {
4419 static int __init ingenic_pinctrl_drv_register(void)  in ingenic_pinctrl_drv_register()