Lines Matching +full:pins +full:- +full:are +full:- +full:numbered

1 /* SPDX-License-Identifier: GPL-2.0 */
9 /* pins alternate function */
30  * struct abx500_function - ABx500 pinctrl mux function
42  * struct abx500_pingroup - describes a ABx500 pin group
44  * @pins: an array of discrete physical pins used in this group, taken
45  *	from the driver-local pin enumeration space
46  * @num_pins: the number of pins in this group array, i.e. the number of
47  *	elements in .pins so we can iterate over that array
48  * @altsetting: the altsetting to apply to all pins in this group to
53 	const unsigned int *pins;  member
69 #define UNUSED -1
79  *			these 3 following fields are necessary due to none
105  * struct abx500_gpio_irq_cluster - indicates GPIOs which are interrupt
109  * @to_irq:		The ABx500 GPIO's associated IRQs are clustered
112  *                      read-in values into the cluster information table
122  * struct abx500_pinrange - map pin numbers to GPIO offsets
125  * @npins:		number of pins to map from both offsets
138  * struct abx500_pinctrl_soc_data - ABx500 pin controller per-SoC configuration
141  * @pins:		An array describing all pins the pin controller affects.
142  *			All pins which are also GPIOs must be listed first within the
143  *			array, and be numbered identically to the GPIO controller's
145  * @npins:		The number of entries in @pins.
150  * @alternate_functions: array describing pins which supports alternate and
165 	const struct pinctrl_pin_desc *pins;  member