Lines Matching +full:gpio +full:- +full:mpp

1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6  *          Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13  * struct mvebu_mpp_ctrl_data - private data for the mpp ctrl operations
29  * struct mvebu_mpp_ctrl - describe a mpp control
33  * @mpp_get: (optional) special function to get mpp setting
34  * @mpp_set: (optional) special function to set mpp setting
35  * @mpp_gpio_req: (optional) special function to request gpio
36  * @mpp_gpio_dir: (optional) special function to set gpio direction
40  * between two or more different settings, e.g. assign mpp pin 13 to
45  * to allow pin settings with varying gpio pins.
62  * struct mvebu_mpp_ctrl_setting - describe a mpp ctrl setting
64  * @name: ctrl setting name, e.g. uart2, spi0 - unique per mpp_mode
67  * @flags: (private) flags to store gpi/gpo/gpio capabilities
69  * A ctrl_setting describes a specific internal mux function that a mpp pin
71  * register for common mpp pin configuration registers on MVEBU. SoC specific
77  * If name is one of "gpi", "gpo", "gpio" gpio capabilities are
95  * struct mvebu_mpp_mode - link ctrl and settings
108  * struct mvebu_pinctrl_soc_info - SoC specific info passed to pinctrl-mvebu
137 		.npins = _idh - _idl + 1,			\
138 		.pins = (unsigned[_idh - _idl + 1]) { },	\
149 		.npins = _idh - _idl + 1,			\
150 		.pins = (unsigned[_idh - _idl + 1]) { },	\
175 	MPP_VAR_FUNCTION(_val, _name, _subname, (u8)-1)
186 		.name = "mvebu-gpio",				\