1 // SPDX-License-Identifier: GPL-2.0-or-later
7  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
26 #include "pinctrl-mvebu.h"
164 		 MPP_VAR_FUNCTION(0x3, "tdm", "rst",        V_MV78230_PLUS),
169 		 MPP_VAR_FUNCTION(0x3, "tdm", "pclk",       V_MV78230_PLUS),
173 		 MPP_VAR_FUNCTION(0x3, "tdm", "fsync",      V_MV78230_PLUS),
178 		 MPP_VAR_FUNCTION(0x3, "tdm", "dtx",        V_MV78230_PLUS),
183 		 MPP_VAR_FUNCTION(0x3, "tdm", "drx",        V_MV78230_PLUS),
188 		 MPP_VAR_FUNCTION(0x3, "tdm", "int0",       V_MV78230_PLUS),
189 		 MPP_VAR_FUNCTION(0x4, "lcd", "ref-clk",    V_MV78230_PLUS)),
193 		 MPP_VAR_FUNCTION(0x3, "tdm", "int1",       V_MV78230_PLUS)),
197 		 MPP_VAR_FUNCTION(0x3, "tdm", "int2",       V_MV78230_PLUS)),
201 		 MPP_VAR_FUNCTION(0x3, "tdm", "int3",       V_MV78230_PLUS)),
205 		 MPP_VAR_FUNCTION(0x3, "tdm", "int4",       V_MV78230_PLUS),
212 		 MPP_VAR_FUNCTION(0x3, "tdm", "int5",       V_MV78230_PLUS),
218 		 MPP_VAR_FUNCTION(0x3, "tdm", "int6",       V_MV78230_PLUS)),
235 		 MPP_VAR_FUNCTION(0x4, "lcd", "vga-hsync",  V_MV78230_PLUS),
243 		 MPP_VAR_FUNCTION(0x4, "lcd", "vga-vsync",  V_MV78230_PLUS),
250 		 MPP_VAR_FUNCTION(0x3, "tdm", "int7",       V_MV78230_PLUS),
251 		 MPP_VAR_FUNCTION(0x4, "tdm", "timer",      V_MV78230_PLUS)),
410 		 MPP_VAR_FUNCTION(0x1, "intr", "out",        V_98DX3236_PLUS),
480 		.compatible = "marvell,mv78230-pinctrl",
481 		.data       = (void *) V_MV78230,
484 		.compatible = "marvell,mv78260-pinctrl",
485 		.data       = (void *) V_MV78260,
488 		.compatible = "marvell,mv78460-pinctrl",
489 		.data       = (void *) V_MV78460,
492 		.compatible = "marvell,98dx3236-pinctrl",
493 		.data       = (void *) V_98DX3236,
496 		.compatible = "marvell,98dx4251-pinctrl",
497 		.data       = (void *) V_98DX4251,
546 	nregs = DIV_ROUND_UP(soc->nmodes, MVEBU_MPPS_PER_REG);  in armada_xp_pinctrl_suspend()
549 		mpp_saved_regs[i] = readl(soc->control_data[0].base + i * 4);  in armada_xp_pinctrl_suspend()
560 	nregs = DIV_ROUND_UP(soc->nmodes, MVEBU_MPPS_PER_REG);  in armada_xp_pinctrl_resume()
563 		writel(mpp_saved_regs[i], soc->control_data[0].base + i * 4);  in armada_xp_pinctrl_resume()
572 		of_match_device(armada_xp_pinctrl_of_match, &pdev->dev);  in armada_xp_pinctrl_probe()
576 		return -ENODEV;  in armada_xp_pinctrl_probe()
578 	soc->variant = (unsigned) match->data & 0xff;  in armada_xp_pinctrl_probe()
580 	switch (soc->variant) {  in armada_xp_pinctrl_probe()
582 		soc->controls = mv78230_mpp_controls;  in armada_xp_pinctrl_probe()
583 		soc->ncontrols = ARRAY_SIZE(mv78230_mpp_controls);  in armada_xp_pinctrl_probe()
584 		soc->modes = armada_xp_mpp_modes;  in armada_xp_pinctrl_probe()
588 		soc->nmodes = mv78230_mpp_controls[0].npins;  in armada_xp_pinctrl_probe()
589 		soc->gpioranges = mv78230_mpp_gpio_ranges;  in armada_xp_pinctrl_probe()
590 		soc->ngpioranges = ARRAY_SIZE(mv78230_mpp_gpio_ranges);  in armada_xp_pinctrl_probe()
593 		soc->controls = mv78260_mpp_controls;  in armada_xp_pinctrl_probe()
594 		soc->ncontrols = ARRAY_SIZE(mv78260_mpp_controls);  in armada_xp_pinctrl_probe()
595 		soc->modes = armada_xp_mpp_modes;  in armada_xp_pinctrl_probe()
599 		soc->nmodes = mv78260_mpp_controls[0].npins;  in armada_xp_pinctrl_probe()
600 		soc->gpioranges = mv78260_mpp_gpio_ranges;  in armada_xp_pinctrl_probe()
601 		soc->ngpioranges = ARRAY_SIZE(mv78260_mpp_gpio_ranges);  in armada_xp_pinctrl_probe()
604 		soc->controls = mv78460_mpp_controls;  in armada_xp_pinctrl_probe()
605 		soc->ncontrols = ARRAY_SIZE(mv78460_mpp_controls);  in armada_xp_pinctrl_probe()
606 		soc->modes = armada_xp_mpp_modes;  in armada_xp_pinctrl_probe()
610 		soc->nmodes = mv78460_mpp_controls[0].npins;  in armada_xp_pinctrl_probe()
611 		soc->gpioranges = mv78460_mpp_gpio_ranges;  in armada_xp_pinctrl_probe()
612 		soc->ngpioranges = ARRAY_SIZE(mv78460_mpp_gpio_ranges);  in armada_xp_pinctrl_probe()
617 		/* fall-through */  in armada_xp_pinctrl_probe()
618 		soc->controls = mv98dx3236_mpp_controls;  in armada_xp_pinctrl_probe()
619 		soc->ncontrols = ARRAY_SIZE(mv98dx3236_mpp_controls);  in armada_xp_pinctrl_probe()
620 		soc->modes = mv98dx3236_mpp_modes;  in armada_xp_pinctrl_probe()
621 		soc->nmodes = mv98dx3236_mpp_controls[0].npins;  in armada_xp_pinctrl_probe()
622 		soc->gpioranges = mv98dx3236_mpp_gpio_ranges;  in armada_xp_pinctrl_probe()
623 		soc->ngpioranges = ARRAY_SIZE(mv98dx3236_mpp_gpio_ranges);  in armada_xp_pinctrl_probe()
627 	nregs = DIV_ROUND_UP(soc->nmodes, MVEBU_MPPS_PER_REG);  in armada_xp_pinctrl_probe()
629 	mpp_saved_regs = devm_kmalloc_array(&pdev->dev, nregs, sizeof(u32),  in armada_xp_pinctrl_probe()
632 		return -ENOMEM;  in armada_xp_pinctrl_probe()
634 	pdev->dev.platform_data = soc;  in armada_xp_pinctrl_probe()
641 		.name = "armada-xp-pinctrl",