Lines Matching +full:pctl +full:- +full:regmap
1 // SPDX-License-Identifier: GPL-2.0+
23 #include <linux/regmap.h>
28 #include "pinctrl-imx.h"
41 for (i = 0; i < pctldev->num_groups; i++) { in imx_pinctrl_find_group_by_name()
43 if (grp && !strcmp(grp->name, name)) in imx_pinctrl_find_group_by_name()
53 seq_printf(s, "%s", dev_name(pctldev->dev)); in imx_pin_dbg_show()
61 const struct imx_pinctrl_soc_info *info = ipctl->info; in imx_dt_node_to_map()
73 grp = imx_pinctrl_find_group_by_name(pctldev, np->name); in imx_dt_node_to_map()
75 dev_err(ipctl->dev, "unable to find group for node %pOFn\n", np); in imx_dt_node_to_map()
76 return -EINVAL; in imx_dt_node_to_map()
79 if (info->flags & IMX_USE_SCU) { in imx_dt_node_to_map()
80 map_num += grp->num_pins; in imx_dt_node_to_map()
82 for (i = 0; i < grp->num_pins; i++) { in imx_dt_node_to_map()
83 pin = &((struct imx_pin *)(grp->data))[i]; in imx_dt_node_to_map()
84 if (!(pin->conf.mmio.config & IMX_NO_PAD_CTL)) in imx_dt_node_to_map()
92 return -ENOMEM; in imx_dt_node_to_map()
101 return -EINVAL; in imx_dt_node_to_map()
104 new_map[0].data.mux.function = parent->name; in imx_dt_node_to_map()
105 new_map[0].data.mux.group = np->name; in imx_dt_node_to_map()
110 for (i = j = 0; i < grp->num_pins; i++) { in imx_dt_node_to_map()
111 pin = &((struct imx_pin *)(grp->data))[i]; in imx_dt_node_to_map()
117 if (!(info->flags & IMX_USE_SCU) && in imx_dt_node_to_map()
118 (pin->conf.mmio.config & IMX_NO_PAD_CTL)) in imx_dt_node_to_map()
123 pin_get_name(pctldev, pin->pin); in imx_dt_node_to_map()
125 if (info->flags & IMX_USE_SCU) { in imx_dt_node_to_map()
131 (unsigned long *)&pin->conf.scu; in imx_dt_node_to_map()
135 &pin->conf.mmio.config; in imx_dt_node_to_map()
142 dev_dbg(pctldev->dev, "maps: function %s group %s num %d\n", in imx_dt_node_to_map()
143 (*map)->data.mux.function, (*map)->data.mux.group, map_num); in imx_dt_node_to_map()
166 const struct imx_pinctrl_soc_info *info = ipctl->info; in imx_pmx_set_one_pin_mmio()
167 struct imx_pin_mmio *pin_mmio = &pin->conf.mmio; in imx_pmx_set_one_pin_mmio()
171 pin_id = pin->pin; in imx_pmx_set_one_pin_mmio()
172 pin_reg = &ipctl->pin_regs[pin_id]; in imx_pmx_set_one_pin_mmio()
174 if (pin_reg->mux_reg == -1) { in imx_pmx_set_one_pin_mmio()
175 dev_dbg(ipctl->dev, "Pin(%s) does not support mux function\n", in imx_pmx_set_one_pin_mmio()
176 info->pins[pin_id].name); in imx_pmx_set_one_pin_mmio()
180 if (info->flags & SHARE_MUX_CONF_REG) { in imx_pmx_set_one_pin_mmio()
183 reg = readl(ipctl->base + pin_reg->mux_reg); in imx_pmx_set_one_pin_mmio()
184 reg &= ~info->mux_mask; in imx_pmx_set_one_pin_mmio()
185 reg |= (pin_mmio->mux_mode << info->mux_shift); in imx_pmx_set_one_pin_mmio()
186 writel(reg, ipctl->base + pin_reg->mux_reg); in imx_pmx_set_one_pin_mmio()
187 dev_dbg(ipctl->dev, "write: offset 0x%x val 0x%x\n", in imx_pmx_set_one_pin_mmio()
188 pin_reg->mux_reg, reg); in imx_pmx_set_one_pin_mmio()
190 writel(pin_mmio->mux_mode, ipctl->base + pin_reg->mux_reg); in imx_pmx_set_one_pin_mmio()
191 dev_dbg(ipctl->dev, "write: offset 0x%x val 0x%x\n", in imx_pmx_set_one_pin_mmio()
192 pin_reg->mux_reg, pin_mmio->mux_mode); in imx_pmx_set_one_pin_mmio()
208 if (pin_mmio->input_val >> 24 == 0xff) { in imx_pmx_set_one_pin_mmio()
209 u32 val = pin_mmio->input_val; in imx_pmx_set_one_pin_mmio()
213 u32 mask = ((1 << width) - 1) << shift; in imx_pmx_set_one_pin_mmio()
218 val = readl(ipctl->base + pin_mmio->input_reg); in imx_pmx_set_one_pin_mmio()
221 writel(val, ipctl->base + pin_mmio->input_reg); in imx_pmx_set_one_pin_mmio()
222 } else if (pin_mmio->input_reg) { in imx_pmx_set_one_pin_mmio()
227 if (ipctl->input_sel_base) in imx_pmx_set_one_pin_mmio()
228 writel(pin_mmio->input_val, ipctl->input_sel_base + in imx_pmx_set_one_pin_mmio()
229 pin_mmio->input_reg); in imx_pmx_set_one_pin_mmio()
231 writel(pin_mmio->input_val, ipctl->base + in imx_pmx_set_one_pin_mmio()
232 pin_mmio->input_reg); in imx_pmx_set_one_pin_mmio()
233 dev_dbg(ipctl->dev, in imx_pmx_set_one_pin_mmio()
235 pin_mmio->input_reg, pin_mmio->input_val); in imx_pmx_set_one_pin_mmio()
245 const struct imx_pinctrl_soc_info *info = ipctl->info; in imx_pmx_set()
258 return -EINVAL; in imx_pmx_set()
262 return -EINVAL; in imx_pmx_set()
264 npins = grp->num_pins; in imx_pmx_set()
266 dev_dbg(ipctl->dev, "enable function %s group %s\n", in imx_pmx_set()
267 func->name, grp->name); in imx_pmx_set()
275 pin = &((struct imx_pin *)(grp->data))[i]; in imx_pmx_set()
276 if (!(info->flags & IMX_USE_SCU)) { in imx_pmx_set()
298 const struct imx_pinctrl_soc_info *info = ipctl->info; in imx_pinconf_decode_generic_config()
305 WARN_ON(num_configs > info->num_decodes); in imx_pinconf_decode_generic_config()
310 decode = info->decodes; in imx_pinconf_decode_generic_config()
311 for (j = 0; j < info->num_decodes; j++) { in imx_pinconf_decode_generic_config()
312 if (param == decode->param) { in imx_pinconf_decode_generic_config()
313 if (decode->invert) in imx_pinconf_decode_generic_config()
315 raw_config |= (param_val << decode->shift) in imx_pinconf_decode_generic_config()
316 & decode->mask; in imx_pinconf_decode_generic_config()
323 if (info->fixup) in imx_pinconf_decode_generic_config()
324 info->fixup(configs, num_configs, &raw_config); in imx_pinconf_decode_generic_config()
332 const struct imx_pinctrl_soc_info *info = ipctl->info; in imx_pinconf_parse_generic_config()
333 struct pinctrl_dev *pctl = ipctl->pctl; in imx_pinconf_parse_generic_config() local
338 if (!info->generic_pinconf) in imx_pinconf_parse_generic_config()
341 ret = pinconf_generic_parse_dt_config(np, pctl, &configs, in imx_pinconf_parse_generic_config()
353 const struct imx_pinctrl_soc_info *info = ipctl->info; in imx_pinconf_get_mmio()
354 const struct imx_pin_reg *pin_reg = &ipctl->pin_regs[pin_id]; in imx_pinconf_get_mmio()
356 if (pin_reg->conf_reg == -1) { in imx_pinconf_get_mmio()
357 dev_err(ipctl->dev, "Pin(%s) does not support config function\n", in imx_pinconf_get_mmio()
358 info->pins[pin_id].name); in imx_pinconf_get_mmio()
359 return -EINVAL; in imx_pinconf_get_mmio()
362 *config = readl(ipctl->base + pin_reg->conf_reg); in imx_pinconf_get_mmio()
364 if (info->flags & SHARE_MUX_CONF_REG) in imx_pinconf_get_mmio()
365 *config &= ~info->mux_mask; in imx_pinconf_get_mmio()
374 const struct imx_pinctrl_soc_info *info = ipctl->info; in imx_pinconf_get()
376 if (info->flags & IMX_USE_SCU) in imx_pinconf_get()
377 return info->imx_pinconf_get(pctldev, pin_id, config); in imx_pinconf_get()
387 const struct imx_pinctrl_soc_info *info = ipctl->info; in imx_pinconf_set_mmio()
388 const struct imx_pin_reg *pin_reg = &ipctl->pin_regs[pin_id]; in imx_pinconf_set_mmio()
391 if (pin_reg->conf_reg == -1) { in imx_pinconf_set_mmio()
392 dev_err(ipctl->dev, "Pin(%s) does not support config function\n", in imx_pinconf_set_mmio()
393 info->pins[pin_id].name); in imx_pinconf_set_mmio()
394 return -EINVAL; in imx_pinconf_set_mmio()
397 dev_dbg(ipctl->dev, "pinconf set pin %s\n", in imx_pinconf_set_mmio()
398 info->pins[pin_id].name); in imx_pinconf_set_mmio()
401 if (info->flags & SHARE_MUX_CONF_REG) { in imx_pinconf_set_mmio()
403 reg = readl(ipctl->base + pin_reg->conf_reg); in imx_pinconf_set_mmio()
404 reg &= info->mux_mask; in imx_pinconf_set_mmio()
406 writel(reg, ipctl->base + pin_reg->conf_reg); in imx_pinconf_set_mmio()
407 dev_dbg(ipctl->dev, "write: offset 0x%x val 0x%x\n", in imx_pinconf_set_mmio()
408 pin_reg->conf_reg, reg); in imx_pinconf_set_mmio()
410 writel(configs[i], ipctl->base + pin_reg->conf_reg); in imx_pinconf_set_mmio()
411 dev_dbg(ipctl->dev, "write: offset 0x%x val 0x%lx\n", in imx_pinconf_set_mmio()
412 pin_reg->conf_reg, configs[i]); in imx_pinconf_set_mmio()
424 const struct imx_pinctrl_soc_info *info = ipctl->info; in imx_pinconf_set()
426 if (info->flags & IMX_USE_SCU) in imx_pinconf_set()
427 return info->imx_pinconf_set(pctldev, pin_id, in imx_pinconf_set()
438 const struct imx_pinctrl_soc_info *info = ipctl->info; in imx_pinconf_dbg_show()
443 if (info->flags & IMX_USE_SCU) { in imx_pinconf_dbg_show()
444 ret = info->imx_pinconf_get(pctldev, pin_id, &config); in imx_pinconf_dbg_show()
446 dev_err(ipctl->dev, "failed to get %s pinconf\n", in imx_pinconf_dbg_show()
452 pin_reg = &ipctl->pin_regs[pin_id]; in imx_pinconf_dbg_show()
453 if (pin_reg->conf_reg == -1) { in imx_pinconf_dbg_show()
458 config = readl(ipctl->base + pin_reg->conf_reg); in imx_pinconf_dbg_show()
472 if (group >= pctldev->num_groups) in imx_pinconf_group_dbg_show()
480 for (i = 0; i < grp->num_pins; i++) { in imx_pinconf_group_dbg_show()
481 struct imx_pin *pin = &((struct imx_pin *)(grp->data))[i]; in imx_pinconf_group_dbg_show()
483 name = pin_get_name(pctldev, pin->pin); in imx_pinconf_group_dbg_show()
484 ret = imx_pinconf_get(pctldev, pin->pin, &config); in imx_pinconf_group_dbg_show()
520 const struct imx_pinctrl_soc_info *info = ipctl->info; in imx_pinctrl_parse_pin_mmio()
521 struct imx_pin_mmio *pin_mmio = &pin->conf.mmio; in imx_pinctrl_parse_pin_mmio()
529 if (!(info->flags & ZERO_OFFSET_VALID) && !mux_reg) in imx_pinctrl_parse_pin_mmio()
530 mux_reg = -1; in imx_pinctrl_parse_pin_mmio()
532 if (info->flags & SHARE_MUX_CONF_REG) { in imx_pinctrl_parse_pin_mmio()
537 conf_reg = -1; in imx_pinctrl_parse_pin_mmio()
540 *pin_id = (mux_reg != -1) ? mux_reg / 4 : conf_reg / 4; in imx_pinctrl_parse_pin_mmio()
541 pin_reg = &ipctl->pin_regs[*pin_id]; in imx_pinctrl_parse_pin_mmio()
542 pin->pin = *pin_id; in imx_pinctrl_parse_pin_mmio()
543 pin_reg->mux_reg = mux_reg; in imx_pinctrl_parse_pin_mmio()
544 pin_reg->conf_reg = conf_reg; in imx_pinctrl_parse_pin_mmio()
545 pin_mmio->input_reg = be32_to_cpu(*list++); in imx_pinctrl_parse_pin_mmio()
546 pin_mmio->mux_mode = be32_to_cpu(*list++); in imx_pinctrl_parse_pin_mmio()
547 pin_mmio->input_val = be32_to_cpu(*list++); in imx_pinctrl_parse_pin_mmio()
549 if (info->generic_pinconf) { in imx_pinctrl_parse_pin_mmio()
551 pin_mmio->config = imx_pinconf_parse_generic_config(np, ipctl); in imx_pinctrl_parse_pin_mmio()
558 pin_mmio->mux_mode |= IOMUXC_CONFIG_SION; in imx_pinctrl_parse_pin_mmio()
559 pin_mmio->config = config & ~IMX_PAD_SION; in imx_pinctrl_parse_pin_mmio()
564 dev_dbg(ipctl->dev, "%s: 0x%x 0x%08lx", info->pins[*pin_id].name, in imx_pinctrl_parse_pin_mmio()
565 pin_mmio->mux_mode, pin_mmio->config); in imx_pinctrl_parse_pin_mmio()
573 const struct imx_pinctrl_soc_info *info = ipctl->info; in imx_pinctrl_parse_groups()
579 dev_dbg(ipctl->dev, "group(%d): %pOFn\n", index, np); in imx_pinctrl_parse_groups()
581 if (info->flags & IMX_USE_SCU) in imx_pinctrl_parse_groups()
583 else if (info->flags & SHARE_MUX_CONF_REG) in imx_pinctrl_parse_groups()
588 if (info->generic_pinconf) in imx_pinctrl_parse_groups()
589 pin_size -= 4; in imx_pinctrl_parse_groups()
592 grp->name = np->name; in imx_pinctrl_parse_groups()
608 dev_err(ipctl->dev, in imx_pinctrl_parse_groups()
610 return -EINVAL; in imx_pinctrl_parse_groups()
616 dev_err(ipctl->dev, "Invalid fsl,pins or pins property in node %pOF\n", np); in imx_pinctrl_parse_groups()
617 return -EINVAL; in imx_pinctrl_parse_groups()
620 grp->num_pins = size / pin_size; in imx_pinctrl_parse_groups()
621 grp->data = devm_kcalloc(ipctl->dev, in imx_pinctrl_parse_groups()
622 grp->num_pins, sizeof(struct imx_pin), in imx_pinctrl_parse_groups()
624 grp->pins = devm_kcalloc(ipctl->dev, in imx_pinctrl_parse_groups()
625 grp->num_pins, sizeof(unsigned int), in imx_pinctrl_parse_groups()
627 if (!grp->pins || !grp->data) in imx_pinctrl_parse_groups()
628 return -ENOMEM; in imx_pinctrl_parse_groups()
630 for (i = 0; i < grp->num_pins; i++) { in imx_pinctrl_parse_groups()
631 pin = &((struct imx_pin *)(grp->data))[i]; in imx_pinctrl_parse_groups()
632 if (info->flags & IMX_USE_SCU) in imx_pinctrl_parse_groups()
633 info->imx_pinctrl_parse_pin(ipctl, &grp->pins[i], in imx_pinctrl_parse_groups()
636 imx_pinctrl_parse_pin_mmio(ipctl, &grp->pins[i], in imx_pinctrl_parse_groups()
647 struct pinctrl_dev *pctl = ipctl->pctl; in imx_pinctrl_parse_functions() local
654 dev_dbg(pctl->dev, "parse function(%d): %pOFn\n", index, np); in imx_pinctrl_parse_functions()
656 func = pinmux_generic_get_function(pctl, index); in imx_pinctrl_parse_functions()
658 return -EINVAL; in imx_pinctrl_parse_functions()
661 func->name = np->name; in imx_pinctrl_parse_functions()
662 func->num_group_names = of_get_child_count(np); in imx_pinctrl_parse_functions()
663 if (func->num_group_names == 0) { in imx_pinctrl_parse_functions()
664 dev_info(ipctl->dev, "no groups defined in %pOF\n", np); in imx_pinctrl_parse_functions()
665 return -EINVAL; in imx_pinctrl_parse_functions()
668 group_names = devm_kcalloc(ipctl->dev, func->num_group_names, in imx_pinctrl_parse_functions()
671 return -ENOMEM; in imx_pinctrl_parse_functions()
674 group_names[i++] = child->name; in imx_pinctrl_parse_functions()
675 func->group_names = group_names; in imx_pinctrl_parse_functions()
679 grp = devm_kzalloc(ipctl->dev, sizeof(struct group_desc), in imx_pinctrl_parse_functions()
683 return -ENOMEM; in imx_pinctrl_parse_functions()
686 mutex_lock(&ipctl->mutex); in imx_pinctrl_parse_functions()
687 radix_tree_insert(&pctl->pin_group_tree, in imx_pinctrl_parse_functions()
688 ipctl->group_index++, grp); in imx_pinctrl_parse_functions()
689 mutex_unlock(&ipctl->mutex); in imx_pinctrl_parse_functions()
728 struct device_node *np = pdev->dev.of_node; in imx_pinctrl_probe_dt()
730 struct pinctrl_dev *pctl = ipctl->pctl; in imx_pinctrl_probe_dt() local
736 return -ENODEV; in imx_pinctrl_probe_dt()
744 dev_err(&pdev->dev, "no functions defined\n"); in imx_pinctrl_probe_dt()
745 return -EINVAL; in imx_pinctrl_probe_dt()
752 function = devm_kzalloc(&pdev->dev, sizeof(*function), in imx_pinctrl_probe_dt()
755 return -ENOMEM; in imx_pinctrl_probe_dt()
757 mutex_lock(&ipctl->mutex); in imx_pinctrl_probe_dt()
758 radix_tree_insert(&pctl->pin_function_tree, i, function); in imx_pinctrl_probe_dt()
759 mutex_unlock(&ipctl->mutex); in imx_pinctrl_probe_dt()
761 pctl->num_functions = nfuncs; in imx_pinctrl_probe_dt()
763 ipctl->group_index = 0; in imx_pinctrl_probe_dt()
765 pctl->num_groups = of_get_child_count(np); in imx_pinctrl_probe_dt()
767 pctl->num_groups = 0; in imx_pinctrl_probe_dt()
769 pctl->num_groups += of_get_child_count(child); in imx_pinctrl_probe_dt()
787 struct device_node *dev_np = pdev->dev.of_node; in imx_pinctrl_probe()
791 struct regmap *gpr; in imx_pinctrl_probe()
794 if (!info || !info->pins || !info->npins) { in imx_pinctrl_probe()
795 dev_err(&pdev->dev, "wrong pinctrl info\n"); in imx_pinctrl_probe()
796 return -EINVAL; in imx_pinctrl_probe()
799 if (info->gpr_compatible) { in imx_pinctrl_probe()
800 gpr = syscon_regmap_lookup_by_compatible(info->gpr_compatible); in imx_pinctrl_probe()
802 regmap_attach_dev(&pdev->dev, gpr, &config); in imx_pinctrl_probe()
806 ipctl = devm_kzalloc(&pdev->dev, sizeof(*ipctl), GFP_KERNEL); in imx_pinctrl_probe()
808 return -ENOMEM; in imx_pinctrl_probe()
810 if (!(info->flags & IMX_USE_SCU)) { in imx_pinctrl_probe()
811 ipctl->pin_regs = devm_kmalloc_array(&pdev->dev, info->npins, in imx_pinctrl_probe()
812 sizeof(*ipctl->pin_regs), in imx_pinctrl_probe()
814 if (!ipctl->pin_regs) in imx_pinctrl_probe()
815 return -ENOMEM; in imx_pinctrl_probe()
817 for (i = 0; i < info->npins; i++) { in imx_pinctrl_probe()
818 ipctl->pin_regs[i].mux_reg = -1; in imx_pinctrl_probe()
819 ipctl->pin_regs[i].conf_reg = -1; in imx_pinctrl_probe()
822 ipctl->base = devm_platform_ioremap_resource(pdev, 0); in imx_pinctrl_probe()
823 if (IS_ERR(ipctl->base)) in imx_pinctrl_probe()
824 return PTR_ERR(ipctl->base); in imx_pinctrl_probe()
826 if (of_property_read_bool(dev_np, "fsl,input-sel")) { in imx_pinctrl_probe()
827 np = of_parse_phandle(dev_np, "fsl,input-sel", 0); in imx_pinctrl_probe()
829 dev_err(&pdev->dev, "iomuxc fsl,input-sel property not found\n"); in imx_pinctrl_probe()
830 return -EINVAL; in imx_pinctrl_probe()
833 ipctl->input_sel_base = of_iomap(np, 0); in imx_pinctrl_probe()
835 if (!ipctl->input_sel_base) { in imx_pinctrl_probe()
836 dev_err(&pdev->dev, in imx_pinctrl_probe()
838 return -ENOMEM; in imx_pinctrl_probe()
843 imx_pinctrl_desc = devm_kzalloc(&pdev->dev, sizeof(*imx_pinctrl_desc), in imx_pinctrl_probe()
846 return -ENOMEM; in imx_pinctrl_probe()
848 imx_pinctrl_desc->name = dev_name(&pdev->dev); in imx_pinctrl_probe()
849 imx_pinctrl_desc->pins = info->pins; in imx_pinctrl_probe()
850 imx_pinctrl_desc->npins = info->npins; in imx_pinctrl_probe()
851 imx_pinctrl_desc->pctlops = &imx_pctrl_ops; in imx_pinctrl_probe()
852 imx_pinctrl_desc->pmxops = &imx_pmx_ops; in imx_pinctrl_probe()
853 imx_pinctrl_desc->confops = &imx_pinconf_ops; in imx_pinctrl_probe()
854 imx_pinctrl_desc->owner = THIS_MODULE; in imx_pinctrl_probe()
857 imx_pinctrl_desc->custom_params = info->custom_params; in imx_pinctrl_probe()
858 imx_pinctrl_desc->num_custom_params = info->num_custom_params; in imx_pinctrl_probe()
861 imx_pmx_ops.gpio_set_direction = info->gpio_set_direction; in imx_pinctrl_probe()
863 mutex_init(&ipctl->mutex); in imx_pinctrl_probe()
865 ipctl->info = info; in imx_pinctrl_probe()
866 ipctl->dev = &pdev->dev; in imx_pinctrl_probe()
868 ret = devm_pinctrl_register_and_init(&pdev->dev, in imx_pinctrl_probe()
870 &ipctl->pctl); in imx_pinctrl_probe()
872 dev_err(&pdev->dev, "could not register IMX pinctrl driver\n"); in imx_pinctrl_probe()
878 dev_err(&pdev->dev, "fail to probe dt properties\n"); in imx_pinctrl_probe()
882 dev_info(&pdev->dev, "initialized IMX pinctrl driver\n"); in imx_pinctrl_probe()
884 return pinctrl_enable(ipctl->pctl); in imx_pinctrl_probe()
892 return pinctrl_force_sleep(ipctl->pctl); in imx_pinctrl_suspend()
899 return pinctrl_force_default(ipctl->pctl); in imx_pinctrl_resume()