1 // SPDX-License-Identifier: GPL-2.0-or-later
11 #include "pinctrl-aspeed.h"
17 	return pdata->pinmux.ngroups;  in aspeed_pinctrl_get_groups_count()
25 	return pdata->pinmux.groups[group].name;  in aspeed_pinctrl_get_group_name()
34 	*pins = &pdata->pinmux.groups[group].pins[0];  in aspeed_pinctrl_get_group_pins()
35 	*npins = pdata->pinmux.groups[group].npins;  in aspeed_pinctrl_get_group_pins()
43 	seq_printf(s, " %s", dev_name(pctldev->dev));  in aspeed_pinctrl_pin_dbg_show()
50 	return pdata->pinmux.nfunctions;  in aspeed_pinmux_get_fn_count()
58 	return pdata->pinmux.functions[function].name;  in aspeed_pinmux_get_fn_name()
68 	*groups = pdata->pinmux.functions[function].groups;  in aspeed_pinmux_get_fn_groups()
69 	*num_groups = pdata->pinmux.functions[function].ngroups;  in aspeed_pinmux_get_fn_groups()
79 	pr_debug("Enabling signal %s for %s\n", expr->signal,  in aspeed_sig_expr_enable()
80 		 expr->function);  in aspeed_sig_expr_enable()
95 	pr_debug("Disabling signal %s for %s\n", expr->signal,  in aspeed_sig_expr_disable()
96 		 expr->function);  in aspeed_sig_expr_disable()
102  * aspeed_disable_sig() - Disable a signal on a pin by disabling all provided
127  * aspeed_find_expr_by_name - Search for the signal expression needed to
141 		if (strcmp((*exprs)->function, name) == 0)  in aspeed_find_expr_by_name()
157 	prios = pdesc->prios;  in get_defined_attribute()
188 	found[len - 2] = '\0';  in get_defined_attribute()
195 	return expr->function;  in aspeed_sig_expr_function()
205 	return expr->signal;  in aspeed_sig_expr_signal()
219 	const struct aspeed_pin_group *pgroup = &pdata->pinmux.groups[group];  in aspeed_pinmux_set_mux()
221 		&pdata->pinmux.functions[function];  in aspeed_pinmux_set_mux()
223 	for (i = 0; i < pgroup->npins; i++) {  in aspeed_pinmux_set_mux()
224 		int pin = pgroup->pins[i];  in aspeed_pinmux_set_mux()
225 		const struct aspeed_pin_desc *pdesc = pdata->pins[pin].drv_data;  in aspeed_pinmux_set_mux()
231 			return -EINVAL;  in aspeed_pinmux_set_mux()
233 		pr_debug("Muxing pin %s for %s\n", pdesc->name, pfunc->name);  in aspeed_pinmux_set_mux()
235 		prios = pdesc->prios;  in aspeed_pinmux_set_mux()
242 			expr = aspeed_find_expr_by_name(funcs, pfunc->name);  in aspeed_pinmux_set_mux()
247 			ret = aspeed_disable_sig(&pdata->pinmux, funcs);  in aspeed_pinmux_set_mux()
259 				pfunc->name, pdesc->name, pin, signals,  in aspeed_pinmux_set_mux()
264 			return -ENXIO;  in aspeed_pinmux_set_mux()
267 		ret = aspeed_sig_expr_enable(&pdata->pinmux, expr);  in aspeed_pinmux_set_mux()
271 		pr_debug("Muxed pin %s as %s for %s\n", pdesc->name, expr->signal,  in aspeed_pinmux_set_mux()
272 			 expr->function);  in aspeed_pinmux_set_mux()
281 	 * We need to differentiate between GPIO and non-GPIO signals to  in aspeed_expr_is_gpio()
286 	 * Generally we have the following - A GPIO such as B1 has:  in aspeed_expr_is_gpio()
288 	 *    - expr->signal set to "GPIOB1"  in aspeed_expr_is_gpio()
289 	 *    - expr->function set to "GPIOB1"  in aspeed_expr_is_gpio()
295 	 * However, some GPIOs are input-only, and the ASPEED datasheets name  in aspeed_expr_is_gpio()
296 	 * them differently. An input-only GPIO such as T0 has:  in aspeed_expr_is_gpio()
298 	 *    - expr->signal set to "GPIT0"  in aspeed_expr_is_gpio()
299 	 *    - expr->function set to "GPIT0"  in aspeed_expr_is_gpio()
301 	 * It's tempting to generalise the prefix test from "GPIO" to "GPI" to  in aspeed_expr_is_gpio()
305 	 * Some pins in the ASPEED BMC SoCs have a "pass-through" GPIO  in aspeed_expr_is_gpio()
307 	 * output state of another (as if they were shorted together - a mux  in aspeed_expr_is_gpio()
312 	 * separate, pin-specific GPIO.  in aspeed_expr_is_gpio()
314 	 * Conceptually this pass-through mode is a form of GPIO and is named  in aspeed_expr_is_gpio()
316 	 * trips us up with the simple GPI-prefixed-signal-name scheme  in aspeed_expr_is_gpio()
317 	 * discussed above, as the pass-through configuration is not what we  in aspeed_expr_is_gpio()
320 	 * On e.g. the AST2400, a pass-through function "GPID0" is grouped on  in aspeed_expr_is_gpio()
324 	 *    - expr->signal set to "GPID0IN"  in aspeed_expr_is_gpio()
325 	 *    - expr->function set to "GPID0"  in aspeed_expr_is_gpio()
328 	 *    - expr->signal set to "GPID0OUT"  in aspeed_expr_is_gpio()
329 	 *    - expr->function set to "GPID0"  in aspeed_expr_is_gpio()
331 	 * By contrast, the pin-specific GPIO expressions for the same pins are  in aspeed_expr_is_gpio()
335 	 *    - expr->signal looks like "GPIOD0"  in aspeed_expr_is_gpio()
336 	 *    - expr->function looks like "GPIOD0"  in aspeed_expr_is_gpio()
339 	 *    - expr->signal looks like "GPIOD1"  in aspeed_expr_is_gpio()
340 	 *    - expr->function looks like "GPIOD1"  in aspeed_expr_is_gpio()
343 	 * differentiate the pass-through GPIO pinmux configuration from the  in aspeed_expr_is_gpio()
344 	 * pin-specific configuration that the GPIO subsystem is after: An  in aspeed_expr_is_gpio()
345 	 * expression is a pin-specific (non-pass-through) GPIO configuration  in aspeed_expr_is_gpio()
346 	 * if the signal prefix is "GPI" and the signal name matches the  in aspeed_expr_is_gpio()
349 	return !strncmp(expr->signal, "GPI", 3) &&  in aspeed_expr_is_gpio()
350 			!strcmp(expr->signal, expr->function);  in aspeed_expr_is_gpio()
373 	const struct aspeed_pin_desc *pdesc = pdata->pins[offset].drv_data;  in aspeed_gpio_request_enable()
377 		return -EINVAL;  in aspeed_gpio_request_enable()
379 	prios = pdesc->prios;  in aspeed_gpio_request_enable()
382 		return -ENXIO;  in aspeed_gpio_request_enable()
384 	pr_debug("Muxing pin %s for GPIO\n", pdesc->name);  in aspeed_gpio_request_enable()
391 		ret = aspeed_disable_sig(&pdata->pinmux, funcs);  in aspeed_gpio_request_enable()
402 			pdesc->name, offset, signals);  in aspeed_gpio_request_enable()
405 		return -ENXIO;  in aspeed_gpio_request_enable()
411 	 * Disabling all higher-priority expressions is enough to enable the  in aspeed_gpio_request_enable()
412 	 * lowest-priority signal type. As such it has no associated  in aspeed_gpio_request_enable()
416 		pr_debug("Muxed pin %s as GPIO\n", pdesc->name);  in aspeed_gpio_request_enable()
424 	ret = aspeed_sig_expr_enable(&pdata->pinmux, expr);  in aspeed_gpio_request_enable()
428 	pr_debug("Muxed pin %s as %s\n", pdesc->name, expr->signal);  in aspeed_gpio_request_enable()
440 	parent = pdev->dev.parent;  in aspeed_pinctrl_probe()
442 		dev_err(&pdev->dev, "No parent for syscon pincontroller\n");  in aspeed_pinctrl_probe()
443 		return -ENODEV;  in aspeed_pinctrl_probe()
446 	pdata->scu = syscon_node_to_regmap(parent->of_node);  in aspeed_pinctrl_probe()
447 	if (IS_ERR(pdata->scu)) {  in aspeed_pinctrl_probe()
448 		dev_err(&pdev->dev, "No regmap for syscon pincontroller parent\n");  in aspeed_pinctrl_probe()
449 		return PTR_ERR(pdata->scu);  in aspeed_pinctrl_probe()
452 	pdata->pinmux.maps[ASPEED_IP_SCU] = pdata->scu;  in aspeed_pinctrl_probe()
454 	pctl = pinctrl_register(pdesc, &pdev->dev, pdata);  in aspeed_pinctrl_probe()
457 		dev_err(&pdev->dev, "Failed to register pinctrl\n");  in aspeed_pinctrl_probe()
467 		const struct aspeed_pin_config *config)  in pin_in_config_range()  argument
469 	return offset >= config->pins[0] && offset <= config->pins[1];  in pin_in_config_range()
479 	for (i = 0; i < pdata->nconfigs; i++) {  in find_pinconf_config()
480 		if (param == pdata->configs[i].param &&  in find_pinconf_config()
481 				pin_in_config_range(offset, &pdata->configs[i]))  in find_pinconf_config()
482 			return &pdata->configs[i];  in find_pinconf_config()
498 	for (i = 0; i < pdata->nconfmaps; i++) {  in find_pinconf_map()
502 		elem = &pdata->confmaps[i];  in find_pinconf_map()
506 			match = (elem->arg == -1 || elem->arg == value);  in find_pinconf_map()
509 			match = (elem->val == value);  in find_pinconf_map()
513 		if (param == elem->param && match)  in find_pinconf_map()
521 		unsigned long *config)  in aspeed_pin_config_get()  argument
523 	const enum pin_config_param param = pinconf_to_config_param(*config);  in aspeed_pin_config_get()
534 		return -ENOTSUPP;  in aspeed_pin_config_get()
536 	rc = regmap_read(pdata->scu, pconf->reg, &val);  in aspeed_pin_config_get()
541 			(val & pconf->mask) >> __ffs(pconf->mask));  in aspeed_pin_config_get()
544 		return -EINVAL;  in aspeed_pin_config_get()
547 		arg = (u32) pmap->arg;  in aspeed_pin_config_get()
549 		arg = !!pmap->arg;  in aspeed_pin_config_get()
554 		return -EINVAL;  in aspeed_pin_config_get()
556 	*config = pinconf_to_config_packed(param, arg);  in aspeed_pin_config_get()
582 			return -ENOTSUPP;  in aspeed_pin_config_set()
587 			return -EINVAL;  in aspeed_pin_config_set()
589 		val = pmap->val << __ffs(pconf->mask);  in aspeed_pin_config_set()
591 		rc = regmap_update_bits(pdata->scu, pconf->reg,  in aspeed_pin_config_set()
592 					pconf->mask, val);  in aspeed_pin_config_set()
598 				__func__, pconf->reg, pconf->mask,  in aspeed_pin_config_set()
607 		unsigned long *config)  in aspeed_pin_config_group_get()  argument
618 		return -ENODEV;  in aspeed_pin_config_group_get()
620 	rc = aspeed_pin_config_get(pctldev, pins[0], config);  in aspeed_pin_config_group_get()