Lines Matching refs:SCU90
49 #define SCU90 0x90 /* Multi-function Pin Control #5 */ macro
59 #define COND1 { ASPEED_IP_SCU, SCU90, BIT(6), 0, 0 }
82 #define I2C9_DESC SIG_DESC_SET(SCU90, 22)
100 #define MDIO2_DESC SIG_DESC_SET(SCU90, 2)
147 #define SD1_DESC SIG_DESC_SET(SCU90, 0)
150 #define I2C10_DESC SIG_DESC_SET(SCU90, 23)
163 #define I2C11_DESC SIG_DESC_SET(SCU90, 24)
176 #define I2C12_DESC SIG_DESC_SET(SCU90, 25)
189 #define I2C13_DESC SIG_DESC_SET(SCU90, 26)
202 #define SD2_DESC SIG_DESC_SET(SCU90, 1)
360 #define LPCPLUS_DESC SIG_DESC_SET(SCU90, 30)
473 #define UART6_DESC SIG_DESC_SET(SCU90, 7)
643 #define I2C5_DESC SIG_DESC_SET(SCU90, 18)
655 #define I2C6_DESC SIG_DESC_SET(SCU90, 19)
667 #define I2C7_DESC SIG_DESC_SET(SCU90, 20)
679 #define I2C8_DESC SIG_DESC_SET(SCU90, 21)
694 #define VPIOFF0_DESC { ASPEED_IP_SCU, SCU90, GENMASK(5, 4), 0, 0 }
695 #define VPIOFF1_DESC { ASPEED_IP_SCU, SCU90, GENMASK(5, 4), 1, 0 }
696 #define VPI24_DESC { ASPEED_IP_SCU, SCU90, GENMASK(5, 4), 2, 0 }
697 #define VPIRSVD_DESC { ASPEED_IP_SCU, SCU90, GENMASK(5, 4), 3, 0 }
698 #define VPI_24_RSVD_DESC SIG_DESC_SET(SCU90, 5)
934 SIG_EXPR_LIST_DECL_SINGLE(Y6, DASHY6, DASHY6, SIG_DESC_SET(SCU90, 28),
939 SIG_EXPR_LIST_DECL_SINGLE(Y5, DASHY5, DASHY5, SIG_DESC_SET(SCU90, 28),
944 SIG_EXPR_LIST_DECL_SINGLE(W6, DASHW6, DASHW6, SIG_DESC_SET(SCU90, 28),
949 SIG_EXPR_LIST_DECL_SINGLE(V6, DASHV6, DASHV6, SIG_DESC_SET(SCU90, 28),
953 #define I2C3_DESC SIG_DESC_SET(SCU90, 16)
965 #define I2C4_DESC SIG_DESC_SET(SCU90, 17)
977 #define I2C14_DESC SIG_DESC_SET(SCU90, 27)
1457 #define PNOR_DESC SIG_DESC_SET(SCU90, 31)
1855 SIG_EXPR_LIST_DECL_SINGLE(A7, USB2AHDP, USB2AH, SIG_DESC_SET(SCU90, 29));
1856 SIG_EXPR_LIST_DECL_SINGLE(A7, USB2ADDP, USB2AD, SIG_DESC_BIT(SCU90, 29, 0));
1860 SIG_EXPR_LIST_DECL_SINGLE(A8, USB2AHDN, USB2AH, SIG_DESC_SET(SCU90, 29));
1861 SIG_EXPR_LIST_DECL_SINGLE(A8, USB2ADDN, USB2AD, SIG_DESC_BIT(SCU90, 29, 0));
2545 ASPEED_SB_PINCONF(PIN_CONFIG_DRIVE_STRENGTH, B5, B5, SCU90, 8),
2546 ASPEED_SB_PINCONF(PIN_CONFIG_DRIVE_STRENGTH, E9, A5, SCU90, 9),
2547 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, B5, D7, SCU90, 12),
2548 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, B5, D7, SCU90, 12),
2551 ASPEED_SB_PINCONF(PIN_CONFIG_DRIVE_STRENGTH, B2, B2, SCU90, 10),
2552 ASPEED_SB_PINCONF(PIN_CONFIG_DRIVE_STRENGTH, B1, B3, SCU90, 11),
2553 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, B2, D4, SCU90, 14),
2554 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, B2, D4, SCU90, 14),
2557 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, B4, C4, SCU90, 13),
2558 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, B4, C4, SCU90, 13),
2561 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, C2, E6, SCU90, 15),
2562 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, C2, E6, SCU90, 15),