293 static inline void ti_pipe3_writel(void __iomem *addr, unsigned offset,  in ti_pipe3_writel()  function
415 	ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION1, val);  in ti_pipe3_dpll_program()
420 	ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION2, val);  in ti_pipe3_dpll_program()
425 	ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION1, val);  in ti_pipe3_dpll_program()
430 	ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION4, val);  in ti_pipe3_dpll_program()
435 	ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION3, val);  in ti_pipe3_dpll_program()
437 	ti_pipe3_writel(phy->pll_ctrl_base, PLL_GO, SET_PLL_GO);  in ti_pipe3_dpll_program()
450 	ti_pipe3_writel(phy->phy_rx, PIPE3_PHY_RX_ANA_PROGRAMMABILITY, val);  in ti_pipe3_calibrate()
465 	ti_pipe3_writel(phy->phy_rx, PIPE3_PHY_RX_DIGITAL_MODES, val);  in ti_pipe3_calibrate()
470 	ti_pipe3_writel(phy->phy_rx, PIPE3_PHY_RX_TRIM, val);  in ti_pipe3_calibrate()
475 	ti_pipe3_writel(phy->phy_rx, PIPE3_PHY_RX_DLL, val);  in ti_pipe3_calibrate()
485 	ti_pipe3_writel(phy->phy_rx, PIPE3_PHY_RX_EQUALIZER, val);  in ti_pipe3_calibrate()
491 		ti_pipe3_writel(phy->phy_rx, SATA_PHY_RX_IO_AND_A2D_OVERRIDES,  in ti_pipe3_calibrate()
524 		ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION2, val);  in ti_pipe3_init()
562 		ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION2, val);  in ti_pipe3_exit()