25 #include "phy-qcom-qmp.h"
1353 	/* QMP PHY pipe clock interface rate */
1370  * @qmp: QMP phy to which this lane belongs
1383 	struct qcom_qmp *qmp;  member
1387  * struct qcom_qmp - structure holding QMP phy block attributes
1869 	struct qcom_qmp *qmp = qphy->qmp;  in qmp_pcie_init()  local
1875 	ret = regulator_bulk_enable(cfg->num_vregs, qmp->vregs);  in qmp_pcie_init()
1877 		dev_err(qmp->dev, "failed to enable regulators, err=%d\n", ret);  in qmp_pcie_init()
1881 	ret = reset_control_bulk_assert(cfg->num_resets, qmp->resets);  in qmp_pcie_init()
1883 		dev_err(qmp->dev, "reset assert failed\n");  in qmp_pcie_init()
1887 	ret = reset_control_bulk_deassert(cfg->num_resets, qmp->resets);  in qmp_pcie_init()
1889 		dev_err(qmp->dev, "reset deassert failed\n");  in qmp_pcie_init()
1893 	ret = clk_bulk_prepare_enable(cfg->num_clks, qmp->clks);  in qmp_pcie_init()
1908 	reset_control_bulk_assert(cfg->num_resets, qmp->resets);  in qmp_pcie_init()
1910 	regulator_bulk_disable(cfg->num_vregs, qmp->vregs);  in qmp_pcie_init()
1918 	struct qcom_qmp *qmp = qphy->qmp;  in qmp_pcie_exit()  local
1921 	reset_control_bulk_assert(cfg->num_resets, qmp->resets);  in qmp_pcie_exit()
1923 	clk_bulk_disable_unprepare(cfg->num_clks, qmp->clks);  in qmp_pcie_exit()
1925 	regulator_bulk_disable(cfg->num_vregs, qmp->vregs);  in qmp_pcie_exit()
1933 	struct qcom_qmp *qmp = qphy->qmp;  in qmp_pcie_power_on()  local
1947 		dev_err(qmp->dev, "pipe_clk enable failed err=%d\n", ret);  in qmp_pcie_power_on()
2000 		dev_err(qmp->dev, "phy initialization timed-out\n");  in qmp_pcie_power_on()
2065 	struct qcom_qmp *qmp = dev_get_drvdata(dev);  in qmp_pcie_vreg_init()  local
2069 	qmp->vregs = devm_kcalloc(dev, num, sizeof(*qmp->vregs), GFP_KERNEL);  in qmp_pcie_vreg_init()
2070 	if (!qmp->vregs)  in qmp_pcie_vreg_init()
2074 		qmp->vregs[i].supply = cfg->vreg_list[i];  in qmp_pcie_vreg_init()
2076 	return devm_regulator_bulk_get(dev, num, qmp->vregs);  in qmp_pcie_vreg_init()
2081 	struct qcom_qmp *qmp = dev_get_drvdata(dev);  in qmp_pcie_reset_init()  local
2085 	qmp->resets = devm_kcalloc(dev, cfg->num_resets,  in qmp_pcie_reset_init()
2086 				   sizeof(*qmp->resets), GFP_KERNEL);  in qmp_pcie_reset_init()
2087 	if (!qmp->resets)  in qmp_pcie_reset_init()
2091 		qmp->resets[i].id = cfg->reset_list[i];  in qmp_pcie_reset_init()
2093 	ret = devm_reset_control_bulk_get_exclusive(dev, cfg->num_resets, qmp->resets);  in qmp_pcie_reset_init()
2102 	struct qcom_qmp *qmp = dev_get_drvdata(dev);  in qmp_pcie_clk_init()  local
2106 	qmp->clks = devm_kcalloc(dev, num, sizeof(*qmp->clks), GFP_KERNEL);  in qmp_pcie_clk_init()
2107 	if (!qmp->clks)  in qmp_pcie_clk_init()
2111 		qmp->clks[i].id = cfg->clk_list[i];  in qmp_pcie_clk_init()
2113 	return devm_clk_bulk_get(dev, num, qmp->clks);  in qmp_pcie_clk_init()
2139 static int phy_pipe_clk_register(struct qcom_qmp *qmp, struct device_node *np)  in phy_pipe_clk_register()  argument
2147 		dev_err(qmp->dev, "%pOFn: No clock-output-names\n", np);  in phy_pipe_clk_register()
2151 	fixed = devm_kzalloc(qmp->dev, sizeof(*fixed), GFP_KERNEL);  in phy_pipe_clk_register()
2158 	 * Controllers using QMP PHY-s use 125MHz pipe clock interface  in phy_pipe_clk_register()
2161 	if (qmp->phys[0]->cfg->pipe_clock_rate)  in phy_pipe_clk_register()
2162 		fixed->fixed_rate = qmp->phys[0]->cfg->pipe_clock_rate;  in phy_pipe_clk_register()
2168 	ret = devm_clk_hw_register(qmp->dev, &fixed->hw);  in phy_pipe_clk_register()
2180 	return devm_add_action_or_reset(qmp->dev, phy_clk_release_provider, np);  in phy_pipe_clk_register()
2192 	struct qcom_qmp *qmp = dev_get_drvdata(dev);  in qmp_pcie_create()  local
2239 	    of_device_is_compatible(dev->of_node, "qcom,ipq6018-qmp-pcie-phy"))  in qmp_pcie_create()
2261 	qphy->qmp = qmp;  in qmp_pcie_create()
2262 	qmp->phys[id] = qphy;  in qmp_pcie_create()
2270 		.compatible = "qcom,msm8998-qmp-pcie-phy",
2273 		.compatible = "qcom,ipq8074-qmp-pcie-phy",
2276 		.compatible = "qcom,ipq8074-qmp-gen3-pcie-phy",
2279 		.compatible = "qcom,ipq6018-qmp-pcie-phy",
2282 		.compatible = "qcom,sc8180x-qmp-pcie-phy",
2288 		.compatible = "qcom,sdm845-qmp-pcie-phy",
2291 		.compatible = "qcom,sm8250-qmp-gen3x1-pcie-phy",
2294 		.compatible = "qcom,sm8250-qmp-gen3x2-pcie-phy",
2297 		.compatible = "qcom,sm8250-qmp-modem-pcie-phy",
2300 		.compatible = "qcom,sdx55-qmp-pcie-phy",
2303 		.compatible = "qcom,sm8450-qmp-gen3x1-pcie-phy",
2306 		.compatible = "qcom,sm8450-qmp-gen4x2-pcie-phy",
2315 	struct qcom_qmp *qmp;  in qmp_pcie_probe()  local
2324 	qmp = devm_kzalloc(dev, sizeof(*qmp), GFP_KERNEL);  in qmp_pcie_probe()
2325 	if (!qmp)  in qmp_pcie_probe()
2328 	qmp->dev = dev;  in qmp_pcie_probe()
2329 	dev_set_drvdata(dev, qmp);  in qmp_pcie_probe()
2331 	/* Get the specific init parameters of QMP phy */  in qmp_pcie_probe()
2359 	qmp->phys = devm_kcalloc(dev, num, sizeof(*qmp->phys), GFP_KERNEL);  in qmp_pcie_probe()
2360 	if (!qmp->phys)  in qmp_pcie_probe()
2377 		ret = phy_pipe_clk_register(qmp, child);  in qmp_pcie_probe()
2379 			dev_err(qmp->dev,  in qmp_pcie_probe()
2399 		.name	= "qcom-qmp-pcie-phy",
2407 MODULE_DESCRIPTION("Qualcomm QMP PCIe PHY driver");