Lines Matching refs:sata_param
539 struct xgene_sata_override_param sata_param; member
959 ctx->sata_param.txboostgain[lane * 3 + in xgene_phy_sata_cfg_lanes()
960 ctx->sata_param.speed[lane]]); in xgene_phy_sata_cfg_lanes()
987 ctx->sata_param.txprecursor_cn1[lane * 3 + in xgene_phy_sata_cfg_lanes()
988 ctx->sata_param.speed[lane]]); in xgene_phy_sata_cfg_lanes()
990 ctx->sata_param.txpostcursor_cp1[lane * 3 + in xgene_phy_sata_cfg_lanes()
991 ctx->sata_param.speed[lane]]); in xgene_phy_sata_cfg_lanes()
993 ctx->sata_param.txprecursor_cn2[lane * 3 + in xgene_phy_sata_cfg_lanes()
994 ctx->sata_param.speed[lane]]); in xgene_phy_sata_cfg_lanes()
1000 ctx->sata_param.txamplitude[lane * 3 + in xgene_phy_sata_cfg_lanes()
1001 ctx->sata_param.speed[lane]]); in xgene_phy_sata_cfg_lanes()
1095 ctx->sata_param.txeyedirection[lane * 3 + in xgene_phy_sata_cfg_lanes()
1096 ctx->sata_param.speed[lane]]); in xgene_phy_sata_cfg_lanes()
1098 ctx->sata_param.txeyetuning[lane * 3 + in xgene_phy_sata_cfg_lanes()
1099 ctx->sata_param.speed[lane]]); in xgene_phy_sata_cfg_lanes()
1274 ctx->sata_param.txspeed[ctx->sata_param.speed[0]]); in xgene_phy_hw_init_sata()
1673 ctx->sata_param.txeyetuning, 6, default_txeye_tuning, 1); in xgene_phy_probe()
1675 ctx->sata_param.txeyedirection, 6, default_txeye_direction, 1); in xgene_phy_probe()
1677 ctx->sata_param.txboostgain, 6, default_txboost_gain, 1); in xgene_phy_probe()
1679 ctx->sata_param.txamplitude, 6, default_txamp, 13300); in xgene_phy_probe()
1681 ctx->sata_param.txprecursor_cn1, 6, default_txcn1, 18200); in xgene_phy_probe()
1683 ctx->sata_param.txprecursor_cn2, 6, default_txcn2, 18200); in xgene_phy_probe()
1685 ctx->sata_param.txpostcursor_cp1, 6, default_txcp1, 18200); in xgene_phy_probe()
1687 ctx->sata_param.txspeed, 3, default_spd, 1); in xgene_phy_probe()
1689 ctx->sata_param.speed[i] = 2; /* Default to Gen3 */ in xgene_phy_probe()