Lines Matching refs:mtk_phy_clear_bits

383 	mtk_phy_clear_bits(fmreg + U3P_U2FREQ_FMCR0, P2F_RG_FREQDET_EN);  in hs_slew_rate_calibrate()
386 	mtk_phy_clear_bits(fmreg + U3P_U2FREQ_FMMONR1, P2F_RG_FRCK_EN);  in hs_slew_rate_calibrate()
406 	mtk_phy_clear_bits(com + U3P_USBPHYACR5, PA5_RG_U2_HSTX_SRCAL_EN);  in hs_slew_rate_calibrate()
468 	mtk_phy_clear_bits(com + U3P_U2PHYDTM0, P2C_FORCE_UART_EN | P2C_FORCE_SUSPENDM);  in u2_phy_instance_init()
470 	mtk_phy_clear_bits(com + U3P_U2PHYDTM0,  in u2_phy_instance_init()
473 	mtk_phy_clear_bits(com + U3P_U2PHYDTM1, P2C_RG_UART_EN);  in u2_phy_instance_init()
478 	mtk_phy_clear_bits(com + U3P_USBPHYACR5, PA5_RG_U2_HS_100U_U3_EN);  in u2_phy_instance_init()
480 	mtk_phy_clear_bits(com + U3P_U2PHYACR4, P2C_U2_GPIO_CTR_MSK);  in u2_phy_instance_init()
486 			mtk_phy_clear_bits(com + U3D_U2PHYDCR0, P2C_RG_SIF_U2PLL_FORCE_ON);  in u2_phy_instance_init()
496 	mtk_phy_clear_bits(com + U3P_USBPHYACR6, PA6_RG_U2_BC11_SW_EN);  in u2_phy_instance_init()
518 	mtk_phy_clear_bits(com + U3P_U2PHYDTM1, P2C_RG_SESSEND);  in u2_phy_instance_power_on()
536 	mtk_phy_clear_bits(com + U3P_USBPHYACR6, PA6_RG_U2_OTG_VBUSCMP_EN);  in u2_phy_instance_power_off()
538 	mtk_phy_clear_bits(com + U3P_U2PHYDTM1, P2C_RG_VBUSVALID | P2C_RG_AVALID);  in u2_phy_instance_power_off()
543 		mtk_phy_clear_bits(com + U3P_U2PHYDTM0, P2C_RG_SUSPENDM | P2C_FORCE_SUSPENDM);  in u2_phy_instance_power_off()
545 		mtk_phy_clear_bits(com + U3D_U2PHYDCR0, P2C_RG_SIF_U2PLL_FORCE_ON);  in u2_phy_instance_power_off()
559 		mtk_phy_clear_bits(com + U3D_U2PHYDCR0, P2C_RG_SIF_U2PLL_FORCE_ON);  in u2_phy_instance_exit()
561 		mtk_phy_clear_bits(com + U3P_U2PHYDTM0, P2C_FORCE_SUSPENDM);  in u2_phy_instance_exit()
645 	mtk_phy_clear_bits(bank->chip + U3P_U3_CHIP_GPIO_CTLD,  in pcie_phy_instance_power_on()
648 	mtk_phy_clear_bits(bank->chip + U3P_U3_CHIP_GPIO_CTLE,  in pcie_phy_instance_power_on()