56 	mtk_phy_clear_bits(base + HDMI_CON6, RG_HTPLL_RLH_EN);  in mtk_hdmi_pll_prepare()
77 	mtk_phy_clear_bits(base + HDMI_CON0, RG_HDMITX_EN_DRV_MASK);  in mtk_hdmi_pll_unprepare()
78 	mtk_phy_clear_bits(base + HDMI_CON0, RG_HDMITX_EN_PRED_MASK);  in mtk_hdmi_pll_unprepare()
79 	mtk_phy_clear_bits(base + HDMI_CON0, RG_HDMITX_EN_SER_MASK);  in mtk_hdmi_pll_unprepare()
80 	mtk_phy_clear_bits(base + HDMI_CON2, RG_HDMITX_MBIAS_LPF_EN);  in mtk_hdmi_pll_unprepare()
82 	mtk_phy_clear_bits(base + HDMI_CON0, RG_HDMITX_EN_SLDO_MASK);  in mtk_hdmi_pll_unprepare()
83 	mtk_phy_clear_bits(base + HDMI_CON2, RG_HDMITX_EN_TX_CKLDO);  in mtk_hdmi_pll_unprepare()
84 	mtk_phy_clear_bits(base + HDMI_CON6, RG_HTPLL_EN);  in mtk_hdmi_pll_unprepare()
86 	mtk_phy_clear_bits(base + HDMI_CON2, RG_HDMITX_EN_MBIAS);  in mtk_hdmi_pll_unprepare()
87 	mtk_phy_clear_bits(base + HDMI_CON6, RG_HTPLL_POSDIV_MASK);  in mtk_hdmi_pll_unprepare()
88 	mtk_phy_clear_bits(base + HDMI_CON6, RG_HTPLL_RLH_EN);  in mtk_hdmi_pll_unprepare()
89 	mtk_phy_clear_bits(base + HDMI_CON7, RG_HTPLL_AUTOK_EN);  in mtk_hdmi_pll_unprepare()
126 	mtk_phy_clear_bits(base + HDMI_CON1, RG_HDMITX_PRED_IMP);  in mtk_hdmi_pll_set_rate()
128 	mtk_phy_clear_bits(base + HDMI_CON0, RG_HDMITX_EN_IMP_MASK);  in mtk_hdmi_pll_set_rate()
182 	mtk_phy_clear_bits(base + HDMI_CON6, RG_HTPLL_RLH_EN);  in mtk_hdmi_phy_enable_tmds()
201 	mtk_phy_clear_bits(base + HDMI_CON0, RG_HDMITX_EN_DRV_MASK);  in mtk_hdmi_phy_disable_tmds()
202 	mtk_phy_clear_bits(base + HDMI_CON0, RG_HDMITX_EN_PRED_MASK);  in mtk_hdmi_phy_disable_tmds()
203 	mtk_phy_clear_bits(base + HDMI_CON0, RG_HDMITX_EN_SER_MASK);  in mtk_hdmi_phy_disable_tmds()
204 	mtk_phy_clear_bits(base + HDMI_CON2, RG_HDMITX_MBIAS_LPF_EN);  in mtk_hdmi_phy_disable_tmds()
206 	mtk_phy_clear_bits(base + HDMI_CON0, RG_HDMITX_EN_SLDO_MASK);  in mtk_hdmi_phy_disable_tmds()
207 	mtk_phy_clear_bits(base + HDMI_CON2, RG_HDMITX_EN_TX_CKLDO);  in mtk_hdmi_phy_disable_tmds()
208 	mtk_phy_clear_bits(base + HDMI_CON6, RG_HTPLL_EN);  in mtk_hdmi_phy_disable_tmds()
210 	mtk_phy_clear_bits(base + HDMI_CON2, RG_HDMITX_EN_MBIAS);  in mtk_hdmi_phy_disable_tmds()
211 	mtk_phy_clear_bits(base + HDMI_CON6, RG_HTPLL_POSDIV_MASK);  in mtk_hdmi_phy_disable_tmds()
212 	mtk_phy_clear_bits(base + HDMI_CON6, RG_HTPLL_RLH_EN);  in mtk_hdmi_phy_disable_tmds()
213 	mtk_phy_clear_bits(base + HDMI_CON7, RG_HTPLL_AUTOK_EN);  in mtk_hdmi_phy_disable_tmds()