Lines Matching +full:0 +full:x3e00

14 #define USB2_PLL_REG0		0x4
15 #define USB2_PLL_REG1		0x8
16 #define USB2_TX_REG0		0x10
17 #define USB2_TX_REG1		0x14
18 #define USB2_TX_REG2		0x18
19 #define USB2_RX_REG0		0x20
20 #define USB2_RX_REG1		0x24
21 #define USB2_RX_REG2		0x28
22 #define USB2_ANA_REG0		0x30
23 #define USB2_ANA_REG1		0x34
24 #define USB2_ANA_REG2		0x38
25 #define USB2_DIG_REG0		0x3C
26 #define USB2_DIG_REG1		0x40
27 #define USB2_DIG_REG2		0x44
28 #define USB2_DIG_REG3		0x48
29 #define USB2_TEST_REG0		0x4C
30 #define USB2_TEST_REG1		0x50
31 #define USB2_TEST_REG2		0x54
32 #define USB2_CHARGER_REG0	0x58
33 #define USB2_OTG_REG0		0x5C
34 #define USB2_PHY_MON0		0x60
35 #define USB2_RESETVE_REG0	0x64
36 #define USB2_ICID_REG0		0x78
37 #define USB2_ICID_REG1		0x7C
42 #define USB2_PLL_FBDIV_SHIFT_MMP3		0
43 #define USB2_PLL_FBDIV_MASK_MMP3		(0xFF << 0)
46 #define USB2_PLL_REFDIV_MASK_MMP3		(0xF << 8)
52 #define USB2_PLL_FBDIV_SHIFT_MMP3_B0		0
55 #define USB2_PLL_FBDIV_MASK_MMP3_B0		0x01FF
56 #define USB2_PLL_REFDIV_MASK_MMP3_B0		0x3E00
58 #define USB2_PLL_CAL12_SHIFT_MMP3		0
59 #define USB2_PLL_CALI12_MASK_MMP3		(0x3 << 0)
64 #define USB2_PLL_KVCO_MASK_MMP3			(0x7<<4)
67 #define USB2_PLL_ICP_MASK_MMP3			(0x7<<8)
72 #define USB2_PLL_PU_PLL_MASK			(0x1 << 13)
74 #define USB2_PLL_READY_MASK_MMP3		(0x1 << 15)
78 #define USB2_TX_IMPCAL_VTH_MASK_MMP3		(0x7 << 8)
83 #define USB2_TX_CK60_PHSEL_SHIFT_MMP3		0
84 #define USB2_TX_CK60_PHSEL_MASK_MMP3		(0xf << 0)
87 #define USB2_TX_AMP_MASK_MMP3			(0x7 << 4)
90 #define USB2_TX_VDD12_MASK_MMP3			(0x3 << 8)
97 #define USB2_RX_SQ_THRESH_MASK_MMP3		(0xf << 4)
100 #define USB2_RX_SQ_LENGTH_MASK_MMP3		(0x3 << 10)
149 			0xd << USB2_PLL_REFDIV_SHIFT_MMP3  in mmp3_usb_phy_init()
150 			| 0xf0 << USB2_PLL_FBDIV_SHIFT_MMP3);  in mmp3_usb_phy_init()
155 			0xd << USB2_PLL_REFDIV_SHIFT_MMP3_B0  in mmp3_usb_phy_init()
156 			| 0xf0 << USB2_PLL_FBDIV_SHIFT_MMP3_B0);  in mmp3_usb_phy_init()
186 	u2o_set(base, USB2_RX_REG0, 0xa << USB2_RX_SQ_THRESH_SHIFT_MMP3);  in mmp3_usb_phy_init()
188 	u2o_set(base, USB2_ANA_REG1, 0x1 << USB2_ANA_PU_ANA_SHIFT_MMP3);  in mmp3_usb_phy_init()
190 	u2o_set(base, USB2_OTG_REG0, 0x1 << USB2_OTG_PU_OTG_SHIFT_MMP3);  in mmp3_usb_phy_init()
192 	return 0;  in mmp3_usb_phy_init()
221 	loops = 0;  in mmp3_usb_phy_calibrate()
222 	while ((u2o_get(base, USB2_PLL_REG1) & USB2_PLL_READY_MASK_MMP3) == 0) {  in mmp3_usb_phy_calibrate()
231 	return 0;  in mmp3_usb_phy_calibrate()
256 	mmp3_usb_phy->base = devm_platform_ioremap_resource(pdev, 0);  in mmp3_usb_phy_probe()
275 	return 0;  in mmp3_usb_phy_probe()