1 // SPDX-License-Identifier: GPL-2.0-only
3  * Lantiq XWAY SoC RCU module based USB 1.1/2.0 PHY driver
6  * Copyright (C) 2017 Hauke Mehrtens <hauke@hauke-m.de>
22 /* Transmitter HS Pre-Emphasis Enable */
70 		.compatible = "lantiq,ase-usb2-phy",
74 		.compatible = "lantiq,danube-usb2-phy",
78 		.compatible = "lantiq,xrx100-usb2-phy",
82 		.compatible = "lantiq,xrx200-usb2-phy",
86 		.compatible = "lantiq,xrx300-usb2-phy",
97 	if (priv->reg_bits->have_ana_cfg) {  in ltq_rcu_usb2_phy_init()
98 		regmap_update_bits(priv->regmap, priv->ana_cfg1_reg_offset,  in ltq_rcu_usb2_phy_init()
100 		regmap_update_bits(priv->regmap, priv->ana_cfg1_reg_offset,  in ltq_rcu_usb2_phy_init()
105 	regmap_update_bits(priv->regmap, priv->phy_reg_offset,  in ltq_rcu_usb2_phy_init()
106 			   BIT(priv->reg_bits->hostmode), 0);  in ltq_rcu_usb2_phy_init()
108 	/* Select DMA endianness (Host-endian: big-endian) */  in ltq_rcu_usb2_phy_init()
109 	regmap_update_bits(priv->regmap, priv->phy_reg_offset,  in ltq_rcu_usb2_phy_init()
110 		BIT(priv->reg_bits->slave_endianness), 0);  in ltq_rcu_usb2_phy_init()
111 	regmap_update_bits(priv->regmap, priv->phy_reg_offset,  in ltq_rcu_usb2_phy_init()
112 		BIT(priv->reg_bits->host_endianness),  in ltq_rcu_usb2_phy_init()
113 		BIT(priv->reg_bits->host_endianness));  in ltq_rcu_usb2_phy_init()
121 	struct device *dev = priv->dev;  in ltq_rcu_usb2_phy_power_on()
124 	reset_control_deassert(priv->phy_reset);  in ltq_rcu_usb2_phy_power_on()
126 	ret = clk_prepare_enable(priv->phy_gate_clk);  in ltq_rcu_usb2_phy_power_on()
145 	reset_control_assert(priv->phy_reset);  in ltq_rcu_usb2_phy_power_off()
147 	clk_disable_unprepare(priv->phy_gate_clk);  in ltq_rcu_usb2_phy_power_off()
162 	struct device *dev = priv->dev;  in ltq_rcu_usb2_of_parse()
165 	priv->reg_bits = of_device_get_match_data(dev);  in ltq_rcu_usb2_of_parse()
167 	priv->regmap = syscon_node_to_regmap(dev->of_node->parent);  in ltq_rcu_usb2_of_parse()
168 	if (IS_ERR(priv->regmap)) {  in ltq_rcu_usb2_of_parse()
170 		return PTR_ERR(priv->regmap);  in ltq_rcu_usb2_of_parse()
173 	offset = of_get_address(dev->of_node, 0, NULL, NULL);  in ltq_rcu_usb2_of_parse()
176 		return -ENOENT;  in ltq_rcu_usb2_of_parse()
178 	priv->phy_reg_offset = __be32_to_cpu(*offset);  in ltq_rcu_usb2_of_parse()
180 	if (priv->reg_bits->have_ana_cfg) {  in ltq_rcu_usb2_of_parse()
181 		offset = of_get_address(dev->of_node, 1, NULL, NULL);  in ltq_rcu_usb2_of_parse()
184 			return -ENOENT;  in ltq_rcu_usb2_of_parse()
186 		priv->ana_cfg1_reg_offset = __be32_to_cpu(*offset);  in ltq_rcu_usb2_of_parse()
189 	priv->phy_gate_clk = devm_clk_get(dev, "phy");  in ltq_rcu_usb2_of_parse()
190 	if (IS_ERR(priv->phy_gate_clk)) {  in ltq_rcu_usb2_of_parse()
192 		return PTR_ERR(priv->phy_gate_clk);  in ltq_rcu_usb2_of_parse()
195 	priv->ctrl_reset = devm_reset_control_get_shared(dev, "ctrl");  in ltq_rcu_usb2_of_parse()
196 	if (IS_ERR(priv->ctrl_reset)) {  in ltq_rcu_usb2_of_parse()
197 		if (PTR_ERR(priv->ctrl_reset) != -EPROBE_DEFER)  in ltq_rcu_usb2_of_parse()
199 		return PTR_ERR(priv->ctrl_reset);  in ltq_rcu_usb2_of_parse()
202 	priv->phy_reset = devm_reset_control_get_optional(dev, "phy");  in ltq_rcu_usb2_of_parse()
204 	return PTR_ERR_OR_ZERO(priv->phy_reset);  in ltq_rcu_usb2_of_parse()
209 	struct device *dev = &pdev->dev;  in ltq_rcu_usb2_phy_probe()
216 		return -ENOMEM;  in ltq_rcu_usb2_phy_probe()
218 	priv->dev = dev;  in ltq_rcu_usb2_phy_probe()
225 	reset_control_deassert(priv->ctrl_reset);  in ltq_rcu_usb2_phy_probe()
227 	reset_control_assert(priv->phy_reset);  in ltq_rcu_usb2_phy_probe()
229 	priv->phy = devm_phy_create(dev, dev->of_node, &ltq_rcu_usb2_phy_ops);  in ltq_rcu_usb2_phy_probe()
230 	if (IS_ERR(priv->phy)) {  in ltq_rcu_usb2_phy_probe()
232 		return PTR_ERR(priv->phy);  in ltq_rcu_usb2_phy_probe()
235 	phy_set_drvdata(priv->phy, priv);  in ltq_rcu_usb2_phy_probe()
241 	dev_set_drvdata(priv->dev, priv);  in ltq_rcu_usb2_phy_probe()
248 		.name	= "lantiq-rcu-usb2-phy",
255 MODULE_DESCRIPTION("Lantiq XWAY USB2 PHY driver");