Lines Matching +full:0 +full:x3a0
25 #define HHI_HDMI_PHY_CNTL0 0x3a0
27 #define HHI_HDMI_PHY_CNTL0_HDMI_CTL0 GENMASK(15, 0)
29 #define HHI_HDMI_PHY_CNTL1 0x3a4
31 #define HHI_HDMI_PHY_CNTL1_SOFT_RESET BIT(0)
33 #define HHI_HDMI_PHY_CNTL2 0x3a8
53 return 0; in phy_meson8_hdmi_tx_exit()
63 hdmi_ctl0 = 0x1e8b; in phy_meson8_hdmi_tx_power_on()
65 hdmi_ctl0 = 0x4d0b; in phy_meson8_hdmi_tx_power_on()
68 FIELD_PREP(HHI_HDMI_PHY_CNTL0_HDMI_CTL1, 0x08c3) | in phy_meson8_hdmi_tx_power_on()
71 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL1, 0x0); in phy_meson8_hdmi_tx_power_on()
74 for (i = 0; i < 3; i++) { in phy_meson8_hdmi_tx_power_on()
85 return 0; in phy_meson8_hdmi_tx_power_on()
93 FIELD_PREP(HHI_HDMI_PHY_CNTL0_HDMI_CTL1, 0x0841) | in phy_meson8_hdmi_tx_power_off()
94 FIELD_PREP(HHI_HDMI_PHY_CNTL0_HDMI_CTL0, 0x8d00)); in phy_meson8_hdmi_tx_power_off()
96 return 0; in phy_meson8_hdmi_tx_power_off()
115 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); in phy_meson8_hdmi_tx_probe()