78 	struct hw_perf_event *hwc = &event->hw;  in riscv_pmu_ctr_get_width_mask()  local
87 		if (hwc->idx == -1)  in riscv_pmu_ctr_get_width_mask()
91 			cwidth = rvpmu->ctr_get_width(hwc->idx);  in riscv_pmu_ctr_get_width_mask()
100 	struct hw_perf_event *hwc = &event->hw;  in riscv_pmu_event_update()  local
111 		prev_raw_count = local64_read(&hwc->prev_count);  in riscv_pmu_event_update()
113 		oldval = local64_cmpxchg(&hwc->prev_count, prev_raw_count,  in riscv_pmu_event_update()
119 	local64_sub(delta, &hwc->period_left);  in riscv_pmu_event_update()
126 	struct hw_perf_event *hwc = &event->hw;  in riscv_pmu_stop()  local
129 	WARN_ON_ONCE(hwc->state & PERF_HES_STOPPED);  in riscv_pmu_stop()
131 	if (!(hwc->state & PERF_HES_STOPPED)) {  in riscv_pmu_stop()
134 			hwc->state |= PERF_HES_STOPPED;  in riscv_pmu_stop()
137 		hwc->state |= PERF_HES_UPTODATE;  in riscv_pmu_stop()
143 	struct hw_perf_event *hwc = &event->hw;  in riscv_pmu_event_set_period()  local
144 	s64 left = local64_read(&hwc->period_left);  in riscv_pmu_event_set_period()
145 	s64 period = hwc->sample_period;  in riscv_pmu_event_set_period()
151 		local64_set(&hwc->period_left, left);  in riscv_pmu_event_set_period()
152 		hwc->last_period = period;  in riscv_pmu_event_set_period()
158 		local64_set(&hwc->period_left, left);  in riscv_pmu_event_set_period()
159 		hwc->last_period = period;  in riscv_pmu_event_set_period()
172 	local64_set(&hwc->prev_count, (u64)-left);  in riscv_pmu_event_set_period()
179 	struct hw_perf_event *hwc = &event->hw;  in riscv_pmu_start()  local
190 	hwc->state = 0;  in riscv_pmu_start()
192 	init_val = local64_read(&hwc->prev_count) & max_period;  in riscv_pmu_start()
201 	struct hw_perf_event *hwc = &event->hw;  in riscv_pmu_add()  local
208 	hwc->idx = idx;  in riscv_pmu_add()
211 	hwc->state = PERF_HES_UPTODATE | PERF_HES_STOPPED;  in riscv_pmu_add()
225 	struct hw_perf_event *hwc = &event->hw;  in riscv_pmu_del()  local
228 	cpuc->events[hwc->idx] = NULL;  in riscv_pmu_del()
236 	hwc->idx = -1;  in riscv_pmu_del()
246 	struct hw_perf_event *hwc = &event->hw;  in riscv_pmu_event_init()  local
252 	hwc->flags = 0;  in riscv_pmu_event_init()
266 	hwc->config = event_config;  in riscv_pmu_event_init()
267 	hwc->idx = -1;  in riscv_pmu_event_init()
268 	hwc->event_base = mapped_event;  in riscv_pmu_event_init()
278 		hwc->sample_period  =  cmask >> 1;  in riscv_pmu_event_init()
279 		hwc->last_period    = hwc->sample_period;  in riscv_pmu_event_init()
280 		local64_set(&hwc->period_left, hwc->sample_period);  in riscv_pmu_event_init()