1 // SPDX-License-Identifier: GPL-2.0
32 	struct resource *res = dev->resource + resno;  in pci_std_update_resource()
34 	/* Per SR-IOV spec 3.4.1.11, VF BARs are RO zero */  in pci_std_update_resource()
35 	if (dev->is_virtfn)  in pci_std_update_resource()
42 	if (!res->flags)  in pci_std_update_resource()
45 	if (res->flags & IORESOURCE_UNSET)  in pci_std_update_resource()
49 	 * Ignore non-moveable resources.  This might be legacy resources for  in pci_std_update_resource()
53 	if (res->flags & IORESOURCE_PCI_FIXED)  in pci_std_update_resource()
56 	pcibios_resource_to_bus(dev->bus, &region, res);  in pci_std_update_resource()
59 	if (res->flags & IORESOURCE_IO) {  in pci_std_update_resource()
61 		new |= res->flags & ~PCI_BASE_ADDRESS_IO_MASK;  in pci_std_update_resource()
66 		new |= res->flags & ~PCI_BASE_ADDRESS_MEM_MASK;  in pci_std_update_resource()
81 		if (!(res->flags & IORESOURCE_ROM_ENABLE) &&  in pci_std_update_resource()
82 		    !dev->rom_bar_overlap)  in pci_std_update_resource()
85 		reg = dev->rom_base_reg;  in pci_std_update_resource()
86 		if (res->flags & IORESOURCE_ROM_ENABLE)  in pci_std_update_resource()
92 	 * We can't update a 64-bit BAR atomically, so when possible,  in pci_std_update_resource()
93 	 * disable decoding so that a half-updated BAR won't conflict  in pci_std_update_resource()
96 	disable = (res->flags & IORESOURCE_MEM_64) && !dev->mmio_always_on;  in pci_std_update_resource()
111 	if (res->flags & IORESOURCE_MEM_64) {  in pci_std_update_resource()
137 	struct resource *res = &dev->resource[resource];  in pci_claim_resource()
140 	if (res->flags & IORESOURCE_UNSET) {  in pci_claim_resource()
143 		return -EINVAL;  in pci_claim_resource()
151 	if (res->flags & IORESOURCE_ROM_SHADOW)  in pci_claim_resource()
158 		res->flags |= IORESOURCE_UNSET;  in pci_claim_resource()
159 		return -EINVAL;  in pci_claim_resource()
165 			 resource, res, conflict->name, conflict);  in pci_claim_resource()
166 		res->flags |= IORESOURCE_UNSET;  in pci_claim_resource()
167 		return -EBUSY;  in pci_claim_resource()
179 	/* Prefetchable MMIO Base/Limit */  in pci_disable_bridge_window()
190  * Can be over-ridden by architecture specific code that implements
207 		return -ENOMEM;  in pci_revert_fw_address()
209 	start = res->start;  in pci_revert_fw_address()
210 	end = res->end;  in pci_revert_fw_address()
211 	res->start = fw_addr;  in pci_revert_fw_address()
212 	res->end = res->start + size - 1;  in pci_revert_fw_address()
213 	res->flags &= ~IORESOURCE_UNSET;  in pci_revert_fw_address()
222 			return -ENXIO;  in pci_revert_fw_address()
228 		if (res->flags & IORESOURCE_IO)  in pci_revert_fw_address()
239 			 resno, res, conflict->name, conflict);  in pci_revert_fw_address()
240 		res->start = start;  in pci_revert_fw_address()
241 		res->end = end;  in pci_revert_fw_address()
242 		res->flags |= IORESOURCE_UNSET;  in pci_revert_fw_address()
243 		return -EBUSY;  in pci_revert_fw_address()
258        return res->start;  in pcibios_align_resource()
264 	struct resource *res = dev->resource + resno;  in __pci_assign_resource()
268 	min = (res->flags & IORESOURCE_IO) ? PCIBIOS_MIN_IO : PCIBIOS_MIN_MEM;  in __pci_assign_resource()
271 	 * First, try exact prefetching match.  Even if a 64-bit  in __pci_assign_resource()
272 	 * prefetchable bridge window is below 4GB, we can't put a 32-bit  in __pci_assign_resource()
273 	 * prefetchable resource in it because pbus_size_mem() assumes a  in __pci_assign_resource()
274 	 * 64-bit window will contain no 32-bit resources.  If we assign  in __pci_assign_resource()
284 	 * If the prefetchable window is only 32 bits wide, we can put  in __pci_assign_resource()
285 	 * 64-bit prefetchable resources in it.  in __pci_assign_resource()
287 	if ((res->flags & (IORESOURCE_PREFETCH | IORESOURCE_MEM_64)) ==  in __pci_assign_resource()
298 	 * in a non-prefetchable window.  If this resource is 32 bits and  in __pci_assign_resource()
299 	 * non-prefetchable, the first call already tried the only possibility  in __pci_assign_resource()
302 	if (res->flags & (IORESOURCE_PREFETCH | IORESOURCE_MEM_64))  in __pci_assign_resource()
315 	bus = dev->bus;  in _pci_assign_resource()
317 		if (!bus->parent || !bus->self->transparent)  in _pci_assign_resource()
319 		bus = bus->parent;  in _pci_assign_resource()
327 	struct resource *res = dev->resource + resno;  in pci_assign_resource()
331 	if (res->flags & IORESOURCE_PCI_FIXED)  in pci_assign_resource()
334 	res->flags |= IORESOURCE_UNSET;  in pci_assign_resource()
339 		return -EINVAL;  in pci_assign_resource()
360 	res->flags &= ~IORESOURCE_UNSET;  in pci_assign_resource()
361 	res->flags &= ~IORESOURCE_STARTALIGN;  in pci_assign_resource()
373 	struct resource *res = dev->resource + resno;  in pci_reassign_resource()
378 	if (res->flags & IORESOURCE_PCI_FIXED)  in pci_reassign_resource()
381 	flags = res->flags;  in pci_reassign_resource()
382 	res->flags |= IORESOURCE_UNSET;  in pci_reassign_resource()
383 	if (!res->parent) {  in pci_reassign_resource()
386 		return -EINVAL;  in pci_reassign_resource()
393 		res->flags = flags;  in pci_reassign_resource()
399 	res->flags &= ~IORESOURCE_UNSET;  in pci_reassign_resource()
400 	res->flags &= ~IORESOURCE_STARTALIGN;  in pci_reassign_resource()
411 	struct resource *res = dev->resource + resno;  in pci_release_resource()
415 	if (!res->parent)  in pci_release_resource()
419 	res->end = resource_size(res) - 1;  in pci_release_resource()
420 	res->start = 0;  in pci_release_resource()
421 	res->flags |= IORESOURCE_UNSET;  in pci_release_resource()
427 	struct resource *res = dev->resource + resno;  in pci_resize_resource()
434 	host = pci_find_host_bridge(dev->bus);  in pci_resize_resource()
435 	if (host->preserve_config)  in pci_resize_resource()
436 		return -ENOTSUPP;  in pci_resize_resource()
439 	if (!(res->flags & IORESOURCE_UNSET))  in pci_resize_resource()
440 		return -EBUSY;  in pci_resize_resource()
444 		return -EBUSY;  in pci_resize_resource()
448 		return -ENOTSUPP;  in pci_resize_resource()
451 		return -EINVAL;  in pci_resize_resource()
461 	res->end = res->start + pci_rebar_size_to_bytes(size) - 1;  in pci_resize_resource()
464 	if (dev->bus->self) {  in pci_resize_resource()
465 		ret = pci_reassign_bridge_resources(dev->bus->self, res->flags);  in pci_resize_resource()
473 	res->end = res->start + pci_rebar_size_to_bytes(old) - 1;  in pci_resize_resource()
491 		r = &dev->resource[i];  in pci_enable_resources()
493 		if (!(r->flags & (IORESOURCE_IO | IORESOURCE_MEM)))  in pci_enable_resources()
496 				(!(r->flags & IORESOURCE_ROM_ENABLE)))  in pci_enable_resources()
499 		if (r->flags & IORESOURCE_UNSET) {  in pci_enable_resources()
502 			return -EINVAL;  in pci_enable_resources()
505 		if (!r->parent) {  in pci_enable_resources()
508 			return -EINVAL;  in pci_enable_resources()
511 		if (r->flags & IORESOURCE_IO)  in pci_enable_resources()
513 		if (r->flags & IORESOURCE_MEM)  in pci_enable_resources()
518 		pci_info(dev, "enabling device (%04x -> %04x)\n", old_cmd, cmd);  in pci_enable_resources()