Lines Matching +full:non +full:- +full:prefetchable

1 // SPDX-License-Identifier: GPL-2.0
11 * PCI-PCI bridges cleanup, sorted resource allocation.
14 * tighter packing. Prefetchable range support.
47 list_del(&dev_res->list); in free_list()
53 * add_to_list() - Add a new resource tracker to the list
68 return -ENOMEM; in add_to_list()
70 tmp->res = res; in add_to_list()
71 tmp->dev = dev; in add_to_list()
72 tmp->start = res->start; in add_to_list()
73 tmp->end = res->end; in add_to_list()
74 tmp->flags = res->flags; in add_to_list()
75 tmp->add_size = add_size; in add_to_list()
76 tmp->min_align = min_align; in add_to_list()
78 list_add(&tmp->list, head); in add_to_list()
88 if (dev_res->res == res) { in remove_from_list()
89 list_del(&dev_res->list); in remove_from_list()
102 if (dev_res->res == res) in res_to_dev_res()
115 return dev_res ? dev_res->add_size : 0; in get_res_add_size()
124 return dev_res ? dev_res->min_align : 0; in get_res_add_align()
139 r = &dev->resource[i]; in pdev_sort_resources()
141 if (r->flags & IORESOURCE_PCI_FIXED) in pdev_sort_resources()
144 if (!(r->flags) || r->parent) in pdev_sort_resources()
157 tmp->res = r; in pdev_sort_resources()
158 tmp->dev = dev; in pdev_sort_resources()
165 align = pci_resource_alignment(dev_res->dev, in pdev_sort_resources()
166 dev_res->res); in pdev_sort_resources()
169 n = &dev_res->list; in pdev_sort_resources()
174 list_add_tail(&tmp->list, n); in pdev_sort_resources()
180 u16 class = dev->class >> 8; in __dev_sort_resources()
199 res->start = 0; in reset_resource()
200 res->end = 0; in reset_resource()
201 res->flags = 0; in reset_resource()
205 * reassign_resources_sorted() - Satisfy any additional resource requests
227 res = add_res->res; in reassign_resources_sorted()
229 if (!res->flags) in reassign_resources_sorted()
234 if (dev_res->res == res) { in reassign_resources_sorted()
242 idx = res - &add_res->dev->resource[0]; in reassign_resources_sorted()
243 add_size = add_res->add_size; in reassign_resources_sorted()
244 align = add_res->min_align; in reassign_resources_sorted()
246 res->start = align; in reassign_resources_sorted()
247 res->end = res->start + add_size - 1; in reassign_resources_sorted()
248 if (pci_assign_resource(add_res->dev, idx)) in reassign_resources_sorted()
251 res->flags |= add_res->flags & in reassign_resources_sorted()
253 if (pci_reassign_resource(add_res->dev, idx, in reassign_resources_sorted()
255 pci_info(add_res->dev, "failed to add %llx res[%d]=%pR\n", in reassign_resources_sorted()
260 list_del(&add_res->list); in reassign_resources_sorted()
266 * assign_requested_resources_sorted() - Satisfy resource requests
283 res = dev_res->res; in assign_requested_resources_sorted()
284 idx = res - &dev_res->dev->resource[0]; in assign_requested_resources_sorted()
286 pci_assign_resource(dev_res->dev, idx)) { in assign_requested_resources_sorted()
294 (!(res->flags & IORESOURCE_ROM_ENABLE)))) in assign_requested_resources_sorted()
296 dev_res->dev, res, in assign_requested_resources_sorted()
312 mask |= fail_res->flags; in pci_fail_res_type_mask()
316 * allocate pref in non-pref range. Will release all assigned in pci_fail_res_type_mask()
317 * non-pref sibling resources according to that bit. in pci_fail_res_type_mask()
324 if (res->flags & IORESOURCE_IO) in pci_need_to_release()
328 if (res->flags & IORESOURCE_PREFETCH) { in pci_need_to_release()
331 /* Count pref if its parent is non-pref */ in pci_need_to_release()
333 !(res->parent->flags & IORESOURCE_PREFETCH)) in pci_need_to_release()
339 if (res->flags & IORESOURCE_MEM) in pci_need_to_release()
364 * MMIO. If assigned pref MMIO's parent is non-pref MMIO in __assign_resources_sorted()
365 * and non-pref MMIO assignment fails, will release that in __assign_resources_sorted()
367 * 3. If non-pref MMIO assignment fails or pref MMIO in __assign_resources_sorted()
368 * assignment fails, will release assigned non-pref MMIO. in __assign_resources_sorted()
383 if (add_to_list(&save_head, dev_res->dev, dev_res->res, 0, 0)) { in __assign_resources_sorted()
391 dev_res->res->end += get_res_add_size(realloc_head, in __assign_resources_sorted()
392 dev_res->res); in __assign_resources_sorted()
396 * 1. bridge resource -- IORESOURCE_STARTALIGN in __assign_resources_sorted()
397 * 2. SR-IOV resource -- IORESOURCE_SIZEALIGN in __assign_resources_sorted()
400 if (!(dev_res->res->flags & IORESOURCE_STARTALIGN)) in __assign_resources_sorted()
403 add_align = get_res_add_align(realloc_head, dev_res->res); in __assign_resources_sorted()
412 if (add_align > dev_res->res->start) { in __assign_resources_sorted()
413 resource_size_t r_size = resource_size(dev_res->res); in __assign_resources_sorted()
415 dev_res->res->start = add_align; in __assign_resources_sorted()
416 dev_res->res->end = add_align + r_size - 1; in __assign_resources_sorted()
419 align = pci_resource_alignment(dev_res2->dev, in __assign_resources_sorted()
420 dev_res2->res); in __assign_resources_sorted()
422 list_move_tail(&dev_res->list, in __assign_resources_sorted()
423 &dev_res2->list); in __assign_resources_sorted()
438 remove_from_list(realloc_head, dev_res->res); in __assign_resources_sorted()
448 if (dev_res->res->parent && in __assign_resources_sorted()
449 !pci_need_to_release(fail_type, dev_res->res)) { in __assign_resources_sorted()
451 remove_from_list(realloc_head, dev_res->res); in __assign_resources_sorted()
452 remove_from_list(&save_head, dev_res->res); in __assign_resources_sorted()
453 list_del(&dev_res->list); in __assign_resources_sorted()
460 if (dev_res->res->parent) in __assign_resources_sorted()
461 release_resource(dev_res->res); in __assign_resources_sorted()
464 struct resource *res = save_res->res; in __assign_resources_sorted()
466 res->start = save_res->start; in __assign_resources_sorted()
467 res->end = save_res->end; in __assign_resources_sorted()
468 res->flags = save_res->flags; in __assign_resources_sorted()
473 /* Satisfy the must-have resource requests */ in __assign_resources_sorted()
500 list_for_each_entry(dev, &bus->devices, bus_list) in pbus_assign_resources_sorted()
508 struct pci_dev *bridge = bus->self; in pci_setup_cardbus()
513 &bus->busn_res); in pci_setup_cardbus()
515 res = bus->resource[0]; in pci_setup_cardbus()
516 pcibios_resource_to_bus(bridge->bus, &region, res); in pci_setup_cardbus()
517 if (res->flags & IORESOURCE_IO) { in pci_setup_cardbus()
529 res = bus->resource[1]; in pci_setup_cardbus()
530 pcibios_resource_to_bus(bridge->bus, &region, res); in pci_setup_cardbus()
531 if (res->flags & IORESOURCE_IO) { in pci_setup_cardbus()
539 res = bus->resource[2]; in pci_setup_cardbus()
540 pcibios_resource_to_bus(bridge->bus, &region, res); in pci_setup_cardbus()
541 if (res->flags & IORESOURCE_MEM) { in pci_setup_cardbus()
549 res = bus->resource[3]; in pci_setup_cardbus()
550 pcibios_resource_to_bus(bridge->bus, &region, res); in pci_setup_cardbus()
551 if (res->flags & IORESOURCE_MEM) { in pci_setup_cardbus()
562 * Initialize bridges with base/limit values we have collected. PCI-to-PCI
569 * bridges which support 32-bit I/O. This update requires two config space
572 * 64-bit prefetchable MMIO.
584 if (bridge->io_window_1k) in pci_setup_bridge_io()
588 res = &bridge->resource[PCI_BRIDGE_IO_WINDOW]; in pci_setup_bridge_io()
589 pcibios_resource_to_bus(bridge->bus, &region, res); in pci_setup_bridge_io()
590 if (res->flags & IORESOURCE_IO) { in pci_setup_bridge_io()
618 res = &bridge->resource[PCI_BRIDGE_MEM_WINDOW]; in pci_setup_bridge_mmio()
619 pcibios_resource_to_bus(bridge->bus, &region, res); in pci_setup_bridge_mmio()
620 if (res->flags & IORESOURCE_MEM) { in pci_setup_bridge_mmio()
638 * PCI_PREF_BASE_UPPER32 was non-zero, this temporarily disables in pci_setup_bridge_mmio_pref()
645 res = &bridge->resource[PCI_BRIDGE_PREF_MEM_WINDOW]; in pci_setup_bridge_mmio_pref()
646 pcibios_resource_to_bus(bridge->bus, &region, res); in pci_setup_bridge_mmio_pref()
647 if (res->flags & IORESOURCE_PREFETCH) { in pci_setup_bridge_mmio_pref()
650 if (res->flags & IORESOURCE_MEM_64) { in pci_setup_bridge_mmio_pref()
667 struct pci_dev *bridge = bus->self; in __pci_setup_bridge()
670 &bus->busn_res); in __pci_setup_bridge()
681 pci_write_config_word(bridge, PCI_BRIDGE_CONTROL, bus->bridge_ctl); in __pci_setup_bridge()
706 if ((bridge->class >> 8) != PCI_CLASS_BRIDGE_PCI) in pci_claim_bridge_resource()
710 return -EINVAL; /* Clipping didn't change anything */ in pci_claim_bridge_resource()
723 return -EINVAL; in pci_claim_bridge_resource()
729 return -EINVAL; in pci_claim_bridge_resource()
733 * Check whether the bridge supports optional I/O and prefetchable memory
734 * ranges. If not, the respective base/limit registers must be read-only
739 struct pci_dev *bridge = bus->self; in pci_bridge_check_ranges()
742 b_res = &bridge->resource[PCI_BRIDGE_MEM_WINDOW]; in pci_bridge_check_ranges()
743 b_res->flags |= IORESOURCE_MEM; in pci_bridge_check_ranges()
745 if (bridge->io_window) { in pci_bridge_check_ranges()
746 b_res = &bridge->resource[PCI_BRIDGE_IO_WINDOW]; in pci_bridge_check_ranges()
747 b_res->flags |= IORESOURCE_IO; in pci_bridge_check_ranges()
750 if (bridge->pref_window) { in pci_bridge_check_ranges()
751 b_res = &bridge->resource[PCI_BRIDGE_PREF_MEM_WINDOW]; in pci_bridge_check_ranges()
752 b_res->flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH; in pci_bridge_check_ranges()
753 if (bridge->pref_64_window) { in pci_bridge_check_ranges()
754 b_res->flags |= IORESOURCE_MEM_64 | in pci_bridge_check_ranges()
761 * Helper function for sizing routines. Assigned resources have non-NULL
781 if (r && (r->flags & type_mask) == type && !r->parent) in find_bus_resource_of_type()
783 if (r && (r->flags & type_mask) == type && !r_assigned) in find_bus_resource_of_type()
852 * Per spec, I/O windows are 4K-aligned, but some bridges have in window_alignment()
855 if (bus->self && bus->self->io_window_1k) in window_alignment()
866 * pbus_size_io() - Size the I/O window of a given bus
873 * Sizing the I/O windows of the PCI-PCI bridge is trivial, since these
874 * windows have 1K or 4K granularity and the I/O ranges of non-bridge PCI
893 if (b_res->parent) in pbus_size_io()
897 list_for_each_entry(dev, &bus->devices, bus_list) { in pbus_size_io()
901 struct resource *r = &dev->resource[i]; in pbus_size_io()
904 if (r->parent || !(r->flags & IORESOURCE_IO)) in pbus_size_io()
909 /* Might be re-aligned for ISA */ in pbus_size_io()
929 if (bus->self && (b_res->start || b_res->end)) in pbus_size_io()
930 pci_info(bus->self, "disabling bridge window %pR to %pR (unused)\n", in pbus_size_io()
931 b_res, &bus->busn_res); in pbus_size_io()
932 b_res->flags = 0; in pbus_size_io()
936 b_res->start = min_align; in pbus_size_io()
937 b_res->end = b_res->start + size0 - 1; in pbus_size_io()
938 b_res->flags |= IORESOURCE_STARTALIGN; in pbus_size_io()
939 if (bus->self && size1 > size0 && realloc_head) { in pbus_size_io()
940 add_to_list(realloc_head, bus->self, b_res, size1-size0, in pbus_size_io()
942 pci_info(bus->self, "bridge window %pR to %pR add_size %llx\n", in pbus_size_io()
943 b_res, &bus->busn_res, in pbus_size_io()
944 (unsigned long long) size1 - size0); in pbus_size_io()
971 * pbus_size_mem() - Size the memory window of a given bus
985 * Return -ENOSPC if there's no available bus resource of the desired
1006 return -ENOSPC; in pbus_size_mem()
1009 if (b_res->parent) in pbus_size_mem()
1016 list_for_each_entry(dev, &bus->devices, bus_list) { in pbus_size_mem()
1020 struct resource *r = &dev->resource[i]; in pbus_size_mem()
1023 if (r->parent || (r->flags & IORESOURCE_PCI_FIXED) || in pbus_size_mem()
1024 ((r->flags & mask) != type && in pbus_size_mem()
1025 (r->flags & mask) != type2 && in pbus_size_mem()
1026 (r->flags & mask) != type3)) in pbus_size_mem()
1034 r->end = r->start - 1; in pbus_size_mem()
1047 order = __ffs(align) - 20; in pbus_size_mem()
1053 r->flags = 0; in pbus_size_mem()
1075 min_align = max(min_align, window_alignment(bus, b_res->flags)); in pbus_size_mem()
1082 if (bus->self && (b_res->start || b_res->end)) in pbus_size_mem()
1083 pci_info(bus->self, "disabling bridge window %pR to %pR (unused)\n", in pbus_size_mem()
1084 b_res, &bus->busn_res); in pbus_size_mem()
1085 b_res->flags = 0; in pbus_size_mem()
1088 b_res->start = min_align; in pbus_size_mem()
1089 b_res->end = size0 + min_align - 1; in pbus_size_mem()
1090 b_res->flags |= IORESOURCE_STARTALIGN; in pbus_size_mem()
1091 if (bus->self && size1 > size0 && realloc_head) { in pbus_size_mem()
1092 add_to_list(realloc_head, bus->self, b_res, size1-size0, add_align); in pbus_size_mem()
1093 pci_info(bus->self, "bridge window %pR to %pR add_size %llx add_align %llx\n", in pbus_size_mem()
1094 b_res, &bus->busn_res, in pbus_size_mem()
1095 (unsigned long long) (size1 - size0), in pbus_size_mem()
1103 if (res->flags & IORESOURCE_IO) in pci_cardbus_resource_alignment()
1105 if (res->flags & IORESOURCE_MEM) in pci_cardbus_resource_alignment()
1113 struct pci_dev *bridge = bus->self; in pci_bus_size_cardbus()
1118 b_res = &bridge->resource[PCI_CB_BRIDGE_IO_0_WINDOW]; in pci_bus_size_cardbus()
1119 if (b_res->parent) in pci_bus_size_cardbus()
1125 b_res->start = pci_cardbus_io_size; in pci_bus_size_cardbus()
1126 b_res->end = b_res->start + pci_cardbus_io_size - 1; in pci_bus_size_cardbus()
1127 b_res->flags |= IORESOURCE_IO | IORESOURCE_STARTALIGN; in pci_bus_size_cardbus()
1129 b_res->end -= pci_cardbus_io_size; in pci_bus_size_cardbus()
1135 b_res = &bridge->resource[PCI_CB_BRIDGE_IO_1_WINDOW]; in pci_bus_size_cardbus()
1136 if (b_res->parent) in pci_bus_size_cardbus()
1138 b_res->start = pci_cardbus_io_size; in pci_bus_size_cardbus()
1139 b_res->end = b_res->start + pci_cardbus_io_size - 1; in pci_bus_size_cardbus()
1140 b_res->flags |= IORESOURCE_IO | IORESOURCE_STARTALIGN; in pci_bus_size_cardbus()
1142 b_res->end -= pci_cardbus_io_size; in pci_bus_size_cardbus()
1156 /* Check whether prefetchable memory is supported by this bridge. */ in pci_bus_size_cardbus()
1164 b_res = &bridge->resource[PCI_CB_BRIDGE_MEM_0_WINDOW]; in pci_bus_size_cardbus()
1165 if (b_res->parent) in pci_bus_size_cardbus()
1168 * If we have prefetchable memory support, allocate two regions. in pci_bus_size_cardbus()
1172 b_res->start = pci_cardbus_mem_size; in pci_bus_size_cardbus()
1173 b_res->end = b_res->start + pci_cardbus_mem_size - 1; in pci_bus_size_cardbus()
1174 b_res->flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH | in pci_bus_size_cardbus()
1177 b_res->end -= pci_cardbus_mem_size; in pci_bus_size_cardbus()
1187 b_res = &bridge->resource[PCI_CB_BRIDGE_MEM_1_WINDOW]; in pci_bus_size_cardbus()
1188 if (b_res->parent) in pci_bus_size_cardbus()
1190 b_res->start = pci_cardbus_mem_size; in pci_bus_size_cardbus()
1191 b_res->end = b_res->start + b_res_3_size - 1; in pci_bus_size_cardbus()
1192 b_res->flags |= IORESOURCE_MEM | IORESOURCE_STARTALIGN; in pci_bus_size_cardbus()
1194 b_res->end -= b_res_3_size; in pci_bus_size_cardbus()
1213 list_for_each_entry(dev, &bus->devices, bus_list) { in __pci_bus_size_bridges()
1214 struct pci_bus *b = dev->subordinate; in __pci_bus_size_bridges()
1218 switch (dev->hdr_type) { in __pci_bus_size_bridges()
1232 host = to_pci_host_bridge(bus->bridge); in __pci_bus_size_bridges()
1233 if (!host->size_windows) in __pci_bus_size_bridges()
1236 if (pref && (pref->flags & IORESOURCE_PREFETCH)) in __pci_bus_size_bridges()
1238 hdr_type = -1; /* Intentionally invalid - not a PCI device. */ in __pci_bus_size_bridges()
1240 pref = &bus->self->resource[PCI_BRIDGE_PREF_MEM_WINDOW]; in __pci_bus_size_bridges()
1241 hdr_type = bus->self->hdr_type; in __pci_bus_size_bridges()
1251 if (bus->self->is_hotplug_bridge) { in __pci_bus_size_bridges()
1262 * If there's a 64-bit prefetchable MMIO window, compute in __pci_bus_size_bridges()
1263 * the size required to put all 64-bit prefetchable in __pci_bus_size_bridges()
1268 if (pref && (pref->flags & IORESOURCE_MEM_64)) { in __pci_bus_size_bridges()
1276 * If successful, all non-prefetchable resources in __pci_bus_size_bridges()
1277 * and any 32-bit prefetchable resources will go in in __pci_bus_size_bridges()
1278 * the non-prefetchable window. in __pci_bus_size_bridges()
1288 * If there is no 64-bit prefetchable window, compute the in __pci_bus_size_bridges()
1289 * size required to put all prefetchable resources in the in __pci_bus_size_bridges()
1290 * 32-bit prefetchable window (if there is one). in __pci_bus_size_bridges()
1300 * If successful, only non-prefetchable resources in __pci_bus_size_bridges()
1301 * will go in the non-prefetchable window. in __pci_bus_size_bridges()
1313 * non-prefetchable window. This includes: in __pci_bus_size_bridges()
1315 * - all non-prefetchable resources in __pci_bus_size_bridges()
1316 * - 32-bit prefetchable resources if there's a 64-bit in __pci_bus_size_bridges()
1317 * prefetchable window or no prefetchable window at all in __pci_bus_size_bridges()
1318 * - 64-bit prefetchable resources if there's no prefetchable in __pci_bus_size_bridges()
1322 * that used here. Specifically, we cannot put a 32-bit in __pci_bus_size_bridges()
1323 * prefetchable resource in a 64-bit prefetchable window. in __pci_bus_size_bridges()
1349 if ((r->flags & mask) == (parent_r->flags & mask) && in assign_fixed_resource_on_bus()
1365 struct resource *r = &dev->resource[i]; in pdev_assign_fixed_resources()
1367 if (r->parent || !(r->flags & IORESOURCE_PCI_FIXED) || in pdev_assign_fixed_resources()
1368 !(r->flags & (IORESOURCE_IO | IORESOURCE_MEM))) in pdev_assign_fixed_resources()
1371 b = dev->bus; in pdev_assign_fixed_resources()
1372 while (b && !r->parent) { in pdev_assign_fixed_resources()
1374 b = b->parent; in pdev_assign_fixed_resources()
1388 list_for_each_entry(dev, &bus->devices, bus_list) { in __pci_bus_assign_resources()
1391 b = dev->subordinate; in __pci_bus_assign_resources()
1397 switch (dev->hdr_type) { in __pci_bus_assign_resources()
1409 pci_domain_nr(b), b->number); in __pci_bus_assign_resources()
1426 struct resource *r = &dev->resource[i]; in pci_claim_device_resources()
1428 if (!r->flags || r->parent) in pci_claim_device_resources()
1440 struct resource *r = &dev->resource[i]; in pci_claim_bridge_resources()
1442 if (!r->flags || r->parent) in pci_claim_bridge_resources()
1454 list_for_each_entry(dev, &b->devices, bus_list) { in pci_bus_allocate_dev_resources()
1457 child = dev->subordinate; in pci_bus_allocate_dev_resources()
1468 * Carry out a depth-first search on the PCI bus tree to allocate in pci_bus_allocate_resources()
1472 if (b->self) { in pci_bus_allocate_resources()
1474 pci_claim_bridge_resources(b->self); in pci_bus_allocate_resources()
1477 list_for_each_entry(child, &b->children, node) in pci_bus_allocate_resources()
1497 b = bridge->subordinate; in __pci_bridge_assign_resources()
1503 switch (bridge->class >> 8) { in __pci_bridge_assign_resources()
1514 pci_domain_nr(b), b->number); in __pci_bridge_assign_resources()
1526 struct pci_dev *dev = bus->self; in pci_bridge_release_resources()
1532 b_res = &dev->resource[PCI_BRIDGE_RESOURCES]; in pci_bridge_release_resources()
1536 * 2. If non pref MMIO assignment fails, release bridge nonpref MMIO. in pci_bridge_release_resources()
1559 if (!r->parent) in pci_bridge_release_resources()
1565 type = old_flags = r->flags & PCI_RES_TYPE_MASK; in pci_bridge_release_resources()
1569 r->end = resource_size(r) - 1; in pci_bridge_release_resources()
1570 r->start = 0; in pci_bridge_release_resources()
1571 r->flags = 0; in pci_bridge_release_resources()
1578 r->flags = old_flags; in pci_bridge_release_resources()
1598 list_for_each_entry(dev, &bus->devices, bus_list) { in pci_bus_release_bridge_resources()
1599 struct pci_bus *b = dev->subordinate; in pci_bus_release_bridge_resources()
1605 if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI) in pci_bus_release_bridge_resources()
1616 if ((bus->self->class >> 8) != PCI_CLASS_BRIDGE_PCI) in pci_bus_release_bridge_resources()
1629 if (!res || !res->end || !res->flags) in pci_bus_dump_res()
1632 dev_info(&bus->dev, "resource %d %pR\n", i, res); in pci_bus_dump_res()
1644 list_for_each_entry(dev, &bus->devices, bus_list) { in pci_bus_dump_resources()
1645 b = dev->subordinate; in pci_bus_dump_resources()
1658 list_for_each_entry(child_bus, &bus->children, node) { in pci_bus_get_depth()
1670 * -1: undefined, will auto detect later
1677 undefined = -1,
1704 struct resource *r = &dev->resource[i + PCI_IOV_RESOURCES]; in iov_resources_unassigned()
1708 if (!r->flags) in iov_resources_unassigned()
1711 pcibios_resource_to_bus(dev->bus, &region, r); in iov_resources_unassigned()
1731 if (host->preserve_config) in pci_realloc_detect()
1754 if (res->parent) in adjust_bridge_window()
1761 add_size = new_size - size; in adjust_bridge_window()
1765 add_size = size - new_size; in adjust_bridge_window()
1770 res->end = res->start + new_size - 1; in adjust_bridge_window()
1782 struct pci_dev *dev, *bridge = bus->self; in pci_bus_distribute_available_resources()
1785 io_res = &bridge->resource[PCI_BRIDGE_IO_WINDOW]; in pci_bus_distribute_available_resources()
1786 mmio_res = &bridge->resource[PCI_BRIDGE_MEM_WINDOW]; in pci_bus_distribute_available_resources()
1787 mmio_pref_res = &bridge->resource[PCI_BRIDGE_PREF_MEM_WINDOW]; in pci_bus_distribute_available_resources()
1794 if (!io_res->parent && align) in pci_bus_distribute_available_resources()
1798 if (!mmio_res->parent && align) in pci_bus_distribute_available_resources()
1802 if (!mmio_pref_res->parent && align) in pci_bus_distribute_available_resources()
1821 if (dev->is_hotplug_bridge) in pci_bus_distribute_available_resources()
1833 dev = list_first_entry(&bus->devices, struct pci_dev, bus_list); in pci_bus_distribute_available_resources()
1834 if (dev->subordinate) in pci_bus_distribute_available_resources()
1835 pci_bus_distribute_available_resources(dev->subordinate, in pci_bus_distribute_available_resources()
1847 * non-hotplug bridges. in pci_bus_distribute_available_resources()
1853 if (dev->is_hotplug_bridge) in pci_bus_distribute_available_resources()
1860 res = &dev->resource[PCI_BRIDGE_IO_WINDOW]; in pci_bus_distribute_available_resources()
1862 align = align ? ALIGN(io.start, align) - io.start : 0; in pci_bus_distribute_available_resources()
1864 if (!res->parent) in pci_bus_distribute_available_resources()
1867 res = &dev->resource[PCI_BRIDGE_MEM_WINDOW]; in pci_bus_distribute_available_resources()
1869 align = align ? ALIGN(mmio.start, align) - mmio.start : 0; in pci_bus_distribute_available_resources()
1871 if (!res->parent) in pci_bus_distribute_available_resources()
1874 res = &dev->resource[PCI_BRIDGE_PREF_MEM_WINDOW]; in pci_bus_distribute_available_resources()
1876 align = align ? ALIGN(mmio_pref.start, align) - in pci_bus_distribute_available_resources()
1879 if (!res->parent) in pci_bus_distribute_available_resources()
1896 b = dev->subordinate; in pci_bus_distribute_available_resources()
1897 if (!b || !dev->is_hotplug_bridge) in pci_bus_distribute_available_resources()
1902 * hotplug-capable downstream ports taking alignment into in pci_bus_distribute_available_resources()
1905 io.end = io.start + io_per_hp - 1; in pci_bus_distribute_available_resources()
1906 mmio.end = mmio.start + mmio_per_hp - 1; in pci_bus_distribute_available_resources()
1907 mmio_pref.end = mmio_pref.start + mmio_pref_per_hp - 1; in pci_bus_distribute_available_resources()
1923 if (!bridge->is_hotplug_bridge) in pci_bridge_distribute_available_resources()
1927 available_io = bridge->resource[PCI_BRIDGE_IO_WINDOW]; in pci_bridge_distribute_available_resources()
1928 available_mmio = bridge->resource[PCI_BRIDGE_MEM_WINDOW]; in pci_bridge_distribute_available_resources()
1929 available_mmio_pref = bridge->resource[PCI_BRIDGE_PREF_MEM_WINDOW]; in pci_bridge_distribute_available_resources()
1931 pci_bus_distribute_available_resources(bridge->subordinate, in pci_bridge_distribute_available_resources()
1960 dev_info(&bus->dev, "max bus depth: %d pci_try_num: %d\n", in pci_assign_unassigned_root_bus_resources()
1988 dev_info(&bus->dev, "Some PCI device resources are unassigned, try booting with pci=realloc\n"); in pci_assign_unassigned_root_bus_resources()
1990 …dev_info(&bus->dev, "Automatically enabled pci realloc, if you have problem, try booting with pci=… in pci_assign_unassigned_root_bus_resources()
1996 dev_info(&bus->dev, "No. %d try to assign unassigned res\n", in pci_assign_unassigned_root_bus_resources()
2008 pci_bus_release_bridge_resources(fail_res->dev->bus, in pci_assign_unassigned_root_bus_resources()
2009 fail_res->flags & PCI_RES_TYPE_MASK, in pci_assign_unassigned_root_bus_resources()
2014 struct resource *res = fail_res->res; in pci_assign_unassigned_root_bus_resources()
2017 res->start = fail_res->start; in pci_assign_unassigned_root_bus_resources()
2018 res->end = fail_res->end; in pci_assign_unassigned_root_bus_resources()
2019 res->flags = fail_res->flags; in pci_assign_unassigned_root_bus_resources()
2021 if (pci_is_bridge(fail_res->dev)) { in pci_assign_unassigned_root_bus_resources()
2022 idx = res - &fail_res->dev->resource[0]; in pci_assign_unassigned_root_bus_resources()
2025 res->flags = 0; in pci_assign_unassigned_root_bus_resources()
2045 if (ACPI_HANDLE(root_bus->bridge)) in pci_assign_unassigned_resources()
2046 acpi_ioapic_add(ACPI_HANDLE(root_bus->bridge)); in pci_assign_unassigned_resources()
2052 struct pci_bus *parent = bridge->subordinate; in pci_assign_unassigned_bridge_resources()
2092 pci_bus_release_bridge_resources(fail_res->dev->bus, in pci_assign_unassigned_bridge_resources()
2093 fail_res->flags & PCI_RES_TYPE_MASK, in pci_assign_unassigned_bridge_resources()
2098 struct resource *res = fail_res->res; in pci_assign_unassigned_bridge_resources()
2101 res->start = fail_res->start; in pci_assign_unassigned_bridge_resources()
2102 res->end = fail_res->end; in pci_assign_unassigned_bridge_resources()
2103 res->flags = fail_res->flags; in pci_assign_unassigned_bridge_resources()
2105 if (pci_is_bridge(fail_res->dev)) { in pci_assign_unassigned_bridge_resources()
2106 idx = res - &fail_res->dev->resource[0]; in pci_assign_unassigned_bridge_resources()
2109 res->flags = 0; in pci_assign_unassigned_bridge_resources()
2142 struct resource *res = &bridge->resource[i]; in pci_reassign_bridge_resources()
2144 if ((res->flags ^ type) & PCI_RES_TYPE_MASK) in pci_reassign_bridge_resources()
2148 if (res->child) in pci_reassign_bridge_resources()
2158 if (res->parent) in pci_reassign_bridge_resources()
2160 res->start = 0; in pci_reassign_bridge_resources()
2161 res->end = 0; in pci_reassign_bridge_resources()
2167 next = bridge->bus ? bridge->bus->self : NULL; in pci_reassign_bridge_resources()
2172 return -ENOENT; in pci_reassign_bridge_resources()
2175 __pci_bus_size_bridges(bridge->subordinate, &added); in pci_reassign_bridge_resources()
2180 ret = -ENOSPC; in pci_reassign_bridge_resources()
2186 if (bridge == dev_res->dev) in pci_reassign_bridge_resources()
2189 bridge = dev_res->dev; in pci_reassign_bridge_resources()
2190 pci_setup_bridge(bridge->subordinate); in pci_reassign_bridge_resources()
2200 struct resource *res = dev_res->res; in pci_reassign_bridge_resources()
2202 res->start = dev_res->start; in pci_reassign_bridge_resources()
2203 res->end = dev_res->end; in pci_reassign_bridge_resources()
2204 res->flags = dev_res->flags; in pci_reassign_bridge_resources()
2210 struct resource *res = dev_res->res; in pci_reassign_bridge_resources()
2212 bridge = dev_res->dev; in pci_reassign_bridge_resources()
2213 i = res - bridge->resource; in pci_reassign_bridge_resources()
2215 res->start = dev_res->start; in pci_reassign_bridge_resources()
2216 res->end = dev_res->end; in pci_reassign_bridge_resources()
2217 res->flags = dev_res->flags; in pci_reassign_bridge_resources()
2220 pci_setup_bridge(bridge->subordinate); in pci_reassign_bridge_resources()
2237 __pci_bus_size_bridges(dev->subordinate, &add_list); in pci_assign_unassigned_bus_resources()