1090 	} else if (dev->pm_cap) {  in pci_update_current_state()
1093 		pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);  in pci_update_current_state()
1129 	else if (!dev->pm_cap) /* Fall back to PCI_D0 */  in pci_platform_power_transition()
1208 	if (!dev->pm_cap) {  in pci_power_up()
1221 	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);  in pci_power_up()
1241 	pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, 0);  in pci_power_up()
1278 	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);  in pci_set_full_power_state()
1345 	if (!dev->pm_cap)  in pci_set_low_power_state()
1366 	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);  in pci_set_low_power_state()
1379 	pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, pmcsr);  in pci_set_low_power_state()
1387 	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);  in pci_set_low_power_state()
2318 	if (!dev->pm_cap)  in pci_check_pme_status()
2321 	pmcsr_pos = dev->pm_cap + PCI_PM_CTRL;  in pci_check_pme_status()
2377 	if (!dev->pm_cap)  in pci_pme_capable()
2427 	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);  in __pci_pme_active()
2433 	pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, pmcsr);  in __pci_pme_active()
2447 	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);  in pci_pme_restore()
2455 	pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, pmcsr);  in pci_pme_restore()
2673 	else if (!dev->pm_cap)  in pci_target_state()
3145 	dev->pm_cap = 0;  in pci_pm_init()
3161 	dev->pm_cap = pm;  in pci_pm_init()
4836 	if (!dev->pm_cap || dev->dev_flags & PCI_DEV_FLAGS_NO_PM_RESET)  in pci_pm_reset()
4839 	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &csr);  in pci_pm_reset()
4851 	pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, csr);  in pci_pm_reset()
4856 	pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, csr);  in pci_pm_reset()