206 	ret = pci_read_config_word(pdev, PCI_STATUS, &status);  in pci_status_get_and_clear_errors()
759 		pci_read_config_word(dev, pos + PCI_DVSEC_HEADER1, &v);  in pci_find_dvsec_capability()
760 		pci_read_config_word(dev, pos + PCI_DVSEC_HEADER2, &id);  in pci_find_dvsec_capability()
857 		pci_read_config_word(dev, pos, &status);  in pci_wait_for_pending()
925 	pci_read_config_word(dev, pos + PCI_ACS_CTRL, &ctrl);  in pci_disable_acs_redir()
949 	pci_read_config_word(dev, pos + PCI_ACS_CAP, &cap);  in pci_std_enable_acs()
950 	pci_read_config_word(dev, pos + PCI_ACS_CTRL, &ctrl);  in pci_std_enable_acs()
1093 		pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);  in pci_update_current_state()
1221 	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);  in pci_power_up()
1278 	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);  in pci_set_full_power_state()
1366 	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);  in pci_set_low_power_state()
1387 	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);  in pci_set_low_power_state()
1582 	pci_read_config_word(dev, pos + PCI_X_CMD,  in pci_save_pcix_state()
1930 		pci_read_config_word(dev, PCI_COMMAND, &cmd);  in do_pci_enable_device()
2206 	pci_read_config_word(dev, PCI_COMMAND, &pci_command);  in do_pci_disable_device()
2322 	pci_read_config_word(dev, pmcsr_pos, &pmcsr);  in pci_check_pme_status()
2427 	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);  in __pci_pme_active()
2447 	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);  in pci_pme_restore()
3153 	pci_read_config_word(dev, pm + PCI_PM_PMC, &pmc);  in pci_pm_init()
3200 	pci_read_config_word(dev, PCI_STATUS, &status);  in pci_pm_init()
3533 	pci_read_config_word(pdev, pos + PCI_ACS_CAP, &cap);  in pci_acs_flags_enabled()
3536 	pci_read_config_word(pdev, pos + PCI_ACS_CTRL, &ctrl);  in pci_acs_flags_enabled()
4381 	pci_read_config_word(dev, PCI_COMMAND, &old_cmd);  in __pci_set_master()
4515 	pci_read_config_word(dev, PCI_COMMAND, &cmd);  in pci_set_mwi()
4577 	pci_read_config_word(dev, PCI_COMMAND, &cmd);  in pci_clear_mwi()
4596 	pci_read_config_word(dev, PCI_COMMAND, &cmd);  in pci_disable_parity()
4614 	pci_read_config_word(pdev, PCI_COMMAND, &pci_command);  in pci_intx()
4839 	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &csr);  in pci_pm_reset()
5049 	pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &ctrl);  in pci_reset_secondary_bus()
5954 	if (pci_read_config_word(dev, cap + PCI_X_CMD, &cmd))  in pcix_get_mmrbc()
5991 	if (pci_read_config_word(dev, cap + PCI_X_CMD, &cmd))  in pcix_set_mmrbc()
6343 		pci_read_config_word(dev, PCI_COMMAND, &cmd);  in pci_set_vga_state()
6358 			pci_read_config_word(bridge, PCI_BRIDGE_CONTROL,  in pci_set_vga_state()
6661 	pci_read_config_word(dev, PCI_COMMAND, &command);  in pci_reassigndev_resource_alignment()