Lines Matching refs:appl_writel
297 static inline void appl_writel(struct tegra_pcie_dw *pcie, const u32 value, in appl_writel() function
357 appl_writel(pcie, status_l1, APPL_INTR_STATUS_L1_0_0); in tegra_pcie_rp_irq_handler()
363 appl_writel(pcie, val, APPL_CAR_RESET_OVRD); in tegra_pcie_rp_irq_handler()
367 appl_writel(pcie, val, APPL_CAR_RESET_OVRD); in tegra_pcie_rp_irq_handler()
378 appl_writel(pcie, in tegra_pcie_rp_irq_handler()
390 appl_writel(pcie, in tegra_pcie_rp_irq_handler()
428 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L0); in pex_ep_event_hot_rst_done()
429 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_0_0); in pex_ep_event_hot_rst_done()
430 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_1); in pex_ep_event_hot_rst_done()
431 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_2); in pex_ep_event_hot_rst_done()
432 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_3); in pex_ep_event_hot_rst_done()
433 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_6); in pex_ep_event_hot_rst_done()
434 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_7); in pex_ep_event_hot_rst_done()
435 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_8_0); in pex_ep_event_hot_rst_done()
436 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_9); in pex_ep_event_hot_rst_done()
437 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_10); in pex_ep_event_hot_rst_done()
438 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_11); in pex_ep_event_hot_rst_done()
439 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_13); in pex_ep_event_hot_rst_done()
440 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_14); in pex_ep_event_hot_rst_done()
441 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_15); in pex_ep_event_hot_rst_done()
442 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_17); in pex_ep_event_hot_rst_done()
443 appl_writel(pcie, 0xFFFFFFFF, APPL_MSI_CTRL_2); in pex_ep_event_hot_rst_done()
447 appl_writel(pcie, val, APPL_CTRL); in pex_ep_event_hot_rst_done()
476 appl_writel(pcie, val, APPL_LTR_MSG_1); in tegra_pcie_ep_irq_thread()
481 appl_writel(pcie, val, APPL_LTR_MSG_2); in tegra_pcie_ep_irq_thread()
509 appl_writel(pcie, status_l1, APPL_INTR_STATUS_L1_0_0); in tegra_pcie_ep_hard_irq()
527 appl_writel(pcie, status_l1, APPL_INTR_STATUS_L1_15); in tegra_pcie_ep_hard_irq()
538 appl_writel(pcie, status_l0, APPL_INTR_STATUS_L0); in tegra_pcie_ep_hard_irq()
717 appl_writel(pcie, val, APPL_INTR_EN_L0_0); in tegra_pcie_enable_system_interrupts()
722 appl_writel(pcie, val, APPL_INTR_EN_L1_0_0); in tegra_pcie_enable_system_interrupts()
728 appl_writel(pcie, val, APPL_INTR_EN_L0_0); in tegra_pcie_enable_system_interrupts()
733 appl_writel(pcie, val, APPL_INTR_EN_L1_18); in tegra_pcie_enable_system_interrupts()
758 appl_writel(pcie, val, APPL_INTR_EN_L0_0); in tegra_pcie_enable_legacy_interrupts()
766 appl_writel(pcie, val, APPL_INTR_EN_L1_8_0); in tegra_pcie_enable_legacy_interrupts()
779 appl_writel(pcie, val, APPL_INTR_EN_L0_0); in tegra_pcie_enable_msi_interrupts()
788 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L0); in tegra_pcie_enable_interrupts()
789 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_0_0); in tegra_pcie_enable_interrupts()
790 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_1); in tegra_pcie_enable_interrupts()
791 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_2); in tegra_pcie_enable_interrupts()
792 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_3); in tegra_pcie_enable_interrupts()
793 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_6); in tegra_pcie_enable_interrupts()
794 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_7); in tegra_pcie_enable_interrupts()
795 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_8_0); in tegra_pcie_enable_interrupts()
796 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_9); in tegra_pcie_enable_interrupts()
797 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_10); in tegra_pcie_enable_interrupts()
798 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_11); in tegra_pcie_enable_interrupts()
799 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_13); in tegra_pcie_enable_interrupts()
800 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_14); in tegra_pcie_enable_interrupts()
801 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_15); in tegra_pcie_enable_interrupts()
802 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_17); in tegra_pcie_enable_interrupts()
958 appl_writel(pcie, val, APPL_PINMUX); in tegra_pcie_dw_start_link()
965 appl_writel(pcie, val, APPL_CTRL); in tegra_pcie_dw_start_link()
970 appl_writel(pcie, val, APPL_PINMUX); in tegra_pcie_dw_start_link()
1000 appl_writel(pcie, val, APPL_CTRL); in tegra_pcie_dw_start_link()
1414 appl_writel(pcie, val, APPL_CTRL); in tegra_pcie_config_controller()
1424 appl_writel(pcie, pcie->dbi_res->start & APPL_CFG_BASE_ADDR_MASK, in tegra_pcie_config_controller()
1428 appl_writel(pcie, APPL_DM_TYPE_RP, APPL_DM_TYPE); in tegra_pcie_config_controller()
1430 appl_writel(pcie, 0x0, APPL_CFG_SLCG_OVERRIDE); in tegra_pcie_config_controller()
1433 appl_writel(pcie, val | APPL_CTRL_SYS_PRE_DET_STATE, APPL_CTRL); in tegra_pcie_config_controller()
1437 appl_writel(pcie, val, APPL_CFG_MISC); in tegra_pcie_config_controller()
1449 appl_writel(pcie, val, APPL_PINMUX); in tegra_pcie_config_controller()
1456 appl_writel(pcie, val, APPL_PINMUX); in tegra_pcie_config_controller()
1460 appl_writel(pcie, in tegra_pcie_config_controller()
1553 appl_writel(pcie, val, APPL_RADM_STATUS); in tegra_pcie_try_link_l2()
1578 appl_writel(pcie, 0x0, APPL_INTR_EN_L0_0); in tegra_pcie_dw_pme_turnoff()
1590 appl_writel(pcie, data, APPL_PINMUX); in tegra_pcie_dw_pme_turnoff()
1619 appl_writel(pcie, data, APPL_PINMUX); in tegra_pcie_dw_pme_turnoff()
1693 appl_writel(pcie, val, APPL_CTRL); in pex_ep_event_pex_rst_assert()
1782 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L0); in pex_ep_event_pex_rst_deassert()
1783 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_0_0); in pex_ep_event_pex_rst_deassert()
1784 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_1); in pex_ep_event_pex_rst_deassert()
1785 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_2); in pex_ep_event_pex_rst_deassert()
1786 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_3); in pex_ep_event_pex_rst_deassert()
1787 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_6); in pex_ep_event_pex_rst_deassert()
1788 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_7); in pex_ep_event_pex_rst_deassert()
1789 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_8_0); in pex_ep_event_pex_rst_deassert()
1790 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_9); in pex_ep_event_pex_rst_deassert()
1791 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_10); in pex_ep_event_pex_rst_deassert()
1792 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_11); in pex_ep_event_pex_rst_deassert()
1793 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_13); in pex_ep_event_pex_rst_deassert()
1794 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_14); in pex_ep_event_pex_rst_deassert()
1795 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_15); in pex_ep_event_pex_rst_deassert()
1796 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_17); in pex_ep_event_pex_rst_deassert()
1802 appl_writel(pcie, val, APPL_DM_TYPE); in pex_ep_event_pex_rst_deassert()
1804 appl_writel(pcie, 0x0, APPL_CFG_SLCG_OVERRIDE); in pex_ep_event_pex_rst_deassert()
1809 appl_writel(pcie, val, APPL_CTRL); in pex_ep_event_pex_rst_deassert()
1814 appl_writel(pcie, val, APPL_CFG_MISC); in pex_ep_event_pex_rst_deassert()
1819 appl_writel(pcie, val, APPL_PINMUX); in pex_ep_event_pex_rst_deassert()
1821 appl_writel(pcie, pcie->dbi_res->start & APPL_CFG_BASE_ADDR_MASK, in pex_ep_event_pex_rst_deassert()
1824 appl_writel(pcie, pcie->atu_dma_res->start & in pex_ep_event_pex_rst_deassert()
1832 appl_writel(pcie, val, APPL_INTR_EN_L0_0); in pex_ep_event_pex_rst_deassert()
1837 appl_writel(pcie, val, APPL_INTR_EN_L1_0_0); in pex_ep_event_pex_rst_deassert()
1900 appl_writel(pcie, val, APPL_LTR_MSG_2); in pex_ep_event_pex_rst_deassert()
1906 appl_writel(pcie, val, APPL_CTRL); in pex_ep_event_pex_rst_deassert()
1946 appl_writel(pcie, 1, APPL_LEGACY_INTX); in tegra_pcie_ep_raise_legacy_irq()
1948 appl_writel(pcie, 0, APPL_LEGACY_INTX); in tegra_pcie_ep_raise_legacy_irq()
1957 appl_writel(pcie, BIT(irq), APPL_MSI_CTRL_1); in tegra_pcie_ep_raise_msi_irq()
2310 appl_writel(pcie, val, APPL_CTRL); in tegra_pcie_dw_suspend_late()
2382 appl_writel(pcie, val, APPL_CTRL); in tegra_pcie_dw_resume_early()