Lines Matching +full:pci +full:- +full:dev
1 // SPDX-License-Identifier: GPL-2.0
17 #include "../../pci.h"
18 #include "pcie-designware.h"
20 #define PORT_AFR_N_FTS_GEN12_DFT (SZ_128 - 1)
62 struct dw_pcie pci; member
84 writel(val, pcie->app_base + ofs); in pcie_app_wr()
90 pcie_update_bits(pcie->app_base, ofs, mask, val); in pcie_app_wr_mask()
95 return dw_pcie_readl_dbi(&pcie->pci, ofs); in pcie_rc_cfg_rd()
100 dw_pcie_writel_dbi(&pcie->pci, ofs, val); in pcie_rc_cfg_wr()
106 pcie_update_bits(pcie->pci.dbi_base, ofs, mask, val); in pcie_rc_cfg_wr_mask()
123 u8 offset = dw_pcie_find_capability(&pcie->pci, PCI_CAP_ID_EXP); in intel_pcie_link_setup()
131 static void intel_pcie_init_n_fts(struct dw_pcie *pci) in intel_pcie_init_n_fts() argument
133 switch (pci->link_gen) { in intel_pcie_init_n_fts()
135 pci->n_fts[1] = PORT_AFR_N_FTS_GEN3; in intel_pcie_init_n_fts()
138 pci->n_fts[1] = PORT_AFR_N_FTS_GEN4; in intel_pcie_init_n_fts()
141 pci->n_fts[1] = PORT_AFR_N_FTS_GEN12_DFT; in intel_pcie_init_n_fts()
144 pci->n_fts[0] = PORT_AFR_N_FTS_GEN12_DFT; in intel_pcie_init_n_fts()
149 struct device *dev = pcie->pci.dev; in intel_pcie_ep_rst_init() local
152 pcie->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW); in intel_pcie_ep_rst_init()
153 if (IS_ERR(pcie->reset_gpio)) { in intel_pcie_ep_rst_init()
154 ret = PTR_ERR(pcie->reset_gpio); in intel_pcie_ep_rst_init()
155 if (ret != -EPROBE_DEFER) in intel_pcie_ep_rst_init()
156 dev_err(dev, "Failed to request PCIe GPIO: %d\n", ret); in intel_pcie_ep_rst_init()
168 reset_control_assert(pcie->core_rst); in intel_pcie_core_rst_assert()
174 * One micro-second delay to make sure the reset pulse in intel_pcie_core_rst_deassert()
178 reset_control_deassert(pcie->core_rst); in intel_pcie_core_rst_deassert()
189 gpiod_set_value_cansleep(pcie->reset_gpio, 1); in intel_pcie_device_rst_assert()
194 msleep(pcie->rst_intrvl); in intel_pcie_device_rst_deassert()
195 gpiod_set_value_cansleep(pcie->reset_gpio, 0); in intel_pcie_device_rst_deassert()
207 struct dw_pcie *pci = &pcie->pci; in intel_pcie_get_resources() local
208 struct device *dev = pci->dev; in intel_pcie_get_resources() local
211 pcie->core_clk = devm_clk_get(dev, NULL); in intel_pcie_get_resources()
212 if (IS_ERR(pcie->core_clk)) { in intel_pcie_get_resources()
213 ret = PTR_ERR(pcie->core_clk); in intel_pcie_get_resources()
214 if (ret != -EPROBE_DEFER) in intel_pcie_get_resources()
215 dev_err(dev, "Failed to get clks: %d\n", ret); in intel_pcie_get_resources()
219 pcie->core_rst = devm_reset_control_get(dev, NULL); in intel_pcie_get_resources()
220 if (IS_ERR(pcie->core_rst)) { in intel_pcie_get_resources()
221 ret = PTR_ERR(pcie->core_rst); in intel_pcie_get_resources()
222 if (ret != -EPROBE_DEFER) in intel_pcie_get_resources()
223 dev_err(dev, "Failed to get resets: %d\n", ret); in intel_pcie_get_resources()
227 ret = device_property_read_u32(dev, "reset-assert-ms", in intel_pcie_get_resources()
228 &pcie->rst_intrvl); in intel_pcie_get_resources()
230 pcie->rst_intrvl = RESET_INTERVAL_MS; in intel_pcie_get_resources()
232 pcie->app_base = devm_platform_ioremap_resource_byname(pdev, "app"); in intel_pcie_get_resources()
233 if (IS_ERR(pcie->app_base)) in intel_pcie_get_resources()
234 return PTR_ERR(pcie->app_base); in intel_pcie_get_resources()
236 pcie->phy = devm_phy_get(dev, "pcie"); in intel_pcie_get_resources()
237 if (IS_ERR(pcie->phy)) { in intel_pcie_get_resources()
238 ret = PTR_ERR(pcie->phy); in intel_pcie_get_resources()
239 if (ret != -EPROBE_DEFER) in intel_pcie_get_resources()
240 dev_err(dev, "Couldn't get pcie-phy: %d\n", ret); in intel_pcie_get_resources()
251 struct dw_pcie *pci = &pcie->pci; in intel_pcie_wait_l2() local
253 if (pci->link_gen < 3) in intel_pcie_wait_l2()
261 ret = readl_poll_timeout(pcie->app_base + PCIE_APP_PMC, value, in intel_pcie_wait_l2()
265 dev_err(pcie->pci.dev, "PCIe link enter L2 timeout!\n"); in intel_pcie_wait_l2()
272 if (dw_pcie_link_up(&pcie->pci)) in intel_pcie_turn_off()
283 struct dw_pcie *pci = &pcie->pci; in intel_pcie_host_setup() local
288 ret = phy_init(pcie->phy); in intel_pcie_host_setup()
294 ret = clk_prepare_enable(pcie->core_clk); in intel_pcie_host_setup()
296 dev_err(pcie->pci.dev, "Core clock enable failed: %d\n", ret); in intel_pcie_host_setup()
300 pci->atu_base = pci->dbi_base + 0xC0000; in intel_pcie_host_setup()
304 intel_pcie_init_n_fts(pci); in intel_pcie_host_setup()
306 ret = dw_pcie_setup_rc(&pci->pp); in intel_pcie_host_setup()
310 dw_pcie_upconfig_setup(pci); in intel_pcie_host_setup()
315 ret = dw_pcie_wait_for_link(pci); in intel_pcie_host_setup()
326 clk_disable_unprepare(pcie->core_clk); in intel_pcie_host_setup()
329 phy_exit(pcie->phy); in intel_pcie_host_setup()
338 clk_disable_unprepare(pcie->core_clk); in __intel_pcie_remove()
340 phy_exit(pcie->phy); in __intel_pcie_remove()
346 struct dw_pcie_rp *pp = &pcie->pci.pp; in intel_pcie_remove()
354 static int intel_pcie_suspend_noirq(struct device *dev) in intel_pcie_suspend_noirq() argument
356 struct intel_pcie *pcie = dev_get_drvdata(dev); in intel_pcie_suspend_noirq()
364 phy_exit(pcie->phy); in intel_pcie_suspend_noirq()
365 clk_disable_unprepare(pcie->core_clk); in intel_pcie_suspend_noirq()
369 static int intel_pcie_resume_noirq(struct device *dev) in intel_pcie_resume_noirq() argument
371 struct intel_pcie *pcie = dev_get_drvdata(dev); in intel_pcie_resume_noirq()
378 struct dw_pcie *pci = to_dw_pcie_from_pp(pp); in intel_pcie_rc_init() local
379 struct intel_pcie *pcie = dev_get_drvdata(pci->dev); in intel_pcie_rc_init()
399 struct device *dev = &pdev->dev; in intel_pcie_probe() local
402 struct dw_pcie *pci; in intel_pcie_probe() local
405 pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL); in intel_pcie_probe()
407 return -ENOMEM; in intel_pcie_probe()
410 pci = &pcie->pci; in intel_pcie_probe()
411 pci->dev = dev; in intel_pcie_probe()
412 pp = &pci->pp; in intel_pcie_probe()
422 pci->ops = &intel_pcie_ops; in intel_pcie_probe()
423 pp->ops = &intel_pcie_dw_ops; in intel_pcie_probe()
427 dev_err(dev, "Cannot initialize host\n"); in intel_pcie_probe()
440 { .compatible = "intel,lgm-pcie" },
448 .name = "intel-gw-pcie",