1 // SPDX-License-Identifier: GPL-2.0
4  * Copyright (C) 2019-2021 SiFive, Inc.
26 #include <linux/reset.h>
28 #include "pcie-designware.h"
30 #define to_fu740_pcie(x)	dev_get_drvdata((x)->dev)
35 	struct gpio_desc *reset;  member
82 	/* Assert PERST_N GPIO */  in fu740_pcie_assert_reset()
83 	gpiod_set_value_cansleep(afp->reset, 0);  in fu740_pcie_assert_reset()
84 	/* Assert controller PERST_N */  in fu740_pcie_assert_reset()
85 	writel_relaxed(0x0, afp->mgmt_base + PCIEX8MGMT_PERST_N);  in fu740_pcie_assert_reset()
91 	writel_relaxed(0x1, afp->mgmt_base + PCIEX8MGMT_PERST_N);  in fu740_pcie_deassert_reset()
93 	gpiod_set_value_cansleep(afp->reset, 1);  in fu740_pcie_deassert_reset()
98 	gpiod_set_value_cansleep(afp->pwren, 1);  in fu740_pcie_power_on()
100 	 * Ensure that PERST has been asserted for at least 100 ms.  in fu740_pcie_power_on()
117 	struct device *dev = afp->pci.dev;  in fu740_phyregwrite()
126 		phy_cr_para_addr = afp->mgmt_base + PCIEX8MGMT_PHY1_CR_PARA_ADDR;  in fu740_phyregwrite()
127 		phy_cr_para_wr_data = afp->mgmt_base + PCIEX8MGMT_PHY1_CR_PARA_WR_DATA;  in fu740_phyregwrite()
128 		phy_cr_para_wr_en = afp->mgmt_base + PCIEX8MGMT_PHY1_CR_PARA_WR_EN;  in fu740_phyregwrite()
129 		phy_cr_para_ack = afp->mgmt_base + PCIEX8MGMT_PHY1_CR_PARA_ACK;  in fu740_phyregwrite()
131 		phy_cr_para_addr = afp->mgmt_base + PCIEX8MGMT_PHY0_CR_PARA_ADDR;  in fu740_phyregwrite()
132 		phy_cr_para_wr_data = afp->mgmt_base + PCIEX8MGMT_PHY0_CR_PARA_WR_DATA;  in fu740_phyregwrite()
133 		phy_cr_para_wr_en = afp->mgmt_base + PCIEX8MGMT_PHY0_CR_PARA_WR_EN;  in fu740_phyregwrite()
134 		phy_cr_para_ack = afp->mgmt_base + PCIEX8MGMT_PHY0_CR_PARA_ACK;  in fu740_phyregwrite()
158 	writel_relaxed(0x1, afp->mgmt_base + PCIEX8MGMT_PHY0_CR_PARA_SEL);  in fu740_pcie_init_phy()
159 	writel_relaxed(0x1, afp->mgmt_base + PCIEX8MGMT_PHY1_CR_PARA_SEL);  in fu740_pcie_init_phy()
180 	struct device *dev = pci->dev;  in fu740_pcie_start_link()
189 	 * on the Unmatched board when U-Boot has not initialised the PCIe.  in fu740_pcie_start_link()
190 	 * The fix in U-Boot is to force 2.5GT/s, which then gets cleared  in fu740_pcie_start_link()
191 	 * by the soft reset done by this driver.  in fu740_pcie_start_link()
203 	writel_relaxed(0x1, afp->mgmt_base + PCIEX8MGMT_APP_LTSSM_ENABLE);  in fu740_pcie_start_link()
241 	struct device *dev = pci->dev;  in fu740_pcie_host_init()
244 	/* Power on reset */  in fu740_pcie_host_init()
248 	ret = clk_prepare_enable(afp->pcie_aux);  in fu740_pcie_host_init()
255 	 * Assert hold_phy_rst (hold the controller LTSSM in reset after  in fu740_pcie_host_init()
258 	writel_relaxed(0x1, afp->mgmt_base + PCIEX8MGMT_APP_HOLD_PHY_RST);  in fu740_pcie_host_init()
261 	ret = reset_control_deassert(afp->rst);  in fu740_pcie_host_init()
270 	clk_disable_unprepare(afp->pcie_aux);  in fu740_pcie_host_init()
272 	writel_relaxed(0x0, afp->mgmt_base + PCIEX8MGMT_APP_HOLD_PHY_RST);  in fu740_pcie_host_init()
274 	clk_prepare_enable(afp->pcie_aux);  in fu740_pcie_host_init()
276 	writel_relaxed(0x4, afp->mgmt_base + PCIEX8MGMT_DEVICE_TYPE);  in fu740_pcie_host_init()
291 	struct device *dev = &pdev->dev;  in fu740_pcie_probe()
297 		return -ENOMEM;  in fu740_pcie_probe()
298 	pci = &afp->pci;  in fu740_pcie_probe()
299 	pci->dev = dev;  in fu740_pcie_probe()
300 	pci->ops = &dw_pcie_ops;  in fu740_pcie_probe()
301 	pci->pp.ops = &fu740_pcie_host_ops;  in fu740_pcie_probe()
304 	afp->mgmt_base = devm_platform_ioremap_resource_byname(pdev, "mgmt");  in fu740_pcie_probe()
305 	if (IS_ERR(afp->mgmt_base))  in fu740_pcie_probe()
306 		return PTR_ERR(afp->mgmt_base);  in fu740_pcie_probe()
309 	afp->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);  in fu740_pcie_probe()
310 	if (IS_ERR(afp->reset))  in fu740_pcie_probe()
311 		return dev_err_probe(dev, PTR_ERR(afp->reset), "unable to get reset-gpios\n");  in fu740_pcie_probe()
313 	afp->pwren = devm_gpiod_get_optional(dev, "pwren", GPIOD_OUT_LOW);  in fu740_pcie_probe()
314 	if (IS_ERR(afp->pwren))  in fu740_pcie_probe()
315 		return dev_err_probe(dev, PTR_ERR(afp->pwren), "unable to get pwren-gpios\n");  in fu740_pcie_probe()
318 	afp->pcie_aux = devm_clk_get(dev, "pcie_aux");  in fu740_pcie_probe()
319 	if (IS_ERR(afp->pcie_aux))  in fu740_pcie_probe()
320 		return dev_err_probe(dev, PTR_ERR(afp->pcie_aux),  in fu740_pcie_probe()
323 	/* Fetch reset */  in fu740_pcie_probe()
324 	afp->rst = devm_reset_control_get_exclusive(dev, NULL);  in fu740_pcie_probe()
325 	if (IS_ERR(afp->rst))  in fu740_pcie_probe()
326 		return dev_err_probe(dev, PTR_ERR(afp->rst), "unable to get reset\n");  in fu740_pcie_probe()
330 	return dw_pcie_host_init(&pci->pp);  in fu740_pcie_probe()
342 	{ .compatible = "sifive,fu740-pcie", },
348 		   .name = "fu740-pcie",