1 // SPDX-License-Identifier: GPL-2.0
3  * PCIe host controller driver for Rockchip SoCs.
5  * Copyright (C) 2021 Rockchip Electronics Co., Ltd.
6  *		http://www.rock-chips.com
8  * Author: Simon Xue <xxm@rock-chips.com>
19 #include <linux/phy/phy.h>
24 #include "pcie-designware.h"
34 #define to_rockchip_pcie(x) dev_get_drvdata((x)->dev)
54 	struct phy			*phy;  member
63 static int rockchip_pcie_readl_apb(struct rockchip_pcie *rockchip,  in rockchip_pcie_readl_apb()  argument
66 	return readl_relaxed(rockchip->apb_base + reg);  in rockchip_pcie_readl_apb()
69 static void rockchip_pcie_writel_apb(struct rockchip_pcie *rockchip,  in rockchip_pcie_writel_apb()  argument
72 	writel_relaxed(val, rockchip->apb_base + reg);  in rockchip_pcie_writel_apb()
78 	struct rockchip_pcie *rockchip = irq_desc_get_handler_data(desc);  in rockchip_pcie_legacy_int_handler()  local
83 	reg = rockchip_pcie_readl_apb(rockchip, PCIE_CLIENT_INTR_STATUS_LEGACY);  in rockchip_pcie_legacy_int_handler()
86 		generic_handle_domain_irq(rockchip->irq_domain, hwirq);  in rockchip_pcie_legacy_int_handler()
94 				 HIWORD_UPDATE_BIT(BIT(data->hwirq)),  in rockchip_intx_mask()
101 				 HIWORD_DISABLE_BIT(BIT(data->hwirq)),  in rockchip_intx_unmask()
116 	irq_set_chip_data(irq, domain->host_data);  in rockchip_pcie_intx_map()
125 static int rockchip_pcie_init_irq_domain(struct rockchip_pcie *rockchip)  in rockchip_pcie_init_irq_domain()  argument
127 	struct device *dev = rockchip->pci.dev;  in rockchip_pcie_init_irq_domain()
130 	intc = of_get_child_by_name(dev->of_node, "legacy-interrupt-controller");  in rockchip_pcie_init_irq_domain()
132 		dev_err(dev, "missing child interrupt-controller node\n");  in rockchip_pcie_init_irq_domain()
133 		return -EINVAL;  in rockchip_pcie_init_irq_domain()
136 	rockchip->irq_domain = irq_domain_add_linear(intc, PCI_NUM_INTX,  in rockchip_pcie_init_irq_domain()
137 						    &intx_domain_ops, rockchip);  in rockchip_pcie_init_irq_domain()
139 	if (!rockchip->irq_domain) {  in rockchip_pcie_init_irq_domain()
141 		return -EINVAL;  in rockchip_pcie_init_irq_domain()
147 static void rockchip_pcie_enable_ltssm(struct rockchip_pcie *rockchip)  in rockchip_pcie_enable_ltssm()  argument
149 	rockchip_pcie_writel_apb(rockchip, PCIE_CLIENT_ENABLE_LTSSM,  in rockchip_pcie_enable_ltssm()
155 	struct rockchip_pcie *rockchip = to_rockchip_pcie(pci);  in rockchip_pcie_link_up()  local
156 	u32 val = rockchip_pcie_readl_apb(rockchip, PCIE_CLIENT_LTSSM_STATUS);  in rockchip_pcie_link_up()
167 	struct rockchip_pcie *rockchip = to_rockchip_pcie(pci);  in rockchip_pcie_start_link()  local
170 	gpiod_set_value_cansleep(rockchip->rst_gpio, 0);  in rockchip_pcie_start_link()
172 	rockchip_pcie_enable_ltssm(rockchip);  in rockchip_pcie_start_link()
175 	 * PCIe requires the refclk to be stable for 100µs prior to releasing  in rockchip_pcie_start_link()
176 	 * PERST. See table 2-4 in section 2.6.2 AC Specifications of the PCI  in rockchip_pcie_start_link()
178 	 * know if the refclk is coming from RC's PHY or external OSC. If it's  in rockchip_pcie_start_link()
184 	gpiod_set_value_cansleep(rockchip->rst_gpio, 1);  in rockchip_pcie_start_link()
192 	struct rockchip_pcie *rockchip = to_rockchip_pcie(pci);  in rockchip_pcie_host_init()  local
193 	struct device *dev = rockchip->pci.dev;  in rockchip_pcie_host_init()
197 	irq = of_irq_get_byname(dev->of_node, "legacy");  in rockchip_pcie_host_init()
201 	ret = rockchip_pcie_init_irq_domain(rockchip);  in rockchip_pcie_host_init()
206 					 rockchip);  in rockchip_pcie_host_init()
209 	rockchip_pcie_writel_apb(rockchip, val, PCIE_CLIENT_HOT_RESET_CTRL);  in rockchip_pcie_host_init()
211 	rockchip_pcie_writel_apb(rockchip, PCIE_CLIENT_RC_MODE,  in rockchip_pcie_host_init()
221 static int rockchip_pcie_clk_init(struct rockchip_pcie *rockchip)  in rockchip_pcie_clk_init()  argument
223 	struct device *dev = rockchip->pci.dev;  in rockchip_pcie_clk_init()
226 	ret = devm_clk_bulk_get_all(dev, &rockchip->clks);  in rockchip_pcie_clk_init()
230 	rockchip->clk_cnt = ret;  in rockchip_pcie_clk_init()
232 	return clk_bulk_prepare_enable(rockchip->clk_cnt, rockchip->clks);  in rockchip_pcie_clk_init()
236 				      struct rockchip_pcie *rockchip)  in rockchip_pcie_resource_get()  argument
238 	rockchip->apb_base = devm_platform_ioremap_resource_byname(pdev, "apb");  in rockchip_pcie_resource_get()
239 	if (IS_ERR(rockchip->apb_base))  in rockchip_pcie_resource_get()
240 		return PTR_ERR(rockchip->apb_base);  in rockchip_pcie_resource_get()
242 	rockchip->rst_gpio = devm_gpiod_get_optional(&pdev->dev, "reset",  in rockchip_pcie_resource_get()
244 	if (IS_ERR(rockchip->rst_gpio))  in rockchip_pcie_resource_get()
245 		return PTR_ERR(rockchip->rst_gpio);  in rockchip_pcie_resource_get()
247 	rockchip->rst = devm_reset_control_array_get_exclusive(&pdev->dev);  in rockchip_pcie_resource_get()
248 	if (IS_ERR(rockchip->rst))  in rockchip_pcie_resource_get()
249 		return dev_err_probe(&pdev->dev, PTR_ERR(rockchip->rst),  in rockchip_pcie_resource_get()
255 static int rockchip_pcie_phy_init(struct rockchip_pcie *rockchip)  in rockchip_pcie_phy_init()  argument
257 	struct device *dev = rockchip->pci.dev;  in rockchip_pcie_phy_init()
260 	rockchip->phy = devm_phy_get(dev, "pcie-phy");  in rockchip_pcie_phy_init()
261 	if (IS_ERR(rockchip->phy))  in rockchip_pcie_phy_init()
262 		return dev_err_probe(dev, PTR_ERR(rockchip->phy),  in rockchip_pcie_phy_init()
263 				     "missing PHY\n");  in rockchip_pcie_phy_init()
265 	ret = phy_init(rockchip->phy);  in rockchip_pcie_phy_init()
269 	ret = phy_power_on(rockchip->phy);  in rockchip_pcie_phy_init()
271 		phy_exit(rockchip->phy);  in rockchip_pcie_phy_init()
276 static void rockchip_pcie_phy_deinit(struct rockchip_pcie *rockchip)  in rockchip_pcie_phy_deinit()  argument
278 	phy_exit(rockchip->phy);  in rockchip_pcie_phy_deinit()
279 	phy_power_off(rockchip->phy);  in rockchip_pcie_phy_deinit()
289 	struct device *dev = &pdev->dev;  in rockchip_pcie_probe()
290 	struct rockchip_pcie *rockchip;  in rockchip_pcie_probe()  local
294 	rockchip = devm_kzalloc(dev, sizeof(*rockchip), GFP_KERNEL);  in rockchip_pcie_probe()
295 	if (!rockchip)  in rockchip_pcie_probe()
296 		return -ENOMEM;  in rockchip_pcie_probe()
298 	platform_set_drvdata(pdev, rockchip);  in rockchip_pcie_probe()
300 	rockchip->pci.dev = dev;  in rockchip_pcie_probe()
301 	rockchip->pci.ops = &dw_pcie_ops;  in rockchip_pcie_probe()
303 	pp = &rockchip->pci.pp;  in rockchip_pcie_probe()
304 	pp->ops = &rockchip_pcie_host_ops;  in rockchip_pcie_probe()
306 	ret = rockchip_pcie_resource_get(pdev, rockchip);  in rockchip_pcie_probe()
310 	ret = reset_control_assert(rockchip->rst);  in rockchip_pcie_probe()
314 	/* DON'T MOVE ME: must be enable before PHY init */  in rockchip_pcie_probe()
315 	rockchip->vpcie3v3 = devm_regulator_get_optional(dev, "vpcie3v3");  in rockchip_pcie_probe()
316 	if (IS_ERR(rockchip->vpcie3v3)) {  in rockchip_pcie_probe()
317 		if (PTR_ERR(rockchip->vpcie3v3) != -ENODEV)  in rockchip_pcie_probe()
318 			return dev_err_probe(dev, PTR_ERR(rockchip->vpcie3v3),  in rockchip_pcie_probe()
320 		rockchip->vpcie3v3 = NULL;  in rockchip_pcie_probe()
322 		ret = regulator_enable(rockchip->vpcie3v3);  in rockchip_pcie_probe()
329 	ret = rockchip_pcie_phy_init(rockchip);  in rockchip_pcie_probe()
333 	ret = reset_control_deassert(rockchip->rst);  in rockchip_pcie_probe()
337 	ret = rockchip_pcie_clk_init(rockchip);  in rockchip_pcie_probe()
345 	clk_bulk_disable_unprepare(rockchip->clk_cnt, rockchip->clks);  in rockchip_pcie_probe()
347 	rockchip_pcie_phy_deinit(rockchip);  in rockchip_pcie_probe()
349 	if (rockchip->vpcie3v3)  in rockchip_pcie_probe()
350 		regulator_disable(rockchip->vpcie3v3);  in rockchip_pcie_probe()
356 	{ .compatible = "rockchip,rk3568-pcie", },
362 		.name	= "rockchip-dw-pcie",