Lines Matching +full:syscon +full:- +full:pcie +full:- +full:mode
1 // SPDX-License-Identifier: GPL-2.0
3 * PCIe host controller driver for Texas Instruments Keystone SoCs
5 * Copyright (C) 2013-2014 Texas Instruments., Ltd.
8 * Author: Murali Karicheri <m-karicheri2@ti.com>
9 * Implementation based on pci-exynos.c and pcie-designware.c
19 #include <linux/mfd/syscon.h>
32 #include "pcie-designware.h"
55 #define PCIE_LEGACY_IRQ_ENABLE_SET(n) (0x188 + (0x10 * ((n) - 1)))
56 #define PCIE_LEGACY_IRQ_ENABLE_CLR(n) (0x18c + (0x10 * ((n) - 1)))
80 #define ERR_NONFATAL BIT(2) /* Non-fatal error */
86 /* PCIE controller device IDs */
93 #define KS_PCIE_DEV_TYPE(mode) ((mode) << 1) argument
106 #define to_keystone_pcie(x) dev_get_drvdata((x)->dev)
109 enum dw_pcie_device_mode mode; member
139 return readl(ks_pcie->va_app_base + offset); in ks_pcie_app_readl()
145 writel(val, ks_pcie->va_app_base + offset); in ks_pcie_app_writel()
152 u32 irq = data->hwirq; in ks_pcie_msi_irq_ack()
178 msi_target = ks_pcie->app.start + MSI_IRQ; in ks_pcie_compose_msi_msg()
179 msg->address_lo = lower_32_bits(msi_target); in ks_pcie_compose_msi_msg()
180 msg->address_hi = upper_32_bits(msi_target); in ks_pcie_compose_msi_msg()
181 msg->data = data->hwirq; in ks_pcie_compose_msi_msg()
183 dev_dbg(pci->dev, "msi#%d address_hi %#x address_lo %#x\n", in ks_pcie_compose_msi_msg()
184 (int)data->hwirq, msg->address_hi, msg->address_lo); in ks_pcie_compose_msi_msg()
190 return -EINVAL; in ks_pcie_msi_set_affinity()
197 u32 irq = data->hwirq; in ks_pcie_msi_mask()
203 raw_spin_lock_irqsave(&pp->lock, flags); in ks_pcie_msi_mask()
214 raw_spin_unlock_irqrestore(&pp->lock, flags); in ks_pcie_msi_mask()
221 u32 irq = data->hwirq; in ks_pcie_msi_unmask()
227 raw_spin_lock_irqsave(&pp->lock, flags); in ks_pcie_msi_unmask()
238 raw_spin_unlock_irqrestore(&pp->lock, flags); in ks_pcie_msi_unmask()
242 .name = "KEYSTONE-PCI-MSI",
252 pp->msi_irq_chip = &ks_pcie_msi_irq_chip; in ks_pcie_msi_host_init()
259 struct dw_pcie *pci = ks_pcie->pci; in ks_pcie_handle_legacy_irq()
260 struct device *dev = pci->dev; in ks_pcie_handle_legacy_irq()
267 generic_handle_domain_irq(ks_pcie->legacy_irq_domain, offset); in ks_pcie_handle_legacy_irq()
282 struct device *dev = ks_pcie->pci->dev; in ks_pcie_handle_error_irq()
300 if (!ks_pcie->is_am6 && (reg & ERR_AXI)) in ks_pcie_handle_error_irq()
303 if (reg & ERR_AER || (ks_pcie->is_am6 && (reg & AM6_ERR_AER))) in ks_pcie_handle_error_irq()
324 .name = "Keystone-PCI-Legacy-IRQ",
336 irq_set_chip_data(irq, d->host_data); in ks_pcie_init_legacy_irq_map()
347 * ks_pcie_set_dbi_mode() - Set DBI mode to access overlaid BAR mask registers
349 * PCIe host controller driver information.
368 * ks_pcie_clear_dbi_mode() - Disable DBI mode
370 * PCIe host controller driver information.
391 u32 num_viewport = ks_pcie->num_viewport; in ks_pcie_setup_rc_app_regs()
392 struct dw_pcie *pci = ks_pcie->pci; in ks_pcie_setup_rc_app_regs()
393 struct dw_pcie_rp *pp = &pci->pp; in ks_pcie_setup_rc_app_regs()
398 mem = resource_list_first_type(&pp->bridge->windows, IORESOURCE_MEM)->res; in ks_pcie_setup_rc_app_regs()
399 start = mem->start; in ks_pcie_setup_rc_app_regs()
400 end = mem->end; in ks_pcie_setup_rc_app_regs()
408 if (ks_pcie->is_am6) in ks_pcie_setup_rc_app_regs()
414 /* Using Direct 1:1 mapping of RC <-> PCI memory space */ in ks_pcie_setup_rc_app_regs()
431 struct dw_pcie_rp *pp = bus->sysdata; in ks_pcie_other_map_bus()
436 reg = CFG_BUS(bus->number) | CFG_DEVICE(PCI_SLOT(devfn)) | in ks_pcie_other_map_bus()
438 if (!pci_is_root_bus(bus->parent)) in ks_pcie_other_map_bus()
442 return pp->va_cfg0_base + where; in ks_pcie_other_map_bus()
452 * ks_pcie_v3_65_add_bus() - keystone add_bus post initialization
459 struct dw_pcie_rp *pp = bus->sysdata; in ks_pcie_v3_65_add_bus()
471 dw_pcie_writel_dbi(pci, PCI_BASE_ADDRESS_0, SZ_4K - 1); in ks_pcie_v3_65_add_bus()
479 dw_pcie_writel_dbi(pci, PCI_BASE_ADDRESS_0, ks_pcie->app.start); in ks_pcie_v3_65_add_bus()
492 * ks_pcie_link_up() - Check if link up
493 * @pci: A pointer to the dw_pcie structure which holds the DesignWare PCIe host
530 struct pci_bus *bus = dev->bus; in ks_pcie_quirk()
549 bridge = bus->self; in ks_pcie_quirk()
550 bus = bus->parent; in ks_pcie_quirk()
564 dev_info(&dev->dev, "limiting MRRS to 256\n"); in ks_pcie_quirk()
573 unsigned int irq = desc->irq_data.hwirq; in ks_pcie_msi_irq_handler()
575 u32 offset = irq - ks_pcie->msi_host_irq; in ks_pcie_msi_irq_handler()
576 struct dw_pcie *pci = ks_pcie->pci; in ks_pcie_msi_irq_handler()
577 struct dw_pcie_rp *pp = &pci->pp; in ks_pcie_msi_irq_handler()
578 struct device *dev = pci->dev; in ks_pcie_msi_irq_handler()
593 * MSI0 status bit 0-3 shows vectors 0, 8, 16, 24, MSI1 status bit in ks_pcie_msi_irq_handler()
602 generic_handle_domain_irq(pp->irq_domain, vector); in ks_pcie_msi_irq_handler()
609 * ks_pcie_legacy_irq_handler() - Handle legacy interrupt
619 struct dw_pcie *pci = ks_pcie->pci; in ks_pcie_legacy_irq_handler()
620 struct device *dev = pci->dev; in ks_pcie_legacy_irq_handler()
621 u32 irq_offset = irq - ks_pcie->legacy_host_irqs[0]; in ks_pcie_legacy_irq_handler()
638 struct device *dev = ks_pcie->pci->dev; in ks_pcie_config_msi_irq()
639 struct device_node *np = ks_pcie->np; in ks_pcie_config_msi_irq()
647 intc_np = of_get_child_by_name(np, "msi-interrupt-controller"); in ks_pcie_config_msi_irq()
649 if (ks_pcie->is_am6) in ks_pcie_config_msi_irq()
651 dev_warn(dev, "msi-interrupt-controller node is absent\n"); in ks_pcie_config_msi_irq()
652 return -EINVAL; in ks_pcie_config_msi_irq()
657 dev_err(dev, "No IRQ entries in msi-interrupt-controller\n"); in ks_pcie_config_msi_irq()
658 ret = -EINVAL; in ks_pcie_config_msi_irq()
665 ret = -EINVAL; in ks_pcie_config_msi_irq()
669 if (!ks_pcie->msi_host_irq) { in ks_pcie_config_msi_irq()
672 ret = -EINVAL; in ks_pcie_config_msi_irq()
675 ks_pcie->msi_host_irq = irq_data->hwirq; in ks_pcie_config_msi_irq()
692 struct device *dev = ks_pcie->pci->dev; in ks_pcie_config_legacy_irq()
694 struct device_node *np = ks_pcie->np; in ks_pcie_config_legacy_irq()
698 intc_np = of_get_child_by_name(np, "legacy-interrupt-controller"); in ks_pcie_config_legacy_irq()
701 * Since legacy interrupts are modeled as edge-interrupts in in ks_pcie_config_legacy_irq()
704 if (ks_pcie->is_am6) in ks_pcie_config_legacy_irq()
706 dev_warn(dev, "legacy-interrupt-controller node is absent\n"); in ks_pcie_config_legacy_irq()
707 return -EINVAL; in ks_pcie_config_legacy_irq()
712 dev_err(dev, "No IRQ entries in legacy-interrupt-controller\n"); in ks_pcie_config_legacy_irq()
713 ret = -EINVAL; in ks_pcie_config_legacy_irq()
720 ret = -EINVAL; in ks_pcie_config_legacy_irq()
723 ks_pcie->legacy_host_irqs[i] = irq; in ks_pcie_config_legacy_irq()
735 ret = -EINVAL; in ks_pcie_config_legacy_irq()
738 ks_pcie->legacy_irq_domain = legacy_irq_domain; in ks_pcie_config_legacy_irq()
762 regs->uregs[reg] = -1; in ks_pcie_fault()
763 regs->ARM_pc += 4; in ks_pcie_fault()
775 struct dw_pcie *pci = ks_pcie->pci; in ks_pcie_init_id()
776 struct device *dev = pci->dev; in ks_pcie_init_id()
777 struct device_node *np = dev->of_node; in ks_pcie_init_id()
781 devctrl_regs = syscon_regmap_lookup_by_phandle(np, "ti,syscon-pcie-id"); in ks_pcie_init_id()
786 ret = of_parse_phandle_with_fixed_args(np, "ti,syscon-pcie-id", 1, 0, &args); in ks_pcie_init_id()
808 pp->bridge->ops = &ks_pcie_ops; in ks_pcie_host_init()
809 if (!ks_pcie->is_am6) in ks_pcie_host_init()
810 pp->bridge->child_ops = &ks_child_pcie_ops; in ks_pcie_host_init()
823 pci->dbi_base + PCI_IO_BASE); in ks_pcie_host_init()
831 * PCIe access errors that result into OCP errors are caught by ARM as in ks_pcie_host_init()
879 ep->page_size = AM654_WIN_SIZE; in ks_pcie_am654_ep_init()
881 dw_pcie_writel_dbi2(pci, PCI_BASE_ADDRESS_0, APP_ADDR_SPACE_0 - 1); in ks_pcie_am654_ep_init()
887 struct dw_pcie *pci = ks_pcie->pci; in ks_pcie_am654_raise_legacy_irq()
921 dev_err(pci->dev, "UNKNOWN IRQ type\n"); in ks_pcie_am654_raise_irq()
922 return -EINVAL; in ks_pcie_am654_raise_irq()
955 int num_lanes = ks_pcie->num_lanes; in ks_pcie_disable_phy()
957 while (num_lanes--) { in ks_pcie_disable_phy()
958 phy_power_off(ks_pcie->phy[num_lanes]); in ks_pcie_disable_phy()
959 phy_exit(ks_pcie->phy[num_lanes]); in ks_pcie_disable_phy()
967 int num_lanes = ks_pcie->num_lanes; in ks_pcie_enable_phy()
970 ret = phy_reset(ks_pcie->phy[i]); in ks_pcie_enable_phy()
974 ret = phy_init(ks_pcie->phy[i]); in ks_pcie_enable_phy()
978 ret = phy_power_on(ks_pcie->phy[i]); in ks_pcie_enable_phy()
980 phy_exit(ks_pcie->phy[i]); in ks_pcie_enable_phy()
988 while (--i >= 0) { in ks_pcie_enable_phy()
989 phy_power_off(ks_pcie->phy[i]); in ks_pcie_enable_phy()
990 phy_exit(ks_pcie->phy[i]); in ks_pcie_enable_phy()
998 struct device_node *np = dev->of_node; in ks_pcie_set_mode()
1001 struct regmap *syscon; in ks_pcie_set_mode() local
1006 syscon = syscon_regmap_lookup_by_phandle(np, "ti,syscon-pcie-mode"); in ks_pcie_set_mode()
1007 if (IS_ERR(syscon)) in ks_pcie_set_mode()
1011 ret = of_parse_phandle_with_fixed_args(np, "ti,syscon-pcie-mode", 1, 0, &args); in ks_pcie_set_mode()
1018 ret = regmap_update_bits(syscon, offset, mask, val); in ks_pcie_set_mode()
1020 dev_err(dev, "failed to set pcie mode\n"); in ks_pcie_set_mode()
1028 enum dw_pcie_device_mode mode) in ks_pcie_am654_set_mode() argument
1030 struct device_node *np = dev->of_node; in ks_pcie_am654_set_mode()
1033 struct regmap *syscon; in ks_pcie_am654_set_mode() local
1038 syscon = syscon_regmap_lookup_by_phandle(np, "ti,syscon-pcie-mode"); in ks_pcie_am654_set_mode()
1039 if (IS_ERR(syscon)) in ks_pcie_am654_set_mode()
1043 ret = of_parse_phandle_with_fixed_args(np, "ti,syscon-pcie-mode", 1, 0, &args); in ks_pcie_am654_set_mode()
1049 switch (mode) { in ks_pcie_am654_set_mode()
1057 dev_err(dev, "INVALID device type %d\n", mode); in ks_pcie_am654_set_mode()
1058 return -EINVAL; in ks_pcie_am654_set_mode()
1061 ret = regmap_update_bits(syscon, offset, mask, val); in ks_pcie_am654_set_mode()
1063 dev_err(dev, "failed to set pcie mode\n"); in ks_pcie_am654_set_mode()
1077 .mode = DW_PCIE_RC_TYPE,
1083 .mode = DW_PCIE_EP_TYPE,
1091 .compatible = "ti,keystone-pcie",
1095 .compatible = "ti,am654-pcie-rc",
1099 .compatible = "ti,am654-pcie-ep",
1108 struct device *dev = &pdev->dev; in ks_pcie_probe()
1109 struct device_node *np = dev->of_node; in ks_pcie_probe()
1111 enum dw_pcie_device_mode mode; in ks_pcie_probe() local
1129 return -EINVAL; in ks_pcie_probe()
1131 version = data->version; in ks_pcie_probe()
1132 host_ops = data->host_ops; in ks_pcie_probe()
1133 ep_ops = data->ep_ops; in ks_pcie_probe()
1134 mode = data->mode; in ks_pcie_probe()
1138 return -ENOMEM; in ks_pcie_probe()
1142 return -ENOMEM; in ks_pcie_probe()
1145 ks_pcie->va_app_base = devm_ioremap_resource(dev, res); in ks_pcie_probe()
1146 if (IS_ERR(ks_pcie->va_app_base)) in ks_pcie_probe()
1147 return PTR_ERR(ks_pcie->va_app_base); in ks_pcie_probe()
1149 ks_pcie->app = *res; in ks_pcie_probe()
1156 if (of_device_is_compatible(np, "ti,am654-pcie-rc")) in ks_pcie_probe()
1157 ks_pcie->is_am6 = true; in ks_pcie_probe()
1159 pci->dbi_base = base; in ks_pcie_probe()
1160 pci->dbi_base2 = base; in ks_pcie_probe()
1161 pci->dev = dev; in ks_pcie_probe()
1162 pci->ops = &ks_pcie_dw_pcie_ops; in ks_pcie_probe()
1163 pci->version = version; in ks_pcie_probe()
1170 "ks-pcie-error-irq", ks_pcie); in ks_pcie_probe()
1177 ret = of_property_read_u32(np, "num-lanes", &num_lanes); in ks_pcie_probe()
1183 return -ENOMEM; in ks_pcie_probe()
1187 return -ENOMEM; in ks_pcie_probe()
1190 snprintf(name, sizeof(name), "pcie-phy%d", i); in ks_pcie_probe()
1200 link[i] = device_link_add(dev, &phy[i]->dev, DL_FLAG_STATELESS); in ks_pcie_probe()
1202 ret = -EINVAL; in ks_pcie_probe()
1207 ks_pcie->np = np; in ks_pcie_probe()
1208 ks_pcie->pci = pci; in ks_pcie_probe()
1209 ks_pcie->link = link; in ks_pcie_probe()
1210 ks_pcie->num_lanes = num_lanes; in ks_pcie_probe()
1211 ks_pcie->phy = phy; in ks_pcie_probe()
1217 if (ret != -EPROBE_DEFER) in ks_pcie_probe()
1237 ret = ks_pcie_am654_set_mode(dev, mode); in ks_pcie_probe()
1243 switch (mode) { in ks_pcie_probe()
1246 ret = -ENODEV; in ks_pcie_probe()
1250 ret = of_property_read_u32(np, "num-viewport", &num_viewport); in ks_pcie_probe()
1252 dev_err(dev, "unable to read *num-viewport* property\n"); in ks_pcie_probe()
1261 * mode is selected while enabling the PHY. So deassert PERST# in ks_pcie_probe()
1269 ks_pcie->num_viewport = num_viewport; in ks_pcie_probe()
1270 pci->pp.ops = host_ops; in ks_pcie_probe()
1271 ret = dw_pcie_host_init(&pci->pp); in ks_pcie_probe()
1277 ret = -ENODEV; in ks_pcie_probe()
1281 pci->ep.ops = ep_ops; in ks_pcie_probe()
1282 ret = dw_pcie_ep_init(&pci->ep); in ks_pcie_probe()
1287 dev_err(dev, "INVALID device type %d\n", mode); in ks_pcie_probe()
1300 while (--i >= 0 && link[i]) in ks_pcie_probe()
1309 struct device_link **link = ks_pcie->link; in ks_pcie_remove()
1310 int num_lanes = ks_pcie->num_lanes; in ks_pcie_remove()
1311 struct device *dev = &pdev->dev; in ks_pcie_remove()
1316 while (num_lanes--) in ks_pcie_remove()
1326 .name = "keystone-pcie",