Lines Matching +full:imx8mq +full:- +full:reset
1 // SPDX-License-Identifier: GPL-2.0
17 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
18 #include <linux/mfd/syscon/imx7-iomuxc-gpr.h>
31 #include <linux/reset.h>
36 #include "pcie-designware.h"
45 #define to_imx6_pcie(x) dev_get_drvdata((x)->dev)
52 IMX8MQ, enumerator
104 /* PCIe Port Logic registers (memory-mapped) */
117 /* PHY registers (not memory-mapped) */
154 WARN_ON(imx6_pcie->drvdata->variant != IMX8MQ && in imx6_pcie_grp_offset()
155 imx6_pcie->drvdata->variant != IMX8MM && in imx6_pcie_grp_offset()
156 imx6_pcie->drvdata->variant != IMX8MP); in imx6_pcie_grp_offset()
157 return imx6_pcie->controller_id == 1 ? IOMUXC_GPR16 : IOMUXC_GPR14; in imx6_pcie_grp_offset()
164 if (imx6_pcie->drvdata->variant == IMX8MQ && in imx6_pcie_configure_type()
165 imx6_pcie->controller_id == 1) { in imx6_pcie_configure_type()
175 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, mask, val); in imx6_pcie_configure_type()
180 struct dw_pcie *pci = imx6_pcie->pci; in pcie_phy_poll_ack()
196 return -ETIMEDOUT; in pcie_phy_poll_ack()
201 struct dw_pcie *pci = imx6_pcie->pci; in pcie_phy_wait_ack()
221 /* Read from the 16-bit PCIe PHY control registers (not memory-mapped) */
224 struct dw_pcie *pci = imx6_pcie->pci; in pcie_phy_read()
250 struct dw_pcie *pci = imx6_pcie->pci; in pcie_phy_write()
275 /* wait for ack de-assertion */ in pcie_phy_write()
293 /* wait for ack de-assertion */ in pcie_phy_write()
305 switch (imx6_pcie->drvdata->variant) { in imx6_pcie_init_phy()
313 case IMX8MQ: in imx6_pcie_init_phy()
318 regmap_update_bits(imx6_pcie->iomuxc_gpr, in imx6_pcie_init_phy()
327 if (imx6_pcie->vph && in imx6_pcie_init_phy()
328 regulator_get_voltage(imx6_pcie->vph) > 3000000) in imx6_pcie_init_phy()
329 regmap_update_bits(imx6_pcie->iomuxc_gpr, in imx6_pcie_init_phy()
335 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, in imx6_pcie_init_phy()
339 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, in imx6_pcie_init_phy()
344 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, in imx6_pcie_init_phy()
348 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, in imx6_pcie_init_phy()
351 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8, in imx6_pcie_init_phy()
353 imx6_pcie->tx_deemph_gen1 << 0); in imx6_pcie_init_phy()
354 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8, in imx6_pcie_init_phy()
356 imx6_pcie->tx_deemph_gen2_3p5db << 6); in imx6_pcie_init_phy()
357 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8, in imx6_pcie_init_phy()
359 imx6_pcie->tx_deemph_gen2_6db << 12); in imx6_pcie_init_phy()
360 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8, in imx6_pcie_init_phy()
362 imx6_pcie->tx_swing_full << 18); in imx6_pcie_init_phy()
363 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8, in imx6_pcie_init_phy()
365 imx6_pcie->tx_swing_low << 25); in imx6_pcie_init_phy()
375 struct device *dev = imx6_pcie->pci->dev; in imx7d_pcie_wait_for_phy_pll_lock()
377 if (regmap_read_poll_timeout(imx6_pcie->iomuxc_gpr, in imx7d_pcie_wait_for_phy_pll_lock()
387 unsigned long phy_rate = clk_get_rate(imx6_pcie->pcie_phy); in imx6_setup_phy_mpll()
391 if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_IMX6_PHY)) in imx6_setup_phy_mpll()
410 dev_err(imx6_pcie->pci->dev, in imx6_setup_phy_mpll()
412 return -EINVAL; in imx6_setup_phy_mpll()
436 if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_IMX6_PHY)) in imx6_pcie_reset_phy()
463 * make it look like it read all-ones. in imx6q_pcie_abort_handler()
471 val = -1; in imx6q_pcie_abort_handler()
473 regs->uregs[reg] = val; in imx6q_pcie_abort_handler()
474 regs->ARM_pc += 4; in imx6q_pcie_abort_handler()
479 regs->uregs[reg] = -1; in imx6q_pcie_abort_handler()
480 regs->ARM_pc += 4; in imx6q_pcie_abort_handler()
494 if (dev->pm_domain) in imx6_pcie_attach_pd()
497 imx6_pcie->pd_pcie = dev_pm_domain_attach_by_name(dev, "pcie"); in imx6_pcie_attach_pd()
498 if (IS_ERR(imx6_pcie->pd_pcie)) in imx6_pcie_attach_pd()
499 return PTR_ERR(imx6_pcie->pd_pcie); in imx6_pcie_attach_pd()
501 if (!imx6_pcie->pd_pcie) in imx6_pcie_attach_pd()
503 link = device_link_add(dev, imx6_pcie->pd_pcie, in imx6_pcie_attach_pd()
509 return -EINVAL; in imx6_pcie_attach_pd()
512 imx6_pcie->pd_pcie_phy = dev_pm_domain_attach_by_name(dev, "pcie_phy"); in imx6_pcie_attach_pd()
513 if (IS_ERR(imx6_pcie->pd_pcie_phy)) in imx6_pcie_attach_pd()
514 return PTR_ERR(imx6_pcie->pd_pcie_phy); in imx6_pcie_attach_pd()
516 link = device_link_add(dev, imx6_pcie->pd_pcie_phy, in imx6_pcie_attach_pd()
522 return -EINVAL; in imx6_pcie_attach_pd()
530 struct dw_pcie *pci = imx6_pcie->pci; in imx6_pcie_enable_ref_clk()
531 struct device *dev = pci->dev; in imx6_pcie_enable_ref_clk()
535 switch (imx6_pcie->drvdata->variant) { in imx6_pcie_enable_ref_clk()
537 ret = clk_prepare_enable(imx6_pcie->pcie_inbound_axi); in imx6_pcie_enable_ref_clk()
543 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, in imx6_pcie_enable_ref_clk()
549 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, in imx6_pcie_enable_ref_clk()
552 * the async reset input need ref clock to sync internally, in imx6_pcie_enable_ref_clk()
553 * when the ref clock comes after reset, internal synced in imx6_pcie_enable_ref_clk()
554 * reset time is too short, cannot meet the requirement. in imx6_pcie_enable_ref_clk()
558 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, in imx6_pcie_enable_ref_clk()
564 case IMX8MQ: in imx6_pcie_enable_ref_clk()
566 ret = clk_prepare_enable(imx6_pcie->pcie_aux); in imx6_pcie_enable_ref_clk()
577 regmap_update_bits(imx6_pcie->iomuxc_gpr, offset, in imx6_pcie_enable_ref_clk()
580 regmap_update_bits(imx6_pcie->iomuxc_gpr, offset, in imx6_pcie_enable_ref_clk()
591 switch (imx6_pcie->drvdata->variant) { in imx6_pcie_disable_ref_clk()
593 clk_disable_unprepare(imx6_pcie->pcie_inbound_axi); in imx6_pcie_disable_ref_clk()
597 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, in imx6_pcie_disable_ref_clk()
599 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, in imx6_pcie_disable_ref_clk()
604 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, in imx6_pcie_disable_ref_clk()
609 case IMX8MQ: in imx6_pcie_disable_ref_clk()
611 clk_disable_unprepare(imx6_pcie->pcie_aux); in imx6_pcie_disable_ref_clk()
620 struct dw_pcie *pci = imx6_pcie->pci; in imx6_pcie_clk_enable()
621 struct device *dev = pci->dev; in imx6_pcie_clk_enable()
624 ret = clk_prepare_enable(imx6_pcie->pcie_phy); in imx6_pcie_clk_enable()
630 ret = clk_prepare_enable(imx6_pcie->pcie_bus); in imx6_pcie_clk_enable()
636 ret = clk_prepare_enable(imx6_pcie->pcie); in imx6_pcie_clk_enable()
653 clk_disable_unprepare(imx6_pcie->pcie); in imx6_pcie_clk_enable()
655 clk_disable_unprepare(imx6_pcie->pcie_bus); in imx6_pcie_clk_enable()
657 clk_disable_unprepare(imx6_pcie->pcie_phy); in imx6_pcie_clk_enable()
665 clk_disable_unprepare(imx6_pcie->pcie); in imx6_pcie_clk_disable()
666 clk_disable_unprepare(imx6_pcie->pcie_bus); in imx6_pcie_clk_disable()
667 clk_disable_unprepare(imx6_pcie->pcie_phy); in imx6_pcie_clk_disable()
672 switch (imx6_pcie->drvdata->variant) { in imx6_pcie_assert_core_reset()
674 case IMX8MQ: in imx6_pcie_assert_core_reset()
675 reset_control_assert(imx6_pcie->pciephy_reset); in imx6_pcie_assert_core_reset()
679 reset_control_assert(imx6_pcie->apps_reset); in imx6_pcie_assert_core_reset()
682 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, in imx6_pcie_assert_core_reset()
685 /* Force PCIe PHY reset */ in imx6_pcie_assert_core_reset()
686 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR5, in imx6_pcie_assert_core_reset()
691 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, in imx6_pcie_assert_core_reset()
696 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, in imx6_pcie_assert_core_reset()
698 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, in imx6_pcie_assert_core_reset()
703 /* Some boards don't have PCIe reset GPIO. */ in imx6_pcie_assert_core_reset()
704 if (gpio_is_valid(imx6_pcie->reset_gpio)) in imx6_pcie_assert_core_reset()
705 gpio_set_value_cansleep(imx6_pcie->reset_gpio, in imx6_pcie_assert_core_reset()
706 imx6_pcie->gpio_active_high); in imx6_pcie_assert_core_reset()
711 struct dw_pcie *pci = imx6_pcie->pci; in imx6_pcie_deassert_core_reset()
712 struct device *dev = pci->dev; in imx6_pcie_deassert_core_reset()
714 switch (imx6_pcie->drvdata->variant) { in imx6_pcie_deassert_core_reset()
715 case IMX8MQ: in imx6_pcie_deassert_core_reset()
716 reset_control_deassert(imx6_pcie->pciephy_reset); in imx6_pcie_deassert_core_reset()
719 reset_control_deassert(imx6_pcie->pciephy_reset); in imx6_pcie_deassert_core_reset()
721 /* Workaround for ERR010728, failure of PCI-e PLL VCO to in imx6_pcie_deassert_core_reset()
722 * oscillate, especially when cold. This turns off "Duty-cycle in imx6_pcie_deassert_core_reset()
725 if (likely(imx6_pcie->phy_base)) { in imx6_pcie_deassert_core_reset()
726 /* De-assert DCC_FB_EN */ in imx6_pcie_deassert_core_reset()
728 imx6_pcie->phy_base + PCIE_PHY_CMN_REG4); in imx6_pcie_deassert_core_reset()
732 imx6_pcie->phy_base + PCIE_PHY_CMN_REG24); in imx6_pcie_deassert_core_reset()
735 imx6_pcie->phy_base + PCIE_PHY_CMN_REG26); in imx6_pcie_deassert_core_reset()
737 dev_warn(dev, "Unable to apply ERR010728 workaround. DT missing fsl,imx7d-pcie-phy phandle ?\n"); in imx6_pcie_deassert_core_reset()
743 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR5, in imx6_pcie_deassert_core_reset()
747 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, in imx6_pcie_deassert_core_reset()
758 /* Some boards don't have PCIe reset GPIO. */ in imx6_pcie_deassert_core_reset()
759 if (gpio_is_valid(imx6_pcie->reset_gpio)) { in imx6_pcie_deassert_core_reset()
761 gpio_set_value_cansleep(imx6_pcie->reset_gpio, in imx6_pcie_deassert_core_reset()
762 !imx6_pcie->gpio_active_high); in imx6_pcie_deassert_core_reset()
772 struct dw_pcie *pci = imx6_pcie->pci; in imx6_pcie_wait_for_speed_change()
773 struct device *dev = pci->dev; in imx6_pcie_wait_for_speed_change()
786 return -ETIMEDOUT; in imx6_pcie_wait_for_speed_change()
793 switch (imx6_pcie->drvdata->variant) { in imx6_pcie_ltssm_enable()
797 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, in imx6_pcie_ltssm_enable()
802 case IMX8MQ: in imx6_pcie_ltssm_enable()
805 reset_control_deassert(imx6_pcie->apps_reset); in imx6_pcie_ltssm_enable()
814 switch (imx6_pcie->drvdata->variant) { in imx6_pcie_ltssm_disable()
818 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, in imx6_pcie_ltssm_disable()
822 case IMX8MQ: in imx6_pcie_ltssm_disable()
825 reset_control_assert(imx6_pcie->apps_reset); in imx6_pcie_ltssm_disable()
833 struct device *dev = pci->dev; in imx6_pcie_start_link()
857 if (pci->link_gen > 1) { in imx6_pcie_start_link()
862 tmp |= pci->link_gen; in imx6_pcie_start_link()
874 if (imx6_pcie->drvdata->flags & in imx6_pcie_start_link()
879 * occurs and we go Gen1 -> yep, Gen1. The difference in imx6_pcie_start_link()
900 imx6_pcie->link_is_up = true; in imx6_pcie_start_link()
906 imx6_pcie->link_is_up = false; in imx6_pcie_start_link()
916 struct device *dev = pci->dev; in imx6_pcie_stop_link()
925 struct device *dev = pci->dev; in imx6_pcie_host_init()
929 if (imx6_pcie->vpcie) { in imx6_pcie_host_init()
930 ret = regulator_enable(imx6_pcie->vpcie); in imx6_pcie_host_init()
947 if (imx6_pcie->phy) { in imx6_pcie_host_init()
948 ret = phy_init(imx6_pcie->phy); in imx6_pcie_host_init()
957 dev_err(dev, "pcie deassert core reset failed: %d\n", ret); in imx6_pcie_host_init()
961 if (imx6_pcie->phy) { in imx6_pcie_host_init()
962 ret = phy_power_on(imx6_pcie->phy); in imx6_pcie_host_init()
973 if (imx6_pcie->phy) in imx6_pcie_host_init()
974 phy_exit(imx6_pcie->phy); in imx6_pcie_host_init()
978 if (imx6_pcie->vpcie) in imx6_pcie_host_init()
979 regulator_disable(imx6_pcie->vpcie); in imx6_pcie_host_init()
988 if (imx6_pcie->phy) { in imx6_pcie_host_exit()
989 if (phy_power_off(imx6_pcie->phy)) in imx6_pcie_host_exit()
990 dev_err(pci->dev, "unable to power off PHY\n"); in imx6_pcie_host_exit()
991 phy_exit(imx6_pcie->phy); in imx6_pcie_host_exit()
995 if (imx6_pcie->vpcie) in imx6_pcie_host_exit()
996 regulator_disable(imx6_pcie->vpcie); in imx6_pcie_host_exit()
1009 struct device *dev = imx6_pcie->pci->dev; in imx6_pcie_pm_turnoff()
1011 /* Some variants have a turnoff reset in DT */ in imx6_pcie_pm_turnoff()
1012 if (imx6_pcie->turnoff_reset) { in imx6_pcie_pm_turnoff()
1013 reset_control_assert(imx6_pcie->turnoff_reset); in imx6_pcie_pm_turnoff()
1014 reset_control_deassert(imx6_pcie->turnoff_reset); in imx6_pcie_pm_turnoff()
1019 switch (imx6_pcie->drvdata->variant) { in imx6_pcie_pm_turnoff()
1022 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, in imx6_pcie_pm_turnoff()
1025 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, in imx6_pcie_pm_turnoff()
1037 * The standard recommends a 1-10ms timeout after which to in imx6_pcie_pm_turnoff()
1047 struct dw_pcie_rp *pp = &imx6_pcie->pci->pp; in imx6_pcie_suspend_noirq()
1049 if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_SUPPORTS_SUSPEND)) in imx6_pcie_suspend_noirq()
1053 imx6_pcie_stop_link(imx6_pcie->pci); in imx6_pcie_suspend_noirq()
1063 struct dw_pcie_rp *pp = &imx6_pcie->pci->pp; in imx6_pcie_resume_noirq()
1065 if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_SUPPORTS_SUSPEND)) in imx6_pcie_resume_noirq()
1073 if (imx6_pcie->link_is_up) in imx6_pcie_resume_noirq()
1074 imx6_pcie_start_link(imx6_pcie->pci); in imx6_pcie_resume_noirq()
1086 struct device *dev = &pdev->dev; in imx6_pcie_probe()
1091 struct device_node *node = dev->of_node; in imx6_pcie_probe()
1097 return -ENOMEM; in imx6_pcie_probe()
1101 return -ENOMEM; in imx6_pcie_probe()
1103 pci->dev = dev; in imx6_pcie_probe()
1104 pci->ops = &dw_pcie_ops; in imx6_pcie_probe()
1105 pci->pp.ops = &imx6_pcie_host_ops; in imx6_pcie_probe()
1107 imx6_pcie->pci = pci; in imx6_pcie_probe()
1108 imx6_pcie->drvdata = of_device_get_match_data(dev); in imx6_pcie_probe()
1111 np = of_parse_phandle(node, "fsl,imx7d-pcie-phy", 0); in imx6_pcie_probe()
1120 imx6_pcie->phy_base = devm_ioremap_resource(dev, &res); in imx6_pcie_probe()
1121 if (IS_ERR(imx6_pcie->phy_base)) in imx6_pcie_probe()
1122 return PTR_ERR(imx6_pcie->phy_base); in imx6_pcie_probe()
1126 pci->dbi_base = devm_ioremap_resource(dev, dbi_base); in imx6_pcie_probe()
1127 if (IS_ERR(pci->dbi_base)) in imx6_pcie_probe()
1128 return PTR_ERR(pci->dbi_base); in imx6_pcie_probe()
1131 imx6_pcie->reset_gpio = of_get_named_gpio(node, "reset-gpio", 0); in imx6_pcie_probe()
1132 imx6_pcie->gpio_active_high = of_property_read_bool(node, in imx6_pcie_probe()
1133 "reset-gpio-active-high"); in imx6_pcie_probe()
1134 if (gpio_is_valid(imx6_pcie->reset_gpio)) { in imx6_pcie_probe()
1135 ret = devm_gpio_request_one(dev, imx6_pcie->reset_gpio, in imx6_pcie_probe()
1136 imx6_pcie->gpio_active_high ? in imx6_pcie_probe()
1139 "PCIe reset"); in imx6_pcie_probe()
1141 dev_err(dev, "unable to get reset gpio\n"); in imx6_pcie_probe()
1144 } else if (imx6_pcie->reset_gpio == -EPROBE_DEFER) { in imx6_pcie_probe()
1145 return imx6_pcie->reset_gpio; in imx6_pcie_probe()
1149 imx6_pcie->pcie_bus = devm_clk_get(dev, "pcie_bus"); in imx6_pcie_probe()
1150 if (IS_ERR(imx6_pcie->pcie_bus)) in imx6_pcie_probe()
1151 return dev_err_probe(dev, PTR_ERR(imx6_pcie->pcie_bus), in imx6_pcie_probe()
1154 imx6_pcie->pcie = devm_clk_get(dev, "pcie"); in imx6_pcie_probe()
1155 if (IS_ERR(imx6_pcie->pcie)) in imx6_pcie_probe()
1156 return dev_err_probe(dev, PTR_ERR(imx6_pcie->pcie), in imx6_pcie_probe()
1159 switch (imx6_pcie->drvdata->variant) { in imx6_pcie_probe()
1161 imx6_pcie->pcie_inbound_axi = devm_clk_get(dev, in imx6_pcie_probe()
1163 if (IS_ERR(imx6_pcie->pcie_inbound_axi)) in imx6_pcie_probe()
1164 return dev_err_probe(dev, PTR_ERR(imx6_pcie->pcie_inbound_axi), in imx6_pcie_probe()
1167 case IMX8MQ: in imx6_pcie_probe()
1168 imx6_pcie->pcie_aux = devm_clk_get(dev, "pcie_aux"); in imx6_pcie_probe()
1169 if (IS_ERR(imx6_pcie->pcie_aux)) in imx6_pcie_probe()
1170 return dev_err_probe(dev, PTR_ERR(imx6_pcie->pcie_aux), in imx6_pcie_probe()
1174 if (dbi_base->start == IMX8MQ_PCIE2_BASE_ADDR) in imx6_pcie_probe()
1175 imx6_pcie->controller_id = 1; in imx6_pcie_probe()
1177 imx6_pcie->pciephy_reset = devm_reset_control_get_exclusive(dev, in imx6_pcie_probe()
1179 if (IS_ERR(imx6_pcie->pciephy_reset)) { in imx6_pcie_probe()
1180 dev_err(dev, "Failed to get PCIEPHY reset control\n"); in imx6_pcie_probe()
1181 return PTR_ERR(imx6_pcie->pciephy_reset); in imx6_pcie_probe()
1184 imx6_pcie->apps_reset = devm_reset_control_get_exclusive(dev, in imx6_pcie_probe()
1186 if (IS_ERR(imx6_pcie->apps_reset)) { in imx6_pcie_probe()
1187 dev_err(dev, "Failed to get PCIE APPS reset control\n"); in imx6_pcie_probe()
1188 return PTR_ERR(imx6_pcie->apps_reset); in imx6_pcie_probe()
1193 imx6_pcie->pcie_aux = devm_clk_get(dev, "pcie_aux"); in imx6_pcie_probe()
1194 if (IS_ERR(imx6_pcie->pcie_aux)) in imx6_pcie_probe()
1195 return dev_err_probe(dev, PTR_ERR(imx6_pcie->pcie_aux), in imx6_pcie_probe()
1197 imx6_pcie->apps_reset = devm_reset_control_get_exclusive(dev, in imx6_pcie_probe()
1199 if (IS_ERR(imx6_pcie->apps_reset)) in imx6_pcie_probe()
1200 return dev_err_probe(dev, PTR_ERR(imx6_pcie->apps_reset), in imx6_pcie_probe()
1201 "failed to get pcie apps reset control\n"); in imx6_pcie_probe()
1203 imx6_pcie->phy = devm_phy_get(dev, "pcie-phy"); in imx6_pcie_probe()
1204 if (IS_ERR(imx6_pcie->phy)) in imx6_pcie_probe()
1205 return dev_err_probe(dev, PTR_ERR(imx6_pcie->phy), in imx6_pcie_probe()
1213 if (imx6_pcie->phy == NULL) { in imx6_pcie_probe()
1214 imx6_pcie->pcie_phy = devm_clk_get(dev, "pcie_phy"); in imx6_pcie_probe()
1215 if (IS_ERR(imx6_pcie->pcie_phy)) in imx6_pcie_probe()
1216 return dev_err_probe(dev, PTR_ERR(imx6_pcie->pcie_phy), in imx6_pcie_probe()
1221 /* Grab turnoff reset */ in imx6_pcie_probe()
1222 imx6_pcie->turnoff_reset = devm_reset_control_get_optional_exclusive(dev, "turnoff"); in imx6_pcie_probe()
1223 if (IS_ERR(imx6_pcie->turnoff_reset)) { in imx6_pcie_probe()
1224 dev_err(dev, "Failed to get TURNOFF reset control\n"); in imx6_pcie_probe()
1225 return PTR_ERR(imx6_pcie->turnoff_reset); in imx6_pcie_probe()
1229 imx6_pcie->iomuxc_gpr = in imx6_pcie_probe()
1230 syscon_regmap_lookup_by_compatible(imx6_pcie->drvdata->gpr); in imx6_pcie_probe()
1231 if (IS_ERR(imx6_pcie->iomuxc_gpr)) { in imx6_pcie_probe()
1233 return PTR_ERR(imx6_pcie->iomuxc_gpr); in imx6_pcie_probe()
1237 if (of_property_read_u32(node, "fsl,tx-deemph-gen1", in imx6_pcie_probe()
1238 &imx6_pcie->tx_deemph_gen1)) in imx6_pcie_probe()
1239 imx6_pcie->tx_deemph_gen1 = 0; in imx6_pcie_probe()
1241 if (of_property_read_u32(node, "fsl,tx-deemph-gen2-3p5db", in imx6_pcie_probe()
1242 &imx6_pcie->tx_deemph_gen2_3p5db)) in imx6_pcie_probe()
1243 imx6_pcie->tx_deemph_gen2_3p5db = 0; in imx6_pcie_probe()
1245 if (of_property_read_u32(node, "fsl,tx-deemph-gen2-6db", in imx6_pcie_probe()
1246 &imx6_pcie->tx_deemph_gen2_6db)) in imx6_pcie_probe()
1247 imx6_pcie->tx_deemph_gen2_6db = 20; in imx6_pcie_probe()
1249 if (of_property_read_u32(node, "fsl,tx-swing-full", in imx6_pcie_probe()
1250 &imx6_pcie->tx_swing_full)) in imx6_pcie_probe()
1251 imx6_pcie->tx_swing_full = 127; in imx6_pcie_probe()
1253 if (of_property_read_u32(node, "fsl,tx-swing-low", in imx6_pcie_probe()
1254 &imx6_pcie->tx_swing_low)) in imx6_pcie_probe()
1255 imx6_pcie->tx_swing_low = 127; in imx6_pcie_probe()
1258 pci->link_gen = 1; in imx6_pcie_probe()
1259 of_property_read_u32(node, "fsl,max-link-speed", &pci->link_gen); in imx6_pcie_probe()
1261 imx6_pcie->vpcie = devm_regulator_get_optional(&pdev->dev, "vpcie"); in imx6_pcie_probe()
1262 if (IS_ERR(imx6_pcie->vpcie)) { in imx6_pcie_probe()
1263 if (PTR_ERR(imx6_pcie->vpcie) != -ENODEV) in imx6_pcie_probe()
1264 return PTR_ERR(imx6_pcie->vpcie); in imx6_pcie_probe()
1265 imx6_pcie->vpcie = NULL; in imx6_pcie_probe()
1268 imx6_pcie->vph = devm_regulator_get_optional(&pdev->dev, "vph"); in imx6_pcie_probe()
1269 if (IS_ERR(imx6_pcie->vph)) { in imx6_pcie_probe()
1270 if (PTR_ERR(imx6_pcie->vph) != -ENODEV) in imx6_pcie_probe()
1271 return PTR_ERR(imx6_pcie->vph); in imx6_pcie_probe()
1272 imx6_pcie->vph = NULL; in imx6_pcie_probe()
1281 ret = dw_pcie_host_init(&pci->pp); in imx6_pcie_probe()
1309 .gpr = "fsl,imx6q-iomuxc-gpr",
1316 .gpr = "fsl,imx6q-iomuxc-gpr",
1324 .gpr = "fsl,imx6q-iomuxc-gpr",
1329 .gpr = "fsl,imx7d-iomuxc-gpr",
1331 [IMX8MQ] = {
1332 .variant = IMX8MQ,
1333 .gpr = "fsl,imx8mq-iomuxc-gpr",
1338 .gpr = "fsl,imx8mm-iomuxc-gpr",
1343 .gpr = "fsl,imx8mp-iomuxc-gpr",
1348 { .compatible = "fsl,imx6q-pcie", .data = &drvdata[IMX6Q], },
1349 { .compatible = "fsl,imx6sx-pcie", .data = &drvdata[IMX6SX], },
1350 { .compatible = "fsl,imx6qp-pcie", .data = &drvdata[IMX6QP], },
1351 { .compatible = "fsl,imx7d-pcie", .data = &drvdata[IMX7D], },
1352 { .compatible = "fsl,imx8mq-pcie", .data = &drvdata[IMX8MQ], },
1353 { .compatible = "fsl,imx8mm-pcie", .data = &drvdata[IMX8MM], },
1354 { .compatible = "fsl,imx8mp-pcie", .data = &drvdata[IMX8MP], },
1360 .name = "imx6q-pcie",
1372 struct pci_bus *bus = dev->bus; in imx6_pcie_quirk()
1373 struct dw_pcie_rp *pp = bus->sysdata; in imx6_pcie_quirk()
1376 if (!bus->dev.parent || !bus->dev.parent->parent) in imx6_pcie_quirk()
1380 if (bus->dev.parent->parent->driver != &imx6_pcie_driver.driver) in imx6_pcie_quirk()
1391 if (imx6_pcie->drvdata->dbi_length) { in imx6_pcie_quirk()
1392 dev->cfg_size = imx6_pcie->drvdata->dbi_length; in imx6_pcie_quirk()
1393 dev_info(&dev->dev, "Limiting cfg_size to %d\n", in imx6_pcie_quirk()
1394 dev->cfg_size); in imx6_pcie_quirk()
1407 * by kernel and since imx6q_pcie_abort_handler() is a no-op, in imx6_pcie_init()
1412 "external abort on non-linefetch"); in imx6_pcie_init()