3  * pcie-dra7xx - PCIe controller driver for TI DRA7xx SoCs
35 /* PCIe controller wrapper DRA7XX configuration registers */
123 	struct dra7xx_pcie *dra7xx = to_dra7xx_pcie(pci);  in dra7xx_pcie_link_up()  local
124 	u32 reg = dra7xx_pcie_readl(dra7xx, PCIECTRL_DRA7XX_CONF_PHY_CS);  in dra7xx_pcie_link_up()
131 	struct dra7xx_pcie *dra7xx = to_dra7xx_pcie(pci);  in dra7xx_pcie_stop_link()  local
134 	reg = dra7xx_pcie_readl(dra7xx, PCIECTRL_DRA7XX_CONF_DEVICE_CMD);  in dra7xx_pcie_stop_link()
136 	dra7xx_pcie_writel(dra7xx, PCIECTRL_DRA7XX_CONF_DEVICE_CMD, reg);  in dra7xx_pcie_stop_link()
141 	struct dra7xx_pcie *dra7xx = to_dra7xx_pcie(pci);  in dra7xx_pcie_establish_link()  local
150 	reg = dra7xx_pcie_readl(dra7xx, PCIECTRL_DRA7XX_CONF_DEVICE_CMD);  in dra7xx_pcie_establish_link()
152 	dra7xx_pcie_writel(dra7xx, PCIECTRL_DRA7XX_CONF_DEVICE_CMD, reg);  in dra7xx_pcie_establish_link()
157 static void dra7xx_pcie_enable_msi_interrupts(struct dra7xx_pcie *dra7xx)  in dra7xx_pcie_enable_msi_interrupts()  argument
159 	dra7xx_pcie_writel(dra7xx, PCIECTRL_DRA7XX_CONF_IRQSTATUS_MSI,  in dra7xx_pcie_enable_msi_interrupts()
162 	dra7xx_pcie_writel(dra7xx,  in dra7xx_pcie_enable_msi_interrupts()
167 static void dra7xx_pcie_enable_wrapper_interrupts(struct dra7xx_pcie *dra7xx)  in dra7xx_pcie_enable_wrapper_interrupts()  argument
169 	dra7xx_pcie_writel(dra7xx, PCIECTRL_DRA7XX_CONF_IRQSTATUS_MAIN,  in dra7xx_pcie_enable_wrapper_interrupts()
171 	dra7xx_pcie_writel(dra7xx, PCIECTRL_DRA7XX_CONF_IRQENABLE_SET_MAIN,  in dra7xx_pcie_enable_wrapper_interrupts()
175 static void dra7xx_pcie_enable_interrupts(struct dra7xx_pcie *dra7xx)  in dra7xx_pcie_enable_interrupts()  argument
177 	dra7xx_pcie_enable_wrapper_interrupts(dra7xx);  in dra7xx_pcie_enable_interrupts()
178 	dra7xx_pcie_enable_msi_interrupts(dra7xx);  in dra7xx_pcie_enable_interrupts()
184 	struct dra7xx_pcie *dra7xx = to_dra7xx_pcie(pci);  in dra7xx_pcie_host_init()  local
186 	dra7xx_pcie_enable_interrupts(dra7xx);  in dra7xx_pcie_host_init()
257 	struct dra7xx_pcie *dra7xx;  in dra7xx_pcie_msi_irq_handler()  local
267 	dra7xx = to_dra7xx_pcie(pci);  in dra7xx_pcie_msi_irq_handler()
269 	reg = dra7xx_pcie_readl(dra7xx, PCIECTRL_DRA7XX_CONF_IRQSTATUS_MSI);  in dra7xx_pcie_msi_irq_handler()
270 	dra7xx_pcie_writel(dra7xx, PCIECTRL_DRA7XX_CONF_IRQSTATUS_MSI, reg);  in dra7xx_pcie_msi_irq_handler()
281 			generic_handle_domain_irq(dra7xx->irq_domain, bit);  in dra7xx_pcie_msi_irq_handler()
290 	struct dra7xx_pcie *dra7xx = arg;  in dra7xx_pcie_irq_handler()  local
291 	struct dw_pcie *pci = dra7xx->pci;  in dra7xx_pcie_irq_handler()
296 	reg = dra7xx_pcie_readl(dra7xx, PCIECTRL_DRA7XX_CONF_IRQSTATUS_MAIN);  in dra7xx_pcie_irq_handler()
331 		if (dra7xx->mode == DW_PCIE_EP_TYPE)  in dra7xx_pcie_irq_handler()
342 	dra7xx_pcie_writel(dra7xx, PCIECTRL_DRA7XX_CONF_IRQSTATUS_MAIN, reg);  in dra7xx_pcie_irq_handler()
351 	struct dra7xx_pcie *dra7xx = to_dra7xx_pcie(pci);  in dra7xx_pcie_init_irq_domain()  local
362 	dra7xx->irq_domain = irq_domain_add_linear(pcie_intc_node, PCI_NUM_INTX,  in dra7xx_pcie_init_irq_domain()
365 	if (!dra7xx->irq_domain) {  in dra7xx_pcie_init_irq_domain()
380 	struct dra7xx_pcie *dra7xx = to_dra7xx_pcie(pci);  in dra7xx_pcie_ep_init()  local
386 	dra7xx_pcie_enable_wrapper_interrupts(dra7xx);  in dra7xx_pcie_ep_init()
389 static void dra7xx_pcie_raise_legacy_irq(struct dra7xx_pcie *dra7xx)  in dra7xx_pcie_raise_legacy_irq()  argument
391 	dra7xx_pcie_writel(dra7xx, PCIECTRL_TI_CONF_INTX_ASSERT, 0x1);  in dra7xx_pcie_raise_legacy_irq()
393 	dra7xx_pcie_writel(dra7xx, PCIECTRL_TI_CONF_INTX_DEASSERT, 0x1);  in dra7xx_pcie_raise_legacy_irq()
396 static void dra7xx_pcie_raise_msi_irq(struct dra7xx_pcie *dra7xx,  in dra7xx_pcie_raise_msi_irq()  argument
403 	dra7xx_pcie_writel(dra7xx, PCIECTRL_TI_CONF_MSI_XMT, reg);  in dra7xx_pcie_raise_msi_irq()
410 	struct dra7xx_pcie *dra7xx = to_dra7xx_pcie(pci);  in dra7xx_pcie_raise_irq()  local
414 		dra7xx_pcie_raise_legacy_irq(dra7xx);  in dra7xx_pcie_raise_irq()
417 		dra7xx_pcie_raise_msi_irq(dra7xx, interrupt_num);  in dra7xx_pcie_raise_irq()
444 static int dra7xx_add_pcie_ep(struct dra7xx_pcie *dra7xx,  in dra7xx_add_pcie_ep()  argument
450 	struct dw_pcie *pci = dra7xx->pci;  in dra7xx_add_pcie_ep()
473 static int dra7xx_add_pcie_port(struct dra7xx_pcie *dra7xx,  in dra7xx_add_pcie_port()  argument
477 	struct dw_pcie *pci = dra7xx->pci;  in dra7xx_add_pcie_port()
514 static void dra7xx_pcie_disable_phy(struct dra7xx_pcie *dra7xx)  in dra7xx_pcie_disable_phy()  argument
516 	int phy_count = dra7xx->phy_count;  in dra7xx_pcie_disable_phy()
519 		phy_power_off(dra7xx->phy[phy_count]);  in dra7xx_pcie_disable_phy()
520 		phy_exit(dra7xx->phy[phy_count]);  in dra7xx_pcie_disable_phy()
524 static int dra7xx_pcie_enable_phy(struct dra7xx_pcie *dra7xx)  in dra7xx_pcie_enable_phy()  argument
526 	int phy_count = dra7xx->phy_count;  in dra7xx_pcie_enable_phy()
531 		ret = phy_set_mode(dra7xx->phy[i], PHY_MODE_PCIE);  in dra7xx_pcie_enable_phy()
535 		ret = phy_init(dra7xx->phy[i]);  in dra7xx_pcie_enable_phy()
539 		ret = phy_power_on(dra7xx->phy[i]);  in dra7xx_pcie_enable_phy()
541 			phy_exit(dra7xx->phy[i]);  in dra7xx_pcie_enable_phy()
550 		phy_power_off(dra7xx->phy[i]);  in dra7xx_pcie_enable_phy()
551 		phy_exit(dra7xx->phy[i]);  in dra7xx_pcie_enable_phy()
616  * @dra7xx: the dra7xx device where the workaround should be applied
695 	struct dra7xx_pcie *dra7xx;  in dra7xx_pcie_probe()  local
711 	dra7xx = devm_kzalloc(dev, sizeof(*dra7xx), GFP_KERNEL);  in dra7xx_pcie_probe()
712 	if (!dra7xx)  in dra7xx_pcie_probe()
744 	dra7xx->clk = devm_clk_get_optional(dev, NULL);  in dra7xx_pcie_probe()
745 	if (IS_ERR(dra7xx->clk))  in dra7xx_pcie_probe()
746 		return dev_err_probe(dev, PTR_ERR(dra7xx->clk),  in dra7xx_pcie_probe()
749 	ret = clk_prepare_enable(dra7xx->clk);  in dra7xx_pcie_probe()
766 	dra7xx->base = base;  in dra7xx_pcie_probe()
767 	dra7xx->phy = phy;  in dra7xx_pcie_probe()
768 	dra7xx->pci = pci;  in dra7xx_pcie_probe()
769 	dra7xx->phy_count = phy_count;  in dra7xx_pcie_probe()
774 			dra7xx->phy_count = 1; /* Fallback to x1 lane mode */  in dra7xx_pcie_probe()
777 	ret = dra7xx_pcie_enable_phy(dra7xx);  in dra7xx_pcie_probe()
783 	platform_set_drvdata(pdev, dra7xx);  in dra7xx_pcie_probe()
799 	reg = dra7xx_pcie_readl(dra7xx, PCIECTRL_DRA7XX_CONF_DEVICE_CMD);  in dra7xx_pcie_probe()
801 	dra7xx_pcie_writel(dra7xx, PCIECTRL_DRA7XX_CONF_DEVICE_CMD, reg);  in dra7xx_pcie_probe()
810 		dra7xx_pcie_writel(dra7xx, PCIECTRL_TI_CONF_DEVICE_TYPE,  in dra7xx_pcie_probe()
817 		ret = dra7xx_add_pcie_port(dra7xx, pdev);  in dra7xx_pcie_probe()
827 		dra7xx_pcie_writel(dra7xx, PCIECTRL_TI_CONF_DEVICE_TYPE,  in dra7xx_pcie_probe()
834 		ret = dra7xx_add_pcie_ep(dra7xx, pdev);  in dra7xx_pcie_probe()
841 	dra7xx->mode = mode;  in dra7xx_pcie_probe()
844 			       IRQF_SHARED, "dra7xx-pcie-main", dra7xx);  in dra7xx_pcie_probe()
856 	dra7xx_pcie_disable_phy(dra7xx);  in dra7xx_pcie_probe()
867 	struct dra7xx_pcie *dra7xx = dev_get_drvdata(dev);  in dra7xx_pcie_suspend()  local
868 	struct dw_pcie *pci = dra7xx->pci;  in dra7xx_pcie_suspend()
871 	if (dra7xx->mode != DW_PCIE_RC_TYPE)  in dra7xx_pcie_suspend()
884 	struct dra7xx_pcie *dra7xx = dev_get_drvdata(dev);  in dra7xx_pcie_resume()  local
885 	struct dw_pcie *pci = dra7xx->pci;  in dra7xx_pcie_resume()
888 	if (dra7xx->mode != DW_PCIE_RC_TYPE)  in dra7xx_pcie_resume()
901 	struct dra7xx_pcie *dra7xx = dev_get_drvdata(dev);  in dra7xx_pcie_suspend_noirq()  local
903 	dra7xx_pcie_disable_phy(dra7xx);  in dra7xx_pcie_suspend_noirq()
910 	struct dra7xx_pcie *dra7xx = dev_get_drvdata(dev);  in dra7xx_pcie_resume_noirq()  local
913 	ret = dra7xx_pcie_enable_phy(dra7xx);  in dra7xx_pcie_resume_noirq()
925 	struct dra7xx_pcie *dra7xx = dev_get_drvdata(dev);  in dra7xx_pcie_shutdown()  local
928 	dra7xx_pcie_stop_link(dra7xx->pci);  in dra7xx_pcie_shutdown()
935 	dra7xx_pcie_disable_phy(dra7xx);  in dra7xx_pcie_shutdown()
937 	clk_disable_unprepare(dra7xx->clk);  in dra7xx_pcie_shutdown()
959 MODULE_DESCRIPTION("PCIe controller driver for TI DRA7xx SoCs");