Lines Matching +full:no +full:- +full:bar +full:- +full:match +full:- +full:nbits
1 // SPDX-License-Identifier: GPL-2.0
4 // Author: Cyrille Pitchen <cyrille.pitchen@free-electrons.com>
13 #include "pcie-cadence.h"
31 struct cdns_pcie *pcie = &rc->pcie; in cdns_pci_map_bus()
32 unsigned int busn = bus->number; in cdns_pci_map_bus()
44 return pcie->reg_base + (where & 0xfff); in cdns_pci_map_bus()
49 /* Clear AXI link-down status */ in cdns_pci_map_bus()
65 if (busn == bridge->busnr + 1) in cdns_pci_map_bus()
71 return rc->cfg_base + (where & 0xfff); in cdns_pci_map_bus()
82 struct device *dev = pcie->dev; in cdns_pcie_host_wait_for_link()
94 return -ETIMEDOUT; in cdns_pcie_host_wait_for_link()
136 struct cdns_pcie *pcie = &rc->pcie; in cdns_pcie_host_start_link()
145 if (!ret && rc->quirk_retrain_flag) in cdns_pcie_host_start_link()
153 struct cdns_pcie *pcie = &rc->pcie; in cdns_pcie_host_init_root_port()
158 * Set the root complex BAR configuration register: in cdns_pcie_host_init_root_port()
159 * - disable both BAR0 and BAR1. in cdns_pcie_host_init_root_port()
160 * - enable Prefetchable Memory Base and Limit registers in type 1 in cdns_pcie_host_init_root_port()
162 * - enable IO Base and Limit registers in type 1 config in cdns_pcie_host_init_root_port()
175 if (rc->vendor_id != 0xffff) { in cdns_pcie_host_init_root_port()
176 id = CDNS_PCIE_LM_ID_VENDOR(rc->vendor_id) | in cdns_pcie_host_init_root_port()
177 CDNS_PCIE_LM_ID_SUBSYS(rc->vendor_id); in cdns_pcie_host_init_root_port()
181 if (rc->device_id != 0xffff) in cdns_pcie_host_init_root_port()
182 cdns_pcie_rp_writew(pcie, PCI_DEVICE_ID, rc->device_id); in cdns_pcie_host_init_root_port()
192 enum cdns_pcie_rp_bar bar, in cdns_pcie_host_bar_ib_config() argument
196 struct cdns_pcie *pcie = &rc->pcie; in cdns_pcie_host_bar_ib_config()
199 if (!rc->avail_ib_bar[bar]) in cdns_pcie_host_bar_ib_config()
200 return -EBUSY; in cdns_pcie_host_bar_ib_config()
202 rc->avail_ib_bar[bar] = false; in cdns_pcie_host_bar_ib_config()
208 cdns_pcie_writel(pcie, CDNS_PCIE_AT_IB_RP_BAR_ADDR0(bar), addr0); in cdns_pcie_host_bar_ib_config()
209 cdns_pcie_writel(pcie, CDNS_PCIE_AT_IB_RP_BAR_ADDR1(bar), addr1); in cdns_pcie_host_bar_ib_config()
211 if (bar == RP_NO_BAR) in cdns_pcie_host_bar_ib_config()
215 value &= ~(LM_RC_BAR_CFG_CTRL_MEM_64BITS(bar) | in cdns_pcie_host_bar_ib_config()
216 LM_RC_BAR_CFG_CTRL_PREF_MEM_64BITS(bar) | in cdns_pcie_host_bar_ib_config()
217 LM_RC_BAR_CFG_CTRL_MEM_32BITS(bar) | in cdns_pcie_host_bar_ib_config()
218 LM_RC_BAR_CFG_CTRL_PREF_MEM_32BITS(bar) | in cdns_pcie_host_bar_ib_config()
219 LM_RC_BAR_CFG_APERTURE(bar, bar_aperture_mask[bar] + 2)); in cdns_pcie_host_bar_ib_config()
222 value |= LM_RC_BAR_CFG_CTRL_MEM_64BITS(bar); in cdns_pcie_host_bar_ib_config()
223 value |= LM_RC_BAR_CFG_CTRL_PREF_MEM_64BITS(bar); in cdns_pcie_host_bar_ib_config()
226 value |= LM_RC_BAR_CFG_CTRL_MEM_32BITS(bar); in cdns_pcie_host_bar_ib_config()
227 value |= LM_RC_BAR_CFG_CTRL_PREF_MEM_32BITS(bar); in cdns_pcie_host_bar_ib_config()
230 value |= LM_RC_BAR_CFG_APERTURE(bar, aperture); in cdns_pcie_host_bar_ib_config()
239 enum cdns_pcie_rp_bar bar, sel_bar; in cdns_pcie_host_find_min_bar() local
242 for (bar = RP_BAR0; bar <= RP_NO_BAR; bar++) { in cdns_pcie_host_find_min_bar()
243 if (!rc->avail_ib_bar[bar]) in cdns_pcie_host_find_min_bar()
246 if (size <= bar_max_size[bar]) { in cdns_pcie_host_find_min_bar()
248 sel_bar = bar; in cdns_pcie_host_find_min_bar()
252 if (bar_max_size[bar] < bar_max_size[sel_bar]) in cdns_pcie_host_find_min_bar()
253 sel_bar = bar; in cdns_pcie_host_find_min_bar()
263 enum cdns_pcie_rp_bar bar, sel_bar; in cdns_pcie_host_find_max_bar() local
266 for (bar = RP_BAR0; bar <= RP_NO_BAR; bar++) { in cdns_pcie_host_find_max_bar()
267 if (!rc->avail_ib_bar[bar]) in cdns_pcie_host_find_max_bar()
270 if (size >= bar_max_size[bar]) { in cdns_pcie_host_find_max_bar()
272 sel_bar = bar; in cdns_pcie_host_find_max_bar()
276 if (bar_max_size[bar] > bar_max_size[sel_bar]) in cdns_pcie_host_find_max_bar()
277 sel_bar = bar; in cdns_pcie_host_find_max_bar()
288 struct cdns_pcie *pcie = &rc->pcie; in cdns_pcie_host_bar_config()
289 struct device *dev = pcie->dev; in cdns_pcie_host_bar_config()
290 enum cdns_pcie_rp_bar bar; in cdns_pcie_host_bar_config() local
294 cpu_addr = entry->res->start; in cdns_pcie_host_bar_config()
295 pci_addr = entry->res->start - entry->offset; in cdns_pcie_host_bar_config()
296 flags = entry->res->flags; in cdns_pcie_host_bar_config()
297 size = resource_size(entry->res); in cdns_pcie_host_bar_config()
299 if (entry->offset) { in cdns_pcie_host_bar_config()
302 return -EINVAL; in cdns_pcie_host_bar_config()
307 * Try to find a minimum BAR whose size is greater than in cdns_pcie_host_bar_config()
311 * If a minimum BAR is found, IB ATU will be configured and in cdns_pcie_host_bar_config()
314 bar = cdns_pcie_host_find_min_bar(rc, size); in cdns_pcie_host_bar_config()
315 if (bar != RP_BAR_UNDEFINED) { in cdns_pcie_host_bar_config()
316 ret = cdns_pcie_host_bar_ib_config(rc, bar, cpu_addr, in cdns_pcie_host_bar_config()
319 dev_err(dev, "IB BAR: %d config failed\n", bar); in cdns_pcie_host_bar_config()
325 * resource_entry size cannot be fitted in a single BAR. So we in cdns_pcie_host_bar_config()
326 * find a maximum BAR whose size is less than or equal to the in cdns_pcie_host_bar_config()
329 * BAR. The remaining size would be fitted during the next in cdns_pcie_host_bar_config()
331 * If a maximum BAR is not found, there is no way we can fit in cdns_pcie_host_bar_config()
334 bar = cdns_pcie_host_find_max_bar(rc, size); in cdns_pcie_host_bar_config()
335 if (bar == RP_BAR_UNDEFINED) { in cdns_pcie_host_bar_config()
336 dev_err(dev, "No free BAR to map cpu_addr %llx\n", in cdns_pcie_host_bar_config()
338 return -EINVAL; in cdns_pcie_host_bar_config()
341 winsize = bar_max_size[bar]; in cdns_pcie_host_bar_config()
342 ret = cdns_pcie_host_bar_ib_config(rc, bar, cpu_addr, winsize, in cdns_pcie_host_bar_config()
345 dev_err(dev, "IB BAR: %d config failed\n", bar); in cdns_pcie_host_bar_config()
349 size -= winsize; in cdns_pcie_host_bar_config()
364 return resource_size(entry2->res) - resource_size(entry1->res); in cdns_pcie_host_dma_ranges_cmp()
369 struct cdns_pcie *pcie = &rc->pcie; in cdns_pcie_host_map_dma_ranges()
370 struct device *dev = pcie->dev; in cdns_pcie_host_map_dma_ranges()
371 struct device_node *np = dev->of_node; in cdns_pcie_host_map_dma_ranges()
379 return -ENOMEM; in cdns_pcie_host_map_dma_ranges()
381 if (list_empty(&bridge->dma_ranges)) { in cdns_pcie_host_map_dma_ranges()
382 of_property_read_u32(np, "cdns,no-bar-match-nbits", in cdns_pcie_host_map_dma_ranges()
387 dev_err(dev, "IB BAR: %d config failed\n", RP_NO_BAR); in cdns_pcie_host_map_dma_ranges()
391 list_sort(NULL, &bridge->dma_ranges, cdns_pcie_host_dma_ranges_cmp); in cdns_pcie_host_map_dma_ranges()
393 resource_list_for_each_entry(entry, &bridge->dma_ranges) { in cdns_pcie_host_map_dma_ranges()
396 dev_err(dev, "Fail to configure IB using dma-ranges\n"); in cdns_pcie_host_map_dma_ranges()
406 struct cdns_pcie *pcie = &rc->pcie; in cdns_pcie_host_init_address_translation()
408 struct resource *cfg_res = rc->cfg_res; in cdns_pcie_host_init_address_translation()
410 u64 cpu_addr = cfg_res->start; in cdns_pcie_host_init_address_translation()
414 entry = resource_list_first_type(&bridge->windows, IORESOURCE_BUS); in cdns_pcie_host_init_address_translation()
416 busnr = entry->res->start; in cdns_pcie_host_init_address_translation()
428 if (pcie->ops->cpu_addr_fixup) in cdns_pcie_host_init_address_translation()
429 cpu_addr = pcie->ops->cpu_addr_fixup(pcie, cpu_addr); in cdns_pcie_host_init_address_translation()
438 resource_list_for_each_entry(entry, &bridge->windows) { in cdns_pcie_host_init_address_translation()
439 struct resource *res = entry->res; in cdns_pcie_host_init_address_translation()
440 u64 pci_addr = res->start - entry->offset; in cdns_pcie_host_init_address_translation()
445 pci_pio_to_address(res->start), in cdns_pcie_host_init_address_translation()
451 res->start, in cdns_pcie_host_init_address_translation()
475 struct device *dev = rc->pcie.dev; in cdns_pcie_host_setup()
477 struct device_node *np = dev->of_node; in cdns_pcie_host_setup()
479 enum cdns_pcie_rp_bar bar; in cdns_pcie_host_setup() local
486 return -ENOMEM; in cdns_pcie_host_setup()
488 pcie = &rc->pcie; in cdns_pcie_host_setup()
489 pcie->is_rc = true; in cdns_pcie_host_setup()
491 rc->vendor_id = 0xffff; in cdns_pcie_host_setup()
492 of_property_read_u32(np, "vendor-id", &rc->vendor_id); in cdns_pcie_host_setup()
494 rc->device_id = 0xffff; in cdns_pcie_host_setup()
495 of_property_read_u32(np, "device-id", &rc->device_id); in cdns_pcie_host_setup()
497 pcie->reg_base = devm_platform_ioremap_resource_byname(pdev, "reg"); in cdns_pcie_host_setup()
498 if (IS_ERR(pcie->reg_base)) { in cdns_pcie_host_setup()
500 return PTR_ERR(pcie->reg_base); in cdns_pcie_host_setup()
504 rc->cfg_base = devm_pci_remap_cfg_resource(dev, res); in cdns_pcie_host_setup()
505 if (IS_ERR(rc->cfg_base)) in cdns_pcie_host_setup()
506 return PTR_ERR(rc->cfg_base); in cdns_pcie_host_setup()
507 rc->cfg_res = res; in cdns_pcie_host_setup()
509 if (rc->quirk_detect_quiet_flag) in cdns_pcie_host_setup()
510 cdns_pcie_detect_quiet_min_delay_set(&rc->pcie); in cdns_pcie_host_setup()
524 for (bar = RP_BAR0; bar <= RP_NO_BAR; bar++) in cdns_pcie_host_setup()
525 rc->avail_ib_bar[bar] = true; in cdns_pcie_host_setup()
531 if (!bridge->ops) in cdns_pcie_host_setup()
532 bridge->ops = &cdns_pcie_host_ops; in cdns_pcie_host_setup()