Lines Matching +full:cdns +full:- +full:pcie +full:- +full:host
1 // SPDX-License-Identifier: GPL-2.0
3 // Cadence PCIe host controller driver.
4 // Author: Cyrille Pitchen <cyrille.pitchen@free-electrons.com>
13 #include "pcie-cadence.h"
31 struct cdns_pcie *pcie = &rc->pcie; in cdns_pci_map_bus() local
32 unsigned int busn = bus->number; in cdns_pci_map_bus()
44 return pcie->reg_base + (where & 0xfff); in cdns_pci_map_bus()
47 if (!(cdns_pcie_readl(pcie, CDNS_PCIE_LM_BASE) & 0x1)) in cdns_pci_map_bus()
49 /* Clear AXI link-down status */ in cdns_pci_map_bus()
50 cdns_pcie_writel(pcie, CDNS_PCIE_AT_LINKDOWN, 0x0); in cdns_pci_map_bus()
56 cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_PCI_ADDR0(0), addr0); in cdns_pci_map_bus()
65 if (busn == bridge->busnr + 1) in cdns_pci_map_bus()
69 cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_DESC0(0), desc0); in cdns_pci_map_bus()
71 return rc->cfg_base + (where & 0xfff); in cdns_pci_map_bus()
80 static int cdns_pcie_host_wait_for_link(struct cdns_pcie *pcie) in cdns_pcie_host_wait_for_link() argument
82 struct device *dev = pcie->dev; in cdns_pcie_host_wait_for_link()
87 if (cdns_pcie_link_up(pcie)) { in cdns_pcie_host_wait_for_link()
94 return -ETIMEDOUT; in cdns_pcie_host_wait_for_link()
97 static int cdns_pcie_retrain(struct cdns_pcie *pcie) in cdns_pcie_retrain() argument
105 * but the PCIe root port support is > 2.5 GB/s. in cdns_pcie_retrain()
108 lnk_cap_sls = cdns_pcie_readl(pcie, (CDNS_PCIE_RP_BASE + pcie_cap_off + in cdns_pcie_retrain()
113 lnk_stat = cdns_pcie_rp_readw(pcie, pcie_cap_off + PCI_EXP_LNKSTA); in cdns_pcie_retrain()
115 lnk_ctl = cdns_pcie_rp_readw(pcie, in cdns_pcie_retrain()
118 cdns_pcie_rp_writew(pcie, pcie_cap_off + PCI_EXP_LNKCTL, in cdns_pcie_retrain()
121 ret = cdns_pcie_host_wait_for_link(pcie); in cdns_pcie_retrain()
126 static void cdns_pcie_host_enable_ptm_response(struct cdns_pcie *pcie) in cdns_pcie_host_enable_ptm_response() argument
130 val = cdns_pcie_readl(pcie, CDNS_PCIE_LM_PTM_CTRL); in cdns_pcie_host_enable_ptm_response()
131 cdns_pcie_writel(pcie, CDNS_PCIE_LM_PTM_CTRL, val | CDNS_PCIE_LM_TPM_CTRL_PTMRSEN); in cdns_pcie_host_enable_ptm_response()
136 struct cdns_pcie *pcie = &rc->pcie; in cdns_pcie_host_start_link() local
139 ret = cdns_pcie_host_wait_for_link(pcie); in cdns_pcie_host_start_link()
145 if (!ret && rc->quirk_retrain_flag) in cdns_pcie_host_start_link()
146 ret = cdns_pcie_retrain(pcie); in cdns_pcie_host_start_link()
153 struct cdns_pcie *pcie = &rc->pcie; in cdns_pcie_host_init_root_port() local
159 * - disable both BAR0 and BAR1. in cdns_pcie_host_init_root_port()
160 * - enable Prefetchable Memory Base and Limit registers in type 1 in cdns_pcie_host_init_root_port()
162 * - enable IO Base and Limit registers in type 1 config in cdns_pcie_host_init_root_port()
172 cdns_pcie_writel(pcie, CDNS_PCIE_LM_RC_BAR_CFG, value); in cdns_pcie_host_init_root_port()
175 if (rc->vendor_id != 0xffff) { in cdns_pcie_host_init_root_port()
176 id = CDNS_PCIE_LM_ID_VENDOR(rc->vendor_id) | in cdns_pcie_host_init_root_port()
177 CDNS_PCIE_LM_ID_SUBSYS(rc->vendor_id); in cdns_pcie_host_init_root_port()
178 cdns_pcie_writel(pcie, CDNS_PCIE_LM_ID, id); in cdns_pcie_host_init_root_port()
181 if (rc->device_id != 0xffff) in cdns_pcie_host_init_root_port()
182 cdns_pcie_rp_writew(pcie, PCI_DEVICE_ID, rc->device_id); in cdns_pcie_host_init_root_port()
184 cdns_pcie_rp_writeb(pcie, PCI_CLASS_REVISION, 0); in cdns_pcie_host_init_root_port()
185 cdns_pcie_rp_writeb(pcie, PCI_CLASS_PROG, 0); in cdns_pcie_host_init_root_port()
186 cdns_pcie_rp_writew(pcie, PCI_CLASS_DEVICE, PCI_CLASS_BRIDGE_PCI); in cdns_pcie_host_init_root_port()
196 struct cdns_pcie *pcie = &rc->pcie; in cdns_pcie_host_bar_ib_config() local
199 if (!rc->avail_ib_bar[bar]) in cdns_pcie_host_bar_ib_config()
200 return -EBUSY; in cdns_pcie_host_bar_ib_config()
202 rc->avail_ib_bar[bar] = false; in cdns_pcie_host_bar_ib_config()
208 cdns_pcie_writel(pcie, CDNS_PCIE_AT_IB_RP_BAR_ADDR0(bar), addr0); in cdns_pcie_host_bar_ib_config()
209 cdns_pcie_writel(pcie, CDNS_PCIE_AT_IB_RP_BAR_ADDR1(bar), addr1); in cdns_pcie_host_bar_ib_config()
214 value = cdns_pcie_readl(pcie, CDNS_PCIE_LM_RC_BAR_CFG); in cdns_pcie_host_bar_ib_config()
231 cdns_pcie_writel(pcie, CDNS_PCIE_LM_RC_BAR_CFG, value); in cdns_pcie_host_bar_ib_config()
243 if (!rc->avail_ib_bar[bar]) in cdns_pcie_host_find_min_bar()
267 if (!rc->avail_ib_bar[bar]) in cdns_pcie_host_find_max_bar()
288 struct cdns_pcie *pcie = &rc->pcie; in cdns_pcie_host_bar_config() local
289 struct device *dev = pcie->dev; in cdns_pcie_host_bar_config()
294 cpu_addr = entry->res->start; in cdns_pcie_host_bar_config()
295 pci_addr = entry->res->start - entry->offset; in cdns_pcie_host_bar_config()
296 flags = entry->res->flags; in cdns_pcie_host_bar_config()
297 size = resource_size(entry->res); in cdns_pcie_host_bar_config()
299 if (entry->offset) { in cdns_pcie_host_bar_config()
302 return -EINVAL; in cdns_pcie_host_bar_config()
338 return -EINVAL; in cdns_pcie_host_bar_config()
349 size -= winsize; in cdns_pcie_host_bar_config()
364 return resource_size(entry2->res) - resource_size(entry1->res); in cdns_pcie_host_dma_ranges_cmp()
369 struct cdns_pcie *pcie = &rc->pcie; in cdns_pcie_host_map_dma_ranges() local
370 struct device *dev = pcie->dev; in cdns_pcie_host_map_dma_ranges()
371 struct device_node *np = dev->of_node; in cdns_pcie_host_map_dma_ranges()
379 return -ENOMEM; in cdns_pcie_host_map_dma_ranges()
381 if (list_empty(&bridge->dma_ranges)) { in cdns_pcie_host_map_dma_ranges()
382 of_property_read_u32(np, "cdns,no-bar-match-nbits", in cdns_pcie_host_map_dma_ranges()
391 list_sort(NULL, &bridge->dma_ranges, cdns_pcie_host_dma_ranges_cmp); in cdns_pcie_host_map_dma_ranges()
393 resource_list_for_each_entry(entry, &bridge->dma_ranges) { in cdns_pcie_host_map_dma_ranges()
396 dev_err(dev, "Fail to configure IB using dma-ranges\n"); in cdns_pcie_host_map_dma_ranges()
406 struct cdns_pcie *pcie = &rc->pcie; in cdns_pcie_host_init_address_translation() local
408 struct resource *cfg_res = rc->cfg_res; in cdns_pcie_host_init_address_translation()
410 u64 cpu_addr = cfg_res->start; in cdns_pcie_host_init_address_translation()
414 entry = resource_list_first_type(&bridge->windows, IORESOURCE_BUS); in cdns_pcie_host_init_address_translation()
416 busnr = entry->res->start; in cdns_pcie_host_init_address_translation()
425 cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_PCI_ADDR1(0), addr1); in cdns_pcie_host_init_address_translation()
426 cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_DESC1(0), desc1); in cdns_pcie_host_init_address_translation()
428 if (pcie->ops->cpu_addr_fixup) in cdns_pcie_host_init_address_translation()
429 cpu_addr = pcie->ops->cpu_addr_fixup(pcie, cpu_addr); in cdns_pcie_host_init_address_translation()
434 cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_CPU_ADDR0(0), addr0); in cdns_pcie_host_init_address_translation()
435 cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_CPU_ADDR1(0), addr1); in cdns_pcie_host_init_address_translation()
438 resource_list_for_each_entry(entry, &bridge->windows) { in cdns_pcie_host_init_address_translation()
439 struct resource *res = entry->res; in cdns_pcie_host_init_address_translation()
440 u64 pci_addr = res->start - entry->offset; in cdns_pcie_host_init_address_translation()
443 cdns_pcie_set_outbound_region(pcie, busnr, 0, r, in cdns_pcie_host_init_address_translation()
445 pci_pio_to_address(res->start), in cdns_pcie_host_init_address_translation()
449 cdns_pcie_set_outbound_region(pcie, busnr, 0, r, in cdns_pcie_host_init_address_translation()
451 res->start, in cdns_pcie_host_init_address_translation()
475 struct device *dev = rc->pcie.dev; in cdns_pcie_host_setup()
477 struct device_node *np = dev->of_node; in cdns_pcie_host_setup()
480 struct cdns_pcie *pcie; in cdns_pcie_host_setup() local
486 return -ENOMEM; in cdns_pcie_host_setup()
488 pcie = &rc->pcie; in cdns_pcie_host_setup()
489 pcie->is_rc = true; in cdns_pcie_host_setup()
491 rc->vendor_id = 0xffff; in cdns_pcie_host_setup()
492 of_property_read_u32(np, "vendor-id", &rc->vendor_id); in cdns_pcie_host_setup()
494 rc->device_id = 0xffff; in cdns_pcie_host_setup()
495 of_property_read_u32(np, "device-id", &rc->device_id); in cdns_pcie_host_setup()
497 pcie->reg_base = devm_platform_ioremap_resource_byname(pdev, "reg"); in cdns_pcie_host_setup()
498 if (IS_ERR(pcie->reg_base)) { in cdns_pcie_host_setup()
500 return PTR_ERR(pcie->reg_base); in cdns_pcie_host_setup()
504 rc->cfg_base = devm_pci_remap_cfg_resource(dev, res); in cdns_pcie_host_setup()
505 if (IS_ERR(rc->cfg_base)) in cdns_pcie_host_setup()
506 return PTR_ERR(rc->cfg_base); in cdns_pcie_host_setup()
507 rc->cfg_res = res; in cdns_pcie_host_setup()
509 if (rc->quirk_detect_quiet_flag) in cdns_pcie_host_setup()
510 cdns_pcie_detect_quiet_min_delay_set(&rc->pcie); in cdns_pcie_host_setup()
512 cdns_pcie_host_enable_ptm_response(pcie); in cdns_pcie_host_setup()
514 ret = cdns_pcie_start_link(pcie); in cdns_pcie_host_setup()
522 dev_dbg(dev, "PCIe link never came up\n"); in cdns_pcie_host_setup()
525 rc->avail_ib_bar[bar] = true; in cdns_pcie_host_setup()
531 if (!bridge->ops) in cdns_pcie_host_setup()
532 bridge->ops = &cdns_pcie_host_ops; in cdns_pcie_host_setup()