Lines Matching refs:hw_info
116 struct t7xx_cldma_hw *hw_info; in t7xx_cldma_gpd_rx_from_q() local
121 hw_info = &md_ctrl->hw_info; in t7xx_cldma_gpd_rx_from_q()
142 gpd_addr = ioread64(hw_info->ap_pdn_base + REG_CLDMA_DL_CURRENT_ADDRL_0 + in t7xx_cldma_gpd_rx_from_q()
200 struct t7xx_cldma_hw *hw_info; in t7xx_cldma_gpd_rx_collect() local
206 hw_info = &md_ctrl->hw_info; in t7xx_cldma_gpd_rx_collect()
219 if (!t7xx_cldma_hw_queue_status(hw_info, queue->index, MTK_RX)) in t7xx_cldma_gpd_rx_collect()
220 t7xx_cldma_hw_resume_queue(hw_info, queue->index, MTK_RX); in t7xx_cldma_gpd_rx_collect()
222 pending_rx_int = t7xx_cldma_hw_int_status(hw_info, BIT(queue->index), in t7xx_cldma_gpd_rx_collect()
225 t7xx_cldma_hw_rx_done(hw_info, pending_rx_int); in t7xx_cldma_gpd_rx_collect()
251 t7xx_cldma_clear_ip_busy(&md_ctrl->hw_info); in t7xx_cldma_rx_done()
252 t7xx_cldma_hw_irq_en_txrx(&md_ctrl->hw_info, queue->index, MTK_RX); in t7xx_cldma_rx_done()
253 t7xx_cldma_hw_irq_en_eq(&md_ctrl->hw_info, queue->index, MTK_RX); in t7xx_cldma_rx_done()
318 struct t7xx_cldma_hw *hw_info = &md_ctrl->hw_info; in t7xx_cldma_txq_empty_hndl() local
321 ul_curr_addr = ioread64(hw_info->ap_pdn_base + REG_CLDMA_UL_CURRENT_ADDRL_0 + in t7xx_cldma_txq_empty_hndl()
330 t7xx_cldma_hw_resume_queue(hw_info, queue->index, MTK_TX); in t7xx_cldma_txq_empty_hndl()
339 struct t7xx_cldma_hw *hw_info; in t7xx_cldma_tx_done() local
343 hw_info = &md_ctrl->hw_info; in t7xx_cldma_tx_done()
345 l2_tx_int = t7xx_cldma_hw_int_status(hw_info, BIT(queue->index) | EQ_STA_BIT(queue->index), in t7xx_cldma_tx_done()
348 t7xx_cldma_hw_tx_done(hw_info, EQ_STA_BIT(queue->index)); in t7xx_cldma_tx_done()
353 t7xx_cldma_hw_tx_done(hw_info, BIT(queue->index)); in t7xx_cldma_tx_done()
360 t7xx_cldma_clear_ip_busy(hw_info); in t7xx_cldma_tx_done()
361 t7xx_cldma_hw_irq_en_eq(hw_info, queue->index, MTK_TX); in t7xx_cldma_tx_done()
362 t7xx_cldma_hw_irq_en_txrx(hw_info, queue->index, MTK_TX); in t7xx_cldma_tx_done()
541 t7xx_pcie_mac_set_int(md_ctrl->t7xx_dev, md_ctrl->hw_info.phy_interrupt_id); in t7xx_cldma_enable_irq()
546 t7xx_pcie_mac_clear_int(md_ctrl->t7xx_dev, md_ctrl->hw_info.phy_interrupt_id); in t7xx_cldma_disable_irq()
552 struct t7xx_cldma_hw *hw_info = &md_ctrl->hw_info; in t7xx_cldma_irq_work_cb() local
556 l2_tx_int = ioread32(hw_info->ap_pdn_base + REG_CLDMA_L2TISAR0); in t7xx_cldma_irq_work_cb()
557 l2_rx_int = ioread32(hw_info->ap_pdn_base + REG_CLDMA_L2RISAR0); in t7xx_cldma_irq_work_cb()
558 l2_tx_int_msk = ioread32(hw_info->ap_pdn_base + REG_CLDMA_L2TIMR0); in t7xx_cldma_irq_work_cb()
559 l2_rx_int_msk = ioread32(hw_info->ap_ao_base + REG_CLDMA_L2RIMR0); in t7xx_cldma_irq_work_cb()
566 val = ioread32(hw_info->ap_pdn_base + REG_CLDMA_L3TISAR0); in t7xx_cldma_irq_work_cb()
567 iowrite32(val, hw_info->ap_pdn_base + REG_CLDMA_L3TISAR0); in t7xx_cldma_irq_work_cb()
568 val = ioread32(hw_info->ap_pdn_base + REG_CLDMA_L3TISAR1); in t7xx_cldma_irq_work_cb()
569 iowrite32(val, hw_info->ap_pdn_base + REG_CLDMA_L3TISAR1); in t7xx_cldma_irq_work_cb()
572 t7xx_cldma_hw_tx_done(hw_info, l2_tx_int); in t7xx_cldma_irq_work_cb()
577 t7xx_cldma_hw_irq_dis_eq(hw_info, i, MTK_TX); in t7xx_cldma_irq_work_cb()
578 t7xx_cldma_hw_irq_dis_txrx(hw_info, i, MTK_TX); in t7xx_cldma_irq_work_cb()
591 val = ioread32(hw_info->ap_pdn_base + REG_CLDMA_L3RISAR0); in t7xx_cldma_irq_work_cb()
592 iowrite32(val, hw_info->ap_pdn_base + REG_CLDMA_L3RISAR0); in t7xx_cldma_irq_work_cb()
593 val = ioread32(hw_info->ap_pdn_base + REG_CLDMA_L3RISAR1); in t7xx_cldma_irq_work_cb()
594 iowrite32(val, hw_info->ap_pdn_base + REG_CLDMA_L3RISAR1); in t7xx_cldma_irq_work_cb()
597 t7xx_cldma_hw_rx_done(hw_info, l2_rx_int); in t7xx_cldma_irq_work_cb()
602 t7xx_cldma_hw_irq_dis_eq(hw_info, i, MTK_RX); in t7xx_cldma_irq_work_cb()
603 t7xx_cldma_hw_irq_dis_txrx(hw_info, i, MTK_RX); in t7xx_cldma_irq_work_cb()
612 struct t7xx_cldma_hw *hw_info = &md_ctrl->hw_info; in t7xx_cldma_qs_are_active() local
619 tx_active = t7xx_cldma_hw_queue_status(hw_info, CLDMA_ALL_Q, MTK_TX); in t7xx_cldma_qs_are_active()
620 rx_active = t7xx_cldma_hw_queue_status(hw_info, CLDMA_ALL_Q, MTK_RX); in t7xx_cldma_qs_are_active()
638 struct t7xx_cldma_hw *hw_info = &md_ctrl->hw_info; in t7xx_cldma_stop() local
643 t7xx_cldma_hw_stop_all_qs(hw_info, MTK_RX); in t7xx_cldma_stop()
645 t7xx_cldma_hw_stop_all_qs(hw_info, MTK_TX); in t7xx_cldma_stop()
648 t7xx_cldma_hw_stop(hw_info, MTK_RX); in t7xx_cldma_stop()
649 t7xx_cldma_hw_stop(hw_info, MTK_TX); in t7xx_cldma_stop()
650 t7xx_cldma_hw_tx_done(hw_info, CLDMA_L2TISAR0_ALL_INT_MASK); in t7xx_cldma_stop()
651 t7xx_cldma_hw_rx_done(hw_info, CLDMA_L2RISAR0_ALL_INT_MASK); in t7xx_cldma_stop()
730 struct t7xx_cldma_hw *hw_info = &md_ctrl->hw_info; in t7xx_cldma_start() local
737 t7xx_cldma_hw_set_start_addr(hw_info, i, in t7xx_cldma_start()
744 t7xx_cldma_hw_set_start_addr(hw_info, i, in t7xx_cldma_start()
750 t7xx_cldma_hw_start_queue(hw_info, CLDMA_ALL_Q, MTK_RX); in t7xx_cldma_start()
751 t7xx_cldma_hw_start(hw_info); in t7xx_cldma_start()
830 struct t7xx_cldma_hw *hw_info = &md_ctrl->hw_info; in t7xx_cldma_stop_all_qs() local
834 t7xx_cldma_hw_irq_dis_eq(hw_info, CLDMA_ALL_Q, tx_rx); in t7xx_cldma_stop_all_qs()
835 t7xx_cldma_hw_irq_dis_txrx(hw_info, CLDMA_ALL_Q, tx_rx); in t7xx_cldma_stop_all_qs()
840 t7xx_cldma_hw_stop_all_qs(hw_info, tx_rx); in t7xx_cldma_stop_all_qs()
879 struct t7xx_cldma_hw *hw_info = &md_ctrl->hw_info; in t7xx_cldma_hw_start_send() local
882 if (!t7xx_cldma_tx_addr_is_set(hw_info, qno)) { in t7xx_cldma_hw_start_send()
883 t7xx_cldma_hw_init(hw_info); in t7xx_cldma_hw_start_send()
884 t7xx_cldma_hw_set_start_addr(hw_info, qno, prev_req->gpd_addr, MTK_TX); in t7xx_cldma_hw_start_send()
888 if (!t7xx_cldma_hw_queue_status(hw_info, qno, MTK_TX)) { in t7xx_cldma_hw_start_send()
890 t7xx_cldma_hw_resume_queue(hw_info, qno, MTK_TX); in t7xx_cldma_hw_start_send()
892 t7xx_cldma_hw_start_queue(hw_info, qno, MTK_TX); in t7xx_cldma_hw_start_send()
980 if (!t7xx_cldma_hw_queue_status(&md_ctrl->hw_info, qno, MTK_TX)) { in t7xx_cldma_send_skb()
982 t7xx_cldma_hw_resume_queue(&md_ctrl->hw_info, qno, MTK_TX); in t7xx_cldma_send_skb()
1064 struct t7xx_cldma_hw *hw_info = &md_ctrl->hw_info; in t7xx_hw_info_init() local
1072 hw_info->phy_interrupt_id = CLDMA1_INT; in t7xx_hw_info_init()
1073 hw_info->hw_mode = MODE_BIT_64; in t7xx_hw_info_init()
1074 hw_info->ap_ao_base = t7xx_pcie_addr_transfer(pbase->pcie_ext_reg_base, in t7xx_hw_info_init()
1076 hw_info->ap_pdn_base = t7xx_pcie_addr_transfer(pbase->pcie_ext_reg_base, in t7xx_hw_info_init()
1107 struct t7xx_cldma_hw *hw_info; in t7xx_cldma_resume_early() local
1111 hw_info = &md_ctrl->hw_info; in t7xx_cldma_resume_early()
1114 t7xx_cldma_hw_restore(hw_info); in t7xx_cldma_resume_early()
1116 t7xx_cldma_hw_set_start_addr(hw_info, qno_t, md_ctrl->txq[qno_t].tx_next->gpd_addr, in t7xx_cldma_resume_early()
1118 t7xx_cldma_hw_set_start_addr(hw_info, qno_t, md_ctrl->rxq[qno_t].tr_done->gpd_addr, in t7xx_cldma_resume_early()
1122 t7xx_cldma_hw_start_queue(hw_info, CLDMA_ALL_Q, MTK_RX); in t7xx_cldma_resume_early()
1124 t7xx_cldma_hw_irq_en_eq(hw_info, CLDMA_ALL_Q, MTK_RX); in t7xx_cldma_resume_early()
1125 t7xx_cldma_hw_irq_en_txrx(hw_info, CLDMA_ALL_Q, MTK_RX); in t7xx_cldma_resume_early()
1136 t7xx_cldma_hw_irq_en_txrx(&md_ctrl->hw_info, CLDMA_ALL_Q, MTK_TX); in t7xx_cldma_resume()
1137 t7xx_cldma_hw_irq_en_eq(&md_ctrl->hw_info, CLDMA_ALL_Q, MTK_TX); in t7xx_cldma_resume()
1149 struct t7xx_cldma_hw *hw_info; in t7xx_cldma_suspend_late() local
1152 hw_info = &md_ctrl->hw_info; in t7xx_cldma_suspend_late()
1155 t7xx_cldma_hw_irq_dis_eq(hw_info, CLDMA_ALL_Q, MTK_RX); in t7xx_cldma_suspend_late()
1156 t7xx_cldma_hw_irq_dis_txrx(hw_info, CLDMA_ALL_Q, MTK_RX); in t7xx_cldma_suspend_late()
1158 t7xx_cldma_hw_stop_all_qs(hw_info, MTK_RX); in t7xx_cldma_suspend_late()
1159 t7xx_cldma_clear_ip_busy(hw_info); in t7xx_cldma_suspend_late()
1167 struct t7xx_cldma_hw *hw_info; in t7xx_cldma_suspend() local
1173 hw_info = &md_ctrl->hw_info; in t7xx_cldma_suspend()
1176 t7xx_cldma_hw_irq_dis_eq(hw_info, CLDMA_ALL_Q, MTK_TX); in t7xx_cldma_suspend()
1177 t7xx_cldma_hw_irq_dis_txrx(hw_info, CLDMA_ALL_Q, MTK_TX); in t7xx_cldma_suspend()
1179 t7xx_cldma_hw_stop_all_qs(hw_info, MTK_TX); in t7xx_cldma_suspend()
1220 struct t7xx_cldma_hw *hw_info = &md_ctrl->hw_info; in t7xx_cldma_hif_hw_init() local
1224 t7xx_cldma_hw_stop(hw_info, MTK_TX); in t7xx_cldma_hif_hw_init()
1225 t7xx_cldma_hw_stop(hw_info, MTK_RX); in t7xx_cldma_hif_hw_init()
1226 t7xx_cldma_hw_rx_done(hw_info, EMPTY_STATUS_BITMASK | TXRX_STATUS_BITMASK); in t7xx_cldma_hif_hw_init()
1227 t7xx_cldma_hw_tx_done(hw_info, EMPTY_STATUS_BITMASK | TXRX_STATUS_BITMASK); in t7xx_cldma_hif_hw_init()
1228 t7xx_cldma_hw_init(hw_info); in t7xx_cldma_hif_hw_init()
1237 interrupt = md_ctrl->hw_info.phy_interrupt_id; in t7xx_cldma_isr_handler()
1278 struct t7xx_cldma_hw *hw_info = &md_ctrl->hw_info; in t7xx_cldma_init() local
1314 t7xx_pcie_mac_clear_int(md_ctrl->t7xx_dev, hw_info->phy_interrupt_id); in t7xx_cldma_init()
1315 md_ctrl->t7xx_dev->intr_handler[hw_info->phy_interrupt_id] = t7xx_cldma_isr_handler; in t7xx_cldma_init()
1316 md_ctrl->t7xx_dev->intr_thread[hw_info->phy_interrupt_id] = NULL; in t7xx_cldma_init()
1317 md_ctrl->t7xx_dev->callback_param[hw_info->phy_interrupt_id] = md_ctrl; in t7xx_cldma_init()
1318 t7xx_pcie_mac_clear_int_status(md_ctrl->t7xx_dev, hw_info->phy_interrupt_id); in t7xx_cldma_init()