Lines Matching +full:0 +full:x1234

14 #define HIF_ID_IS_INDICATION      0x80
28 HIF_REQ_ID_CONFIGURATION = 0x09,
29 HIF_REQ_ID_CONTROL_GPIO = 0x26,
30 HIF_REQ_ID_SET_SL_MAC_KEY = 0x27,
31 HIF_REQ_ID_SL_EXCHANGE_PUB_KEYS = 0x28,
32 HIF_REQ_ID_SL_CONFIGURE = 0x29,
33 HIF_REQ_ID_PREVENT_ROLLBACK = 0x2a,
34 HIF_REQ_ID_PTA_SETTINGS = 0x2b,
35 HIF_REQ_ID_PTA_PRIORITY = 0x2c,
36 HIF_REQ_ID_PTA_STATE = 0x2d,
37 HIF_REQ_ID_SHUT_DOWN = 0x32,
41 HIF_CNF_ID_CONFIGURATION = 0x09,
42 HIF_CNF_ID_CONTROL_GPIO = 0x26,
43 HIF_CNF_ID_SET_SL_MAC_KEY = 0x27,
44 HIF_CNF_ID_SL_EXCHANGE_PUB_KEYS = 0x28,
45 HIF_CNF_ID_SL_CONFIGURE = 0x29,
46 HIF_CNF_ID_PREVENT_ROLLBACK = 0x2a,
47 HIF_CNF_ID_PTA_SETTINGS = 0x2b,
48 HIF_CNF_ID_PTA_PRIORITY = 0x2c,
49 HIF_CNF_ID_PTA_STATE = 0x2d,
50 HIF_CNF_ID_SHUT_DOWN = 0x32,
54 HIF_IND_ID_EXCEPTION = 0xe0,
55 HIF_IND_ID_STARTUP = 0xe1,
56 HIF_IND_ID_WAKEUP = 0xe2,
57 HIF_IND_ID_GENERIC = 0xe3,
58 HIF_IND_ID_ERROR = 0xe4,
59 HIF_IND_ID_SL_EXCHANGE_PUB_KEYS = 0xe5
62 #define HIF_STATUS_SUCCESS (cpu_to_le32(0x0000))
63 #define HIF_STATUS_FAIL (cpu_to_le32(0x0001))
64 #define HIF_STATUS_INVALID_PARAMETER (cpu_to_le32(0x0002))
65 #define HIF_STATUS_WARNING (cpu_to_le32(0x0003))
66 #define HIF_STATUS_UNKNOWN_REQUEST (cpu_to_le32(0x0004))
67 #define HIF_STATUS_RX_FAIL_DECRYPT (cpu_to_le32(0x0010))
68 #define HIF_STATUS_RX_FAIL_MIC (cpu_to_le32(0x0011))
69 #define HIF_STATUS_RX_FAIL_NO_KEY (cpu_to_le32(0x0012))
70 #define HIF_STATUS_TX_FAIL_RETRIES (cpu_to_le32(0x0013))
71 #define HIF_STATUS_TX_FAIL_TIMEOUT (cpu_to_le32(0x0014))
72 #define HIF_STATUS_TX_FAIL_REQUEUE (cpu_to_le32(0x0015))
73 #define HIF_STATUS_REFUSED (cpu_to_le32(0x0016))
74 #define HIF_STATUS_BUSY (cpu_to_le32(0x0017))
75 #define HIF_STATUS_SLK_SET_KEY_SUCCESS (cpu_to_le32(0x005A))
76 #define HIF_STATUS_SLK_SET_KEY_ALREADY_BURNED (cpu_to_le32(0x006B))
77 #define HIF_STATUS_SLK_SET_KEY_DISALLOWED_MODE (cpu_to_le32(0x007C))
78 #define HIF_STATUS_SLK_SET_KEY_UNKNOWN_MODE (cpu_to_le32(0x008D))
79 #define HIF_STATUS_SLK_NEGO_SUCCESS (cpu_to_le32(0x009E))
80 #define HIF_STATUS_SLK_NEGO_FAILED (cpu_to_le32(0x00AF))
81 #define HIF_STATUS_ROLLBACK_SUCCESS (cpu_to_le32(0x1234))
82 #define HIF_STATUS_ROLLBACK_FAIL (cpu_to_le32(0x1256))
85 API_RATE_INDEX_B_1MBPS = 0,
154 HIF_GPIO_MODE_D0 = 0x0,
155 HIF_GPIO_MODE_D1 = 0x1,
156 HIF_GPIO_MODE_OD0 = 0x2,
157 HIF_GPIO_MODE_OD1 = 0x3,
158 HIF_GPIO_MODE_TRISTATE = 0x4,
159 HIF_GPIO_MODE_TOGGLE = 0x5,
160 HIF_GPIO_MODE_READ = 0x6
174 HIF_GENERIC_INDICATION_TYPE_RAW = 0x0,
175 HIF_GENERIC_INDICATION_TYPE_STRING = 0x1,
176 HIF_GENERIC_INDICATION_TYPE_RX_STATS = 0x2,
177 HIF_GENERIC_INDICATION_TYPE_TX_POWER_LOOP_INFO = 0x3,
215 HIF_ERROR_FIRMWARE_ROLLBACK = 0x00,
216 HIF_ERROR_FIRMWARE_DEBUG_ENABLED = 0x01,
217 HIF_ERROR_SLK_OUTDATED_SESSION_KEY = 0x02,
218 HIF_ERROR_SLK_SESSION_KEY = 0x03,
219 HIF_ERROR_OOR_VOLTAGE = 0x04,
220 HIF_ERROR_PDS_PAYLOAD = 0x05,
221 HIF_ERROR_OOR_TEMPERATURE = 0x06,
222 HIF_ERROR_SLK_REQ_DURING_KEY_EXCHANGE = 0x07,
223 HIF_ERROR_SLK_MULTI_TX_UNSUPPORTED = 0x08,
224 HIF_ERROR_SLK_OVERFLOW = 0x09,
225 HIF_ERROR_SLK_DECRYPTION = 0x0a,
226 HIF_ERROR_SLK_WRONG_ENCRYPTION_STATE = 0x0b,
227 HIF_ERROR_HIF_BUS_FREQUENCY_TOO_LOW = 0x0c,
228 HIF_ERROR_HIF_RX_DATA_TOO_LARGE = 0x0e,
229 HIF_ERROR_HIF_TX_QUEUE_FULL = 0x0d,
230 HIF_ERROR_HIF_BUS = 0x0f,
231 HIF_ERROR_PDS_TESTFEATURE = 0x10,
232 HIF_ERROR_SLK_UNCONFIGURED = 0x11,
246 SEC_LINK_UNAVAILABLE = 0x0,
247 SEC_LINK_RESERVED = 0x1,
248 SEC_LINK_EVAL = 0x2,
249 SEC_LINK_ENFORCED = 0x3