63 static u8 _kpath(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx)  in _kpath()  argument
65 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RFK]dbcc_en: %x,  PHY%d\n",  in _kpath()
66 		    rtwdev->dbcc_en, phy_idx);  in _kpath()
68 	if (!rtwdev->dbcc_en)  in _kpath()
77 static void _rfk_backup_bb_reg(struct rtw89_dev *rtwdev, u32 backup_bb_reg_val[])  in _rfk_backup_bb_reg()  argument
83 			rtw89_phy_read32_mask(rtwdev, rtw8852c_backup_bb_regs[i],  in _rfk_backup_bb_reg()
85 		rtw89_debug(rtwdev, RTW89_DBG_RFK,  in _rfk_backup_bb_reg()
91 static void _rfk_backup_rf_reg(struct rtw89_dev *rtwdev, u32 backup_rf_reg_val[],  in _rfk_backup_rf_reg()  argument
98 			rtw89_read_rf(rtwdev, rf_path,  in _rfk_backup_rf_reg()
100 		rtw89_debug(rtwdev, RTW89_DBG_RFK,  in _rfk_backup_rf_reg()
106 static void _rfk_restore_bb_reg(struct rtw89_dev *rtwdev, u32 backup_bb_reg_val[])  in _rfk_restore_bb_reg()  argument
111 		rtw89_phy_write32_mask(rtwdev, rtw8852c_backup_bb_regs[i],  in _rfk_restore_bb_reg()
113 		rtw89_debug(rtwdev, RTW89_DBG_RFK,  in _rfk_restore_bb_reg()
119 static void _rfk_restore_rf_reg(struct rtw89_dev *rtwdev, u32 backup_rf_reg_val[],  in _rfk_restore_rf_reg()  argument
125 		rtw89_write_rf(rtwdev, rf_path, rtw8852c_backup_rf_regs[i],  in _rfk_restore_rf_reg()
128 		rtw89_debug(rtwdev, RTW89_DBG_RFK,  in _rfk_restore_rf_reg()
134 static void _wait_rx_mode(struct rtw89_dev *rtwdev, u8 kpath)  in _wait_rx_mode()  argument
145 					       2, 5000, false, rtwdev, path, 0x00,  in _wait_rx_mode()
147 		rtw89_debug(rtwdev, RTW89_DBG_RFK,  in _wait_rx_mode()
153 static void _dack_dump(struct rtw89_dev *rtwdev)  in _dack_dump()  argument
155 	struct rtw89_dack_info *dack = &rtwdev->dack;  in _dack_dump()
159 	rtw89_debug(rtwdev, RTW89_DBG_RFK,  in _dack_dump()
162 	rtw89_debug(rtwdev, RTW89_DBG_RFK,  in _dack_dump()
165 	rtw89_debug(rtwdev, RTW89_DBG_RFK,  in _dack_dump()
168 	rtw89_debug(rtwdev, RTW89_DBG_RFK,  in _dack_dump()
172 	rtw89_debug(rtwdev, RTW89_DBG_RFK,  in _dack_dump()
175 	rtw89_debug(rtwdev, RTW89_DBG_RFK,  in _dack_dump()
179 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S0 MSBK ic:\n");  in _dack_dump()
182 		rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0x%x\n", t);  in _dack_dump()
184 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S0 MSBK qc:\n");  in _dack_dump()
187 		rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0x%x\n", t);  in _dack_dump()
189 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S1 MSBK ic:\n");  in _dack_dump()
192 		rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0x%x\n", t);  in _dack_dump()
194 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S1 MSBK qc:\n");  in _dack_dump()
197 		rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0x%x\n", t);  in _dack_dump()
201 static void _addck_backup(struct rtw89_dev *rtwdev)  in _addck_backup()  argument
203 	struct rtw89_dack_info *dack = &rtwdev->dack;  in _addck_backup()
205 	rtw89_phy_write32_mask(rtwdev, R_ADDCK0, B_ADDCK0, 0x0);  in _addck_backup()
206 	dack->addck_d[0][0] = rtw89_phy_read32_mask(rtwdev, R_ADDCKR0,  in _addck_backup()
208 	dack->addck_d[0][1] = rtw89_phy_read32_mask(rtwdev, R_ADDCKR0,  in _addck_backup()
211 	rtw89_phy_write32_mask(rtwdev, R_ADDCK1, B_ADDCK1, 0x0);  in _addck_backup()
212 	dack->addck_d[1][0] = rtw89_phy_read32_mask(rtwdev, R_ADDCKR1,  in _addck_backup()
214 	dack->addck_d[1][1] = rtw89_phy_read32_mask(rtwdev, R_ADDCKR1,  in _addck_backup()
218 static void _addck_reload(struct rtw89_dev *rtwdev)  in _addck_reload()  argument
220 	struct rtw89_dack_info *dack = &rtwdev->dack;  in _addck_reload()
222 	rtw89_phy_write32_mask(rtwdev, R_ADDCK0_RL, B_ADDCK0_RL1,  in _addck_reload()
224 	rtw89_phy_write32_mask(rtwdev, R_ADDCK0_RL, B_ADDCK0_RL0,  in _addck_reload()
226 	rtw89_phy_write32_mask(rtwdev, R_ADDCK0_RL, B_ADDCK0_RLS, 0x3);  in _addck_reload()
227 	rtw89_phy_write32_mask(rtwdev, R_ADDCK1_RL, B_ADDCK1_RL1,  in _addck_reload()
229 	rtw89_phy_write32_mask(rtwdev, R_ADDCK1_RL, B_ADDCK1_RL0,  in _addck_reload()
231 	rtw89_phy_write32_mask(rtwdev, R_ADDCK1_RL, B_ADDCK1_RLS, 0x3);  in _addck_reload()
234 static void _dack_backup_s0(struct rtw89_dev *rtwdev)  in _dack_backup_s0()  argument
236 	struct rtw89_dack_info *dack = &rtwdev->dack;  in _dack_backup_s0()
239 	rtw89_phy_write32_mask(rtwdev, R_P0_NRBW, B_P0_NRBW_DBG, 0x1);  in _dack_backup_s0()
241 		rtw89_phy_write32_mask(rtwdev, R_DCOF0, B_DCOF0_V, i);  in _dack_backup_s0()
242 		dack->msbk_d[0][0][i] = rtw89_phy_read32_mask(rtwdev,  in _dack_backup_s0()
245 		rtw89_phy_write32_mask(rtwdev, R_DCOF8, B_DCOF8_V, i);  in _dack_backup_s0()
246 		dack->msbk_d[0][1][i] = rtw89_phy_read32_mask(rtwdev,  in _dack_backup_s0()
250 	dack->biask_d[0][0] = rtw89_phy_read32_mask(rtwdev, R_DACK_BIAS00,  in _dack_backup_s0()
252 	dack->biask_d[0][1] = rtw89_phy_read32_mask(rtwdev, R_DACK_BIAS01,  in _dack_backup_s0()
254 	dack->dadck_d[0][0] = rtw89_phy_read32_mask(rtwdev, R_DACK_DADCK00,  in _dack_backup_s0()
256 	dack->dadck_d[0][1] = rtw89_phy_read32_mask(rtwdev, R_DACK_DADCK01,  in _dack_backup_s0()
260 static void _dack_backup_s1(struct rtw89_dev *rtwdev)  in _dack_backup_s1()  argument
262 	struct rtw89_dack_info *dack = &rtwdev->dack;  in _dack_backup_s1()
265 	rtw89_phy_write32_mask(rtwdev, R_P1_DBGMOD, B_P1_DBGMOD_ON, 0x1);  in _dack_backup_s1()
267 		rtw89_phy_write32_mask(rtwdev, R_DACK10, B_DACK10, i);  in _dack_backup_s1()
268 		dack->msbk_d[1][0][i] = rtw89_phy_read32_mask(rtwdev,  in _dack_backup_s1()
271 		rtw89_phy_write32_mask(rtwdev, R_DACK11, B_DACK11, i);  in _dack_backup_s1()
272 		dack->msbk_d[1][1][i] = rtw89_phy_read32_mask(rtwdev,  in _dack_backup_s1()
276 	dack->biask_d[1][0] = rtw89_phy_read32_mask(rtwdev, R_DACK_BIAS10,  in _dack_backup_s1()
278 	dack->biask_d[1][1] = rtw89_phy_read32_mask(rtwdev, R_DACK_BIAS11,  in _dack_backup_s1()
280 	dack->dadck_d[1][0] = rtw89_phy_read32_mask(rtwdev, R_DACK_DADCK10,  in _dack_backup_s1()
282 	dack->dadck_d[1][1] = rtw89_phy_read32_mask(rtwdev, R_DACK_DADCK11,  in _dack_backup_s1()
286 static void _dack_reload_by_path(struct rtw89_dev *rtwdev,  in _dack_reload_by_path()  argument
289 	struct rtw89_dack_info *dack = &rtwdev->dack;  in _dack_reload_by_path()
298 	rtw89_rfk_parser(rtwdev, &rtw8852c_dack_reload_defs_tbl);  in _dack_reload_by_path()
305 	rtw89_phy_write32(rtwdev, addr, val32);  in _dack_reload_by_path()
306 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0x%x=0x%x\n", addr,  in _dack_reload_by_path()
307 		    rtw89_phy_read32_mask(rtwdev, addr, MASKDWORD));  in _dack_reload_by_path()
314 	rtw89_phy_write32(rtwdev, addr, val32);  in _dack_reload_by_path()
315 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0x%x=0x%x\n", addr,  in _dack_reload_by_path()
316 		    rtw89_phy_read32_mask(rtwdev, addr, MASKDWORD));  in _dack_reload_by_path()
323 	rtw89_phy_write32(rtwdev, addr, val32);  in _dack_reload_by_path()
324 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0x%x=0x%x\n", addr,  in _dack_reload_by_path()
325 		    rtw89_phy_read32_mask(rtwdev, addr, MASKDWORD));  in _dack_reload_by_path()
332 	rtw89_phy_write32(rtwdev, addr, val32);  in _dack_reload_by_path()
333 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0x%x=0x%x\n", addr,  in _dack_reload_by_path()
334 		    rtw89_phy_read32_mask(rtwdev, addr, MASKDWORD));  in _dack_reload_by_path()
340 	rtw89_phy_write32(rtwdev, addr, val32);  in _dack_reload_by_path()
341 	rtw89_phy_write32_set(rtwdev, addr, BIT(1));  in _dack_reload_by_path()
344 static void _dack_reload(struct rtw89_dev *rtwdev, enum rtw89_rf_path path)  in _dack_reload()  argument
349 		_dack_reload_by_path(rtwdev, path, i);  in _dack_reload()
352 static void _addck(struct rtw89_dev *rtwdev)  in _addck()  argument
354 	struct rtw89_dack_info *dack = &rtwdev->dack;  in _addck()
359 	rtw89_phy_write32_mask(rtwdev, R_ADDCK0, B_ADDCK0_RST, 0x1);  in _addck()
360 	rtw89_phy_write32_mask(rtwdev, R_ADDCK0, B_ADDCK0_EN, 0x1);  in _addck()
361 	rtw89_phy_write32_mask(rtwdev, R_ADDCK0, B_ADDCK0_EN, 0x0);  in _addck()
363 	rtw89_phy_write32_mask(rtwdev, R_ADDCK0, B_ADDCK0, 0x1);  in _addck()
366 				       1, 10000, false, rtwdev, 0xc0fc, BIT(0));  in _addck()
368 		rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S0 ADDCK timeout\n");  in _addck()
372 	rtw89_phy_write32_mask(rtwdev, R_ADDCK0, B_ADDCK0_RST, 0x0);  in _addck()
375 	rtw89_phy_write32_mask(rtwdev, R_ADDCK1, B_ADDCK1_RST, 0x1);  in _addck()
376 	rtw89_phy_write32_mask(rtwdev, R_ADDCK1, B_ADDCK1_EN, 0x1);  in _addck()
377 	rtw89_phy_write32_mask(rtwdev, R_ADDCK1, B_ADDCK1_EN, 0x0);  in _addck()
379 	rtw89_phy_write32_mask(rtwdev, R_ADDCK1, B_ADDCK1, 0x1);  in _addck()
382 				       1, 10000, false, rtwdev, 0xc1fc, BIT(0));  in _addck()
384 		rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S1 ADDCK timeout\n");  in _addck()
387 	rtw89_phy_write32_mask(rtwdev, R_ADDCK1, B_ADDCK1_RST, 0x0);  in _addck()
390 static void _dack_reset(struct rtw89_dev *rtwdev, u8 path)  in _dack_reset()  argument
392 	rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A,  in _dack_reset()
426 static void rtw8852c_txck_force(struct rtw89_dev *rtwdev, u8 path, bool force,  in rtw8852c_txck_force()  argument
429 	rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_TXCK_ON, 0x0);  in rtw8852c_txck_force()
434 	rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_TXCK_VAL, ck);  in rtw8852c_txck_force()
435 	rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_TXCK_ON, 0x1);  in rtw8852c_txck_force()
438 static void rtw8852c_rxck_force(struct rtw89_dev *rtwdev, u8 path, bool force,  in rtw8852c_rxck_force()  argument
441 	rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_RXCK_ON, 0x0);  in rtw8852c_rxck_force()
446 	rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_RXCK_VAL, ck);  in rtw8852c_rxck_force()
447 	rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_RXCK_ON, 0x1);  in rtw8852c_rxck_force()
450 static bool _check_dack_done(struct rtw89_dev *rtwdev, bool s0)  in _check_dack_done()  argument
453 		if (rtw89_phy_read32_mask(rtwdev, R_DACK_S0P0, B_DACK_S0P0_OK) == 0 ||  in _check_dack_done()
454 		    rtw89_phy_read32_mask(rtwdev, R_DACK_S0P1, B_DACK_S0P1_OK) == 0 ||  in _check_dack_done()
455 		    rtw89_phy_read32_mask(rtwdev, R_DACK_S0P2, B_DACK_S0P2_OK) == 0 ||  in _check_dack_done()
456 		    rtw89_phy_read32_mask(rtwdev, R_DACK_S0P3, B_DACK_S0P3_OK) == 0)  in _check_dack_done()
459 		if (rtw89_phy_read32_mask(rtwdev, R_DACK_S1P0, B_DACK_S1P0_OK) == 0 ||  in _check_dack_done()
460 		    rtw89_phy_read32_mask(rtwdev, R_DACK_S1P1, B_DACK_S1P1_OK) == 0 ||  in _check_dack_done()
461 		    rtw89_phy_read32_mask(rtwdev, R_DACK_S1P2, B_DACK_S1P2_OK) == 0 ||  in _check_dack_done()
462 		    rtw89_phy_read32_mask(rtwdev, R_DACK_S1P3, B_DACK_S1P3_OK) == 0)  in _check_dack_done()
469 static void _dack_s0(struct rtw89_dev *rtwdev)  in _dack_s0()  argument
471 	struct rtw89_dack_info *dack = &rtwdev->dack;  in _dack_s0()
475 	rtw8852c_txck_force(rtwdev, RF_PATH_A, true, DAC_160M);  in _dack_s0()
476 	rtw89_rfk_parser(rtwdev, &rtw8852c_dack_defs_s0_tbl);  in _dack_s0()
478 	_dack_reset(rtwdev, RF_PATH_A);  in _dack_s0()
480 	rtw89_phy_write32_mask(rtwdev, R_DCOF1, B_DCOF1_S, 0x1);  in _dack_s0()
482 				       1, 10000, false, rtwdev, true);  in _dack_s0()
484 		rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S0 DACK timeout\n");  in _dack_s0()
487 	rtw89_phy_write32_mask(rtwdev, R_DCOF1, B_DCOF1_S, 0x0);  in _dack_s0()
488 	rtw8852c_txck_force(rtwdev, RF_PATH_A, false, DAC_960M);  in _dack_s0()
489 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]after S0 DADCK\n");  in _dack_s0()
491 	_dack_backup_s0(rtwdev);  in _dack_s0()
492 	_dack_reload(rtwdev, RF_PATH_A);  in _dack_s0()
493 	rtw89_phy_write32_mask(rtwdev, R_P0_NRBW, B_P0_NRBW_DBG, 0x0);  in _dack_s0()
496 static void _dack_s1(struct rtw89_dev *rtwdev)  in _dack_s1()  argument
498 	struct rtw89_dack_info *dack = &rtwdev->dack;  in _dack_s1()
502 	rtw8852c_txck_force(rtwdev, RF_PATH_B, true, DAC_160M);  in _dack_s1()
503 	rtw89_rfk_parser(rtwdev, &rtw8852c_dack_defs_s1_tbl);  in _dack_s1()
505 	_dack_reset(rtwdev, RF_PATH_B);  in _dack_s1()
507 	rtw89_phy_write32_mask(rtwdev, R_DACK1_K, B_DACK1_EN, 0x1);  in _dack_s1()
509 				       1, 10000, false, rtwdev, false);  in _dack_s1()
511 		rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S1 DACK timeout\n");  in _dack_s1()
514 	rtw89_phy_write32_mask(rtwdev, R_DACK1_K, B_DACK1_EN, 0x0);  in _dack_s1()
515 	rtw8852c_txck_force(rtwdev, RF_PATH_B, false, DAC_960M);  in _dack_s1()
516 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]after S1 DADCK\n");  in _dack_s1()
518 	_dack_backup_s1(rtwdev);  in _dack_s1()
519 	_dack_reload(rtwdev, RF_PATH_B);  in _dack_s1()
520 	rtw89_phy_write32_mask(rtwdev, R_P1_DBGMOD, B_P1_DBGMOD_ON, 0x0);  in _dack_s1()
523 static void _dack(struct rtw89_dev *rtwdev)  in _dack()  argument
525 	_dack_s0(rtwdev);  in _dack()
526 	_dack_s1(rtwdev);  in _dack()
529 static void _drck(struct rtw89_dev *rtwdev)  in _drck()  argument
534 	rtw89_phy_write32_mask(rtwdev, R_DRCK, B_DRCK_EN, 0x1);  in _drck()
536 				       1, 10000, false, rtwdev, 0xc0c8, BIT(3));  in _drck()
538 		rtw89_debug(rtwdev, RTW89_DBG_RFK,  "[DACK]DRCK timeout\n");  in _drck()
540 	rtw89_rfk_parser(rtwdev, &rtw8852c_drck_defs_tbl);  in _drck()
542 	val = rtw89_phy_read32_mask(rtwdev, R_DRCK_RES, B_DRCK_RES);  in _drck()
543 	rtw89_phy_write32_mask(rtwdev, R_DRCK, B_DRCK_IDLE, 0x0);  in _drck()
544 	rtw89_phy_write32_mask(rtwdev, R_DRCK, B_DRCK_VAL, val);  in _drck()
545 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0xc0c4 = 0x%x\n",  in _drck()
546 		    rtw89_phy_read32_mask(rtwdev, R_DRCK, MASKDWORD));  in _drck()
549 static void _dac_cal(struct rtw89_dev *rtwdev, bool force)  in _dac_cal()  argument
551 	struct rtw89_dack_info *dack = &rtwdev->dack;  in _dac_cal()
553 	u8 phy_map = rtw89_btc_phymap(rtwdev, RTW89_PHY_0, RF_AB);  in _dac_cal()
556 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK b\n");  in _dac_cal()
557 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK start!!!\n");  in _dac_cal()
558 	rf0_0 = rtw89_read_rf(rtwdev, RF_PATH_A, RR_MOD, RFREG_MASK);  in _dac_cal()
559 	rf1_0 = rtw89_read_rf(rtwdev, RF_PATH_B, RR_MOD, RFREG_MASK);  in _dac_cal()
560 	_drck(rtwdev);  in _dac_cal()
562 	rtw89_write_rf(rtwdev, RF_PATH_A, RR_RSV1, RR_RSV1_RST, 0x0);  in _dac_cal()
563 	rtw89_write_rf(rtwdev, RF_PATH_B, RR_RSV1, RR_RSV1_RST, 0x0);  in _dac_cal()
564 	rtw89_write_rf(rtwdev, RF_PATH_A, RR_MOD, RFREG_MASK, 0x337e1);  in _dac_cal()
565 	rtw89_write_rf(rtwdev, RF_PATH_B, RR_MOD, RFREG_MASK, 0x337e1);  in _dac_cal()
566 	rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DACK, BTC_WRFK_ONESHOT_START);  in _dac_cal()
567 	_addck(rtwdev);  in _dac_cal()
568 	rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DACK, BTC_WRFK_ONESHOT_STOP);  in _dac_cal()
570 	_addck_backup(rtwdev);  in _dac_cal()
571 	_addck_reload(rtwdev);  in _dac_cal()
572 	rtw89_write_rf(rtwdev, RF_PATH_A, RR_MODOPT, RFREG_MASK, 0x0);  in _dac_cal()
573 	rtw89_write_rf(rtwdev, RF_PATH_B, RR_MODOPT, RFREG_MASK, 0x0);  in _dac_cal()
574 	rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DACK, BTC_WRFK_ONESHOT_START);  in _dac_cal()
575 	_dack(rtwdev);  in _dac_cal()
576 	rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DACK, BTC_WRFK_ONESHOT_STOP);  in _dac_cal()
578 	_dack_dump(rtwdev);  in _dac_cal()
580 	rtw89_write_rf(rtwdev, RF_PATH_A, RR_MOD, RFREG_MASK, rf0_0);  in _dac_cal()
581 	rtw89_write_rf(rtwdev, RF_PATH_B, RR_MOD, RFREG_MASK, rf1_0);  in _dac_cal()
582 	rtw89_write_rf(rtwdev, RF_PATH_A, RR_RSV1, RR_RSV1_RST, 0x1);  in _dac_cal()
583 	rtw89_write_rf(rtwdev, RF_PATH_B, RR_RSV1, RR_RSV1_RST, 0x1);  in _dac_cal()
585 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK finish!!!\n");  in _dac_cal()
608 static void rtw8852c_disable_rxagc(struct rtw89_dev *rtwdev, u8 path, u8 en_rxgac)  in rtw8852c_disable_rxagc()  argument
611 		rtw89_phy_write32_mask(rtwdev, R_P0_AGC_CTL, B_P0_AGC_EN, en_rxgac);  in rtw8852c_disable_rxagc()
613 		rtw89_phy_write32_mask(rtwdev, R_P1_AGC_CTL, B_P1_AGC_EN, en_rxgac);  in rtw8852c_disable_rxagc()
616 static void _iqk_rxk_setting(struct rtw89_dev *rtwdev, u8 path)  in _iqk_rxk_setting()  argument
618 	struct rtw89_iqk_info *iqk_info = &rtwdev->iqk;  in _iqk_rxk_setting()
621 		rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_RXK, 0x0101);  in _iqk_rxk_setting()
623 		rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_RXK, 0x0202);  in _iqk_rxk_setting()
628 		rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), B_DPD_GDIS, 0x1);  in _iqk_rxk_setting()
629 		rtw8852c_rxck_force(rtwdev, path, true, ADC_480M);  in _iqk_rxk_setting()
630 		rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), B_ACK_VAL, 0x0);  in _iqk_rxk_setting()
631 		rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 + (path << 8), B_P0_CFCH_BW0, 0x3);  in _iqk_rxk_setting()
632 		rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1 + (path << 8), B_P0_CFCH_BW1, 0xf);  in _iqk_rxk_setting()
633 		rtw89_write_rf(rtwdev, path, RR_RXBB2, RR_RXBB2_CKT, 0x1);  in _iqk_rxk_setting()
634 		rtw89_phy_write32_mask(rtwdev, R_P0_NRBW + (path << 13), B_P0_NRBW_DBG, 0x1);  in _iqk_rxk_setting()
637 		rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), B_DPD_GDIS, 0x1);  in _iqk_rxk_setting()
638 		rtw8852c_rxck_force(rtwdev, path, true, ADC_960M);  in _iqk_rxk_setting()
639 		rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), B_ACK_VAL, 0x1);  in _iqk_rxk_setting()
640 		rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 + (path << 8), B_P0_CFCH_BW0, 0x2);  in _iqk_rxk_setting()
641 		rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1 + (path << 8), B_P0_CFCH_BW1, 0xd);  in _iqk_rxk_setting()
642 		rtw89_write_rf(rtwdev, path, RR_RXBB2, RR_RXBB2_CKT, 0x1);  in _iqk_rxk_setting()
643 		rtw89_phy_write32_mask(rtwdev, R_P0_NRBW + (path << 13), B_P0_NRBW_DBG, 0x1);  in _iqk_rxk_setting()
646 		rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), B_DPD_GDIS, 0x1);  in _iqk_rxk_setting()
647 		rtw8852c_rxck_force(rtwdev, path, true, ADC_1920M);  in _iqk_rxk_setting()
648 		rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), B_ACK_VAL, 0x2);  in _iqk_rxk_setting()
649 		rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 + (path << 8), B_P0_CFCH_BW0, 0x1);  in _iqk_rxk_setting()
650 		rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1 + (path << 8), B_P0_CFCH_BW1, 0xb);  in _iqk_rxk_setting()
651 		rtw89_write_rf(rtwdev, path, RR_RXBB2, RR_RXBB2_CKT, 0x1);  in _iqk_rxk_setting()
652 		rtw89_phy_write32_mask(rtwdev, R_P0_NRBW + (path << 13), B_P0_NRBW_DBG, 0x1);  in _iqk_rxk_setting()
658 	rtw89_rfk_parser(rtwdev, &rtw8852c_iqk_rxk_cfg_defs_tbl);  in _iqk_rxk_setting()
661 		rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_RXK, 0x1101);  in _iqk_rxk_setting()
663 		rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_RXK, 0x2202);  in _iqk_rxk_setting()
666 static bool _iqk_check_cal(struct rtw89_dev *rtwdev, u8 path, u8 ktype)  in _iqk_check_cal()  argument
673 				       1, 8200, false, rtwdev, 0xbff8, MASKBYTE0);  in _iqk_check_cal()
675 		rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]IQK timeout!!!\n");  in _iqk_check_cal()
677 	rtw89_phy_write32_clr(rtwdev, R_NCTL_N1, MASKBYTE0);  in _iqk_check_cal()
678 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, ret=%d\n", path, ret);  in _iqk_check_cal()
679 	tmp = rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, MASKDWORD);  in _iqk_check_cal()
680 	rtw89_debug(rtwdev, RTW89_DBG_RFK,  in _iqk_check_cal()
686 static bool _iqk_one_shot(struct rtw89_dev *rtwdev,  in _iqk_one_shot()  argument
689 	struct rtw89_iqk_info *iqk_info = &rtwdev->iqk;  in _iqk_one_shot()
699 		rtw89_phy_write32_mask(rtwdev, addr_rfc_ctl, 0x00000002, 0x1);  in _iqk_one_shot()
703 		rtw89_phy_write32_mask(rtwdev, addr_rfc_ctl, 0x00000002, 0x1);  in _iqk_one_shot()
707 		rtw89_phy_write32_mask(rtwdev, addr_rfc_ctl, 0x00000002, 0x1);  in _iqk_one_shot()
711 		rtw89_phy_write32_mask(rtwdev, addr_rfc_ctl, 0x00000002, 0x1);  in _iqk_one_shot()
715 		rtw89_phy_write32_mask(rtwdev, addr_rfc_ctl, 0x00000002, 0x1);  in _iqk_one_shot()
719 		rtw89_phy_write32_mask(rtwdev, addr_rfc_ctl, 0x00000002, 0x0);  in _iqk_one_shot()
726 		rtw89_phy_write32_mask(rtwdev, addr_rfc_ctl, 0x00000002, 0x1);  in _iqk_one_shot()
730 		rtw89_phy_write32_mask(rtwdev, addr_rfc_ctl, 0x00000002, 0x0);  in _iqk_one_shot()
734 		rtw89_phy_write32_mask(rtwdev, addr_rfc_ctl, 0x00000002, 0x1);  in _iqk_one_shot()
741 	rtw89_phy_write32_mask(rtwdev, R_NCTL_CFG, MASKDWORD, iqk_cmd + 1);  in _iqk_one_shot()
743 	fail = _iqk_check_cal(rtwdev, path, ktype);  in _iqk_one_shot()
744 	rtw89_phy_write32_mask(rtwdev, addr_rfc_ctl, 0x00000002, 0x0);  in _iqk_one_shot()
749 static bool _rxk_group_sel(struct rtw89_dev *rtwdev,  in _rxk_group_sel()  argument
752 	struct rtw89_iqk_info *iqk_info = &rtwdev->iqk;  in _rxk_group_sel()
758 	bkrf0 = rtw89_read_rf(rtwdev, path, RR_MOD, RR_MOD_NBW);  in _rxk_group_sel()
760 		rtw89_write_rf(rtwdev, RF_PATH_B, RR_IQKPLL, RR_IQKPLL_MOD, 0x3);  in _rxk_group_sel()
761 		tmp = rtw89_read_rf(rtwdev, RF_PATH_B, RR_CHTR, RR_CHTR_MOD);  in _rxk_group_sel()
762 		rtw89_write_rf(rtwdev, RF_PATH_B, RR_RSV4, RR_RSV4_AGH, tmp);  in _rxk_group_sel()
763 		tmp = rtw89_read_rf(rtwdev, RF_PATH_B, RR_CHTR, RR_CHTR_TXRX);  in _rxk_group_sel()
764 		rtw89_write_rf(rtwdev, RF_PATH_B, RR_RSV4, RR_RSV4_PLLCH, tmp);  in _rxk_group_sel()
770 		rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, 0xc);  in _rxk_group_sel()
771 		rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_NBW, 0x0);  in _rxk_group_sel()
772 		rtw89_write_rf(rtwdev, path, RR_RXG, RR_RXG_IQKMOD, 0x9);  in _rxk_group_sel()
775 		rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, 0xc);  in _rxk_group_sel()
776 		rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_NBW, 0x0);  in _rxk_group_sel()
777 		rtw89_write_rf(rtwdev, path, RR_RXAE, RR_RXAE_IQKMOD, 0x8);  in _rxk_group_sel()
780 		rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, 0xc);  in _rxk_group_sel()
781 		rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_NBW, 0x0);  in _rxk_group_sel()
782 		rtw89_write_rf(rtwdev, path, RR_RXAE, RR_RXAE_IQKMOD, 0x9);  in _rxk_group_sel()
792 			rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXG,  in _rxk_group_sel()
794 			rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_VOBUF,  in _rxk_group_sel()
798 			rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXG,  in _rxk_group_sel()
800 			rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RXA2_IATT,  in _rxk_group_sel()
804 			rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXG,  in _rxk_group_sel()
806 			rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RXA2_IATT,  in _rxk_group_sel()
810 		rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8),  in _rxk_group_sel()
812 		rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8),  in _rxk_group_sel()
814 		rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8),  in _rxk_group_sel()
816 		fail = _iqk_one_shot(rtwdev, phy_idx, path, ID_RXK);  in _rxk_group_sel()
820 		rtw89_write_rf(rtwdev, path, RR_IQKPLL, RR_IQKPLL_MOD, 0x0);  in _rxk_group_sel()
821 	rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_NBW, bkrf0);  in _rxk_group_sel()
834 static bool _iqk_nbrxk(struct rtw89_dev *rtwdev,  in _iqk_nbrxk()  argument
837 	struct rtw89_iqk_info *iqk_info = &rtwdev->iqk;  in _iqk_nbrxk()
843 	bkrf0 = rtw89_read_rf(rtwdev, path, RR_MOD, RR_MOD_NBW);  in _iqk_nbrxk()
845 		rtw89_write_rf(rtwdev, RF_PATH_B, RR_IQKPLL, RR_IQKPLL_MOD, 0x3);  in _iqk_nbrxk()
846 		tmp = rtw89_read_rf(rtwdev, RF_PATH_B, RR_CHTR, RR_CHTR_MOD);  in _iqk_nbrxk()
847 		rtw89_write_rf(rtwdev, RF_PATH_B, RR_RSV4, RR_RSV4_AGH, tmp);  in _iqk_nbrxk()
848 		tmp = rtw89_read_rf(rtwdev, RF_PATH_B, RR_CHTR, RR_CHTR_TXRX);  in _iqk_nbrxk()
849 		rtw89_write_rf(rtwdev, RF_PATH_B, RR_RSV4, RR_RSV4_PLLCH, tmp);  in _iqk_nbrxk()
855 		rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, 0xc);  in _iqk_nbrxk()
856 		rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_NBW, 0x0);  in _iqk_nbrxk()
857 		rtw89_write_rf(rtwdev, path, RR_RXG, RR_RXG_IQKMOD, 0x9);  in _iqk_nbrxk()
860 		rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, 0xc);  in _iqk_nbrxk()
861 		rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_NBW, 0x0);  in _iqk_nbrxk()
862 		rtw89_write_rf(rtwdev, path, RR_RXAE, RR_RXAE_IQKMOD, 0x8);  in _iqk_nbrxk()
865 		rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, 0xc);  in _iqk_nbrxk()
866 		rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_NBW, 0x0);  in _iqk_nbrxk()
867 		rtw89_write_rf(rtwdev, path, RR_RXAE, RR_RXAE_IQKMOD, 0x9);  in _iqk_nbrxk()
876 		rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXG, _rxk_g_idxrxgain[gp]);  in _iqk_nbrxk()
877 		rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_VOBUF, _rxk_g_idxattc2[gp]);  in _iqk_nbrxk()
880 		rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXG, _rxk_a_idxrxgain[gp]);  in _iqk_nbrxk()
881 		rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RXA2_IATT, _rxk_a_idxattc2[gp]);  in _iqk_nbrxk()
884 		rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXG, _rxk_a6_idxrxgain[gp]);  in _iqk_nbrxk()
885 		rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RXA2_IATT, _rxk_a6_idxattc2[gp]);  in _iqk_nbrxk()
889 	rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_SEL, 0x1);  in _iqk_nbrxk()
890 	rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_SET, 0x0);  in _iqk_nbrxk()
891 	rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_GP_V1, gp);  in _iqk_nbrxk()
892 	fail = _iqk_one_shot(rtwdev, phy_idx, path, ID_RXK);  in _iqk_nbrxk()
895 		rtw89_write_rf(rtwdev, path, RR_IQKPLL, RR_IQKPLL_MOD, 0x0);  in _iqk_nbrxk()
897 	rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_NBW, bkrf0);  in _iqk_nbrxk()
901 			rtw89_phy_read32_mask(rtwdev, R_RXIQC + (path << 8),  in _iqk_nbrxk()
910 static bool _txk_group_sel(struct rtw89_dev *rtwdev,  in _txk_group_sel()  argument
913 	struct rtw89_iqk_info *iqk_info = &rtwdev->iqk;  in _txk_group_sel()
920 			rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0,  in _txk_group_sel()
922 			rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1,  in _txk_group_sel()
924 			rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG,  in _txk_group_sel()
926 			rtw89_phy_write32_mask(rtwdev,  in _txk_group_sel()
931 			rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0,  in _txk_group_sel()
933 			rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1,  in _txk_group_sel()
935 			rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG,  in _txk_group_sel()
937 			rtw89_phy_write32_mask(rtwdev,  in _txk_group_sel()
942 			rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0,  in _txk_group_sel()
944 			rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1,  in _txk_group_sel()
946 			rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG,  in _txk_group_sel()
948 			rtw89_phy_write32_mask(rtwdev,  in _txk_group_sel()
955 		rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8),  in _txk_group_sel()
957 		rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8),  in _txk_group_sel()
959 		rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8),  in _txk_group_sel()
961 		rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8),  in _txk_group_sel()
963 		rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_TXT, 0x00b);  in _txk_group_sel()
964 		rtw89_phy_write32_mask(rtwdev, R_NCTL_N1, B_NCTL_N1_CIP, 0x00);  in _txk_group_sel()
965 		fail = _iqk_one_shot(rtwdev, phy_idx, path, ID_TXK);  in _txk_group_sel()
979 static bool _iqk_nbtxk(struct rtw89_dev *rtwdev,  in _iqk_nbtxk()  argument
982 	struct rtw89_iqk_info *iqk_info = &rtwdev->iqk;  in _iqk_nbtxk()
988 		rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, _txk_g_power_range[gp]);  in _iqk_nbtxk()
989 		rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, _txk_g_track_range[gp]);  in _iqk_nbtxk()
990 		rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, _txk_g_gain_bb[gp]);  in _iqk_nbtxk()
991 		rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8),  in _iqk_nbtxk()
995 		rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, _txk_a_power_range[gp]);  in _iqk_nbtxk()
996 		rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, _txk_a_track_range[gp]);  in _iqk_nbtxk()
997 		rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, _txk_a_gain_bb[gp]);  in _iqk_nbtxk()
998 		rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8),  in _iqk_nbtxk()
1002 		rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, _txk_a6_power_range[gp]);  in _iqk_nbtxk()
1003 		rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, _txk_a6_track_range[gp]);  in _iqk_nbtxk()
1004 		rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, _txk_a6_gain_bb[gp]);  in _iqk_nbtxk()
1005 		rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8),  in _iqk_nbtxk()
1012 	rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_SEL, 0x1);  in _iqk_nbtxk()
1013 	rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_SET, 0x1);  in _iqk_nbtxk()
1014 	rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_G2, 0x0);  in _iqk_nbtxk()
1015 	rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_GP, gp + 1);  in _iqk_nbtxk()
1016 	rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_TXT, 0x00b);  in _iqk_nbtxk()
1017 	rtw89_phy_write32_mask(rtwdev, R_NCTL_N1, B_NCTL_N1_CIP, 0x00);  in _iqk_nbtxk()
1018 	fail = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBTXK);  in _iqk_nbtxk()
1022 			rtw89_phy_read32_mask(rtwdev, R_TXIQC + (path << 8),  in _iqk_nbtxk()
1032 static bool _lok_finetune_check(struct rtw89_dev *rtwdev, u8 path)  in _lok_finetune_check()  argument
1034 	struct rtw89_mcc_info *mcc_info = &rtwdev->mcc;  in _lok_finetune_check()
1035 	struct rtw89_iqk_info *iqk_info = &rtwdev->iqk;  in _lok_finetune_check()
1044 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__);  in _lok_finetune_check()
1045 	val = rtw89_read_rf(rtwdev,  path, RR_TXMO, RFREG_MASK);  in _lok_finetune_check()
1056 	val = rtw89_read_rf(rtwdev, path, RR_LOKVB, RFREG_MASK);  in _lok_finetune_check()
1070 static bool _iqk_lok(struct rtw89_dev *rtwdev,  in _iqk_lok()  argument
1073 	struct rtw89_iqk_info *iqk_info = &rtwdev->iqk;  in _iqk_lok()
1079 	rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_TXT, IQK_DF4_TXT_8_25MHZ);  in _iqk_lok()
1084 		rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x6);  in _iqk_lok()
1085 		rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8),  in _iqk_lok()
1090 		rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x6);  in _iqk_lok()
1091 		rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8),  in _iqk_lok()
1096 		rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x6);  in _iqk_lok()
1097 		rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8),  in _iqk_lok()
1104 	tmp = _iqk_one_shot(rtwdev, phy_idx, path, tmp_id);  in _iqk_lok()
1110 		rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x12);  in _iqk_lok()
1111 		rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8),  in _iqk_lok()
1115 		rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x12);  in _iqk_lok()
1116 		rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8),  in _iqk_lok()
1120 		rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x12);  in _iqk_lok()
1121 		rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8),  in _iqk_lok()
1127 	tmp = _iqk_one_shot(rtwdev, phy_idx, path, ID_FLOK_VBUFFER);  in _iqk_lok()
1132 		rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x6);  in _iqk_lok()
1133 		rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8),  in _iqk_lok()
1138 		rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x6);  in _iqk_lok()
1139 		rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8),  in _iqk_lok()
1144 		rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x6);  in _iqk_lok()
1145 		rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8),  in _iqk_lok()
1152 	tmp = _iqk_one_shot(rtwdev, phy_idx, path, tmp_id);  in _iqk_lok()
1159 		rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x12);  in _iqk_lok()
1160 		rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8),  in _iqk_lok()
1164 		rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x12);  in _iqk_lok()
1165 		rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8),  in _iqk_lok()
1169 		rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x12);  in _iqk_lok()
1170 		rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8),  in _iqk_lok()
1174 	tmp = _iqk_one_shot(rtwdev, phy_idx, path, ID_FLOK_VBUFFER);  in _iqk_lok()
1175 	fail = _lok_finetune_check(rtwdev, path);  in _iqk_lok()
1180 static void _iqk_txk_setting(struct rtw89_dev *rtwdev, u8 path)  in _iqk_txk_setting()  argument
1182 	struct rtw89_iqk_info *iqk_info = &rtwdev->iqk;  in _iqk_txk_setting()
1187 		rtw89_write_rf(rtwdev, path, RR_TXG1, RR_TXG1_ATT2, 0x0);  in _iqk_txk_setting()
1188 		rtw89_write_rf(rtwdev, path, RR_TXG1, RR_TXG1_ATT1, 0x0);  in _iqk_txk_setting()
1189 		rtw89_write_rf(rtwdev, path, RR_TXG2, RR_TXG2_ATT0, 0x1);  in _iqk_txk_setting()
1190 		rtw89_write_rf(rtwdev, path, RR_TXA2, RR_TXA2_LDO, 0xf);  in _iqk_txk_setting()
1191 		rtw89_write_rf(rtwdev, path, RR_TXGA, RR_TXGA_LOK_EXT, 0x0);  in _iqk_txk_setting()
1192 		rtw89_write_rf(rtwdev, path, RR_LUTWE, RR_LUTWE_LOK, 0x1);  in _iqk_txk_setting()
1193 		rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASK,  in _iqk_txk_setting()
1196 		rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, 0x0);  in _iqk_txk_setting()
1197 		rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, 0x6);  in _iqk_txk_setting()
1200 		rtw89_write_rf(rtwdev, path, RR_TXATANK, RR_TXATANK_LBSW2, 0x0);  in _iqk_txk_setting()
1201 		rtw89_write_rf(rtwdev, path, RR_TXPOW, RR_TXPOW_TXAS, 0x1);  in _iqk_txk_setting()
1202 		rtw89_write_rf(rtwdev, path, RR_TXA2, RR_TXA2_LDO, 0xf);  in _iqk_txk_setting()
1203 		rtw89_write_rf(rtwdev, path, RR_TXGA, RR_TXGA_LOK_EXT, 0x0);  in _iqk_txk_setting()
1204 		rtw89_write_rf(rtwdev, path, RR_LUTWE, RR_LUTWE_LOK, 0x1);  in _iqk_txk_setting()
1205 		rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASK,  in _iqk_txk_setting()
1208 		rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, 0x0);  in _iqk_txk_setting()
1209 		rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, 0x6);  in _iqk_txk_setting()
1212 		rtw89_write_rf(rtwdev, path, RR_TXATANK, RR_TXATANK_LBSW2, 0x0);  in _iqk_txk_setting()
1213 		rtw89_write_rf(rtwdev, path, RR_TXPOW, RR_TXPOW_TXAS, 0x1);  in _iqk_txk_setting()
1214 		rtw89_write_rf(rtwdev, path, RR_TXA2, RR_TXA2_LDO, 0xf);  in _iqk_txk_setting()
1215 		rtw89_write_rf(rtwdev, path, RR_TXGA, RR_TXGA_LOK_EXT, 0x0);  in _iqk_txk_setting()
1216 		rtw89_write_rf(rtwdev, path, RR_LUTWE, RR_LUTWE_LOK, 0x1);  in _iqk_txk_setting()
1217 		rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASK,  in _iqk_txk_setting()
1220 		rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, 0x0);  in _iqk_txk_setting()
1221 		rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, 0x6);  in _iqk_txk_setting()
1226 static void _iqk_info_iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx,  in _iqk_info_iqk()  argument
1229 	struct rtw89_iqk_info *iqk_info = &rtwdev->iqk;  in _iqk_info_iqk()
1234 		ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]);  in _iqk_info_iqk()
1236 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%d_thermal = %d\n", path,  in _iqk_info_iqk()
1238 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%d_LOK_COR_fail= %d\n", path,  in _iqk_info_iqk()
1240 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%d_LOK_FIN_fail= %d\n", path,  in _iqk_info_iqk()
1242 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%d_TXIQK_fail = %d\n", path,  in _iqk_info_iqk()
1244 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%d_RXIQK_fail= %d,\n", path,  in _iqk_info_iqk()
1248 	rtw89_phy_write32_mask(rtwdev, R_IQKINF, B_IQKINF_FCOR << (path * 4), flag);  in _iqk_info_iqk()
1250 	rtw89_phy_write32_mask(rtwdev, R_IQKINF, B_IQKINF_FFIN << (path * 4), flag);  in _iqk_info_iqk()
1252 	rtw89_phy_write32_mask(rtwdev, R_IQKINF, B_IQKINF_FTX << (path * 4), flag);  in _iqk_info_iqk()
1254 	rtw89_phy_write32_mask(rtwdev, R_IQKINF, B_IQKINF_F_RX << (path * 4), flag);  in _iqk_info_iqk()
1256 	tmp = rtw89_phy_read32_mask(rtwdev, R_IQK_RES + (path << 8), MASKDWORD);  in _iqk_info_iqk()
1258 	tmp = rtw89_phy_read32_mask(rtwdev, R_TXIQC + (path << 8), MASKDWORD);  in _iqk_info_iqk()
1260 	tmp = rtw89_phy_read32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD);  in _iqk_info_iqk()
1263 	rtw89_phy_write32_mask(rtwdev, R_IQKINF2, B_IQKINF2_KCNT,  in _iqk_info_iqk()
1266 	tmp = rtw89_phy_read32_mask(rtwdev, R_IQKINF, B_IQKINF_FAIL << (path * 4));  in _iqk_info_iqk()
1269 	rtw89_phy_write32_mask(rtwdev, R_IQKINF2, B_IQKINF2_FCNT << (path * 4),  in _iqk_info_iqk()
1273 static void _iqk_by_path(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, u8 path)  in _iqk_by_path()  argument
1275 	struct rtw89_iqk_info *iqk_info = &rtwdev->iqk;  in _iqk_by_path()
1277 	_iqk_txk_setting(rtwdev, path);  in _iqk_by_path()
1278 	iqk_info->lok_fail[path] = _iqk_lok(rtwdev, phy_idx, path);  in _iqk_by_path()
1281 		iqk_info->iqk_tx_fail[0][path] = _iqk_nbtxk(rtwdev, phy_idx, path);  in _iqk_by_path()
1283 		iqk_info->iqk_tx_fail[0][path] = _txk_group_sel(rtwdev, phy_idx, path);  in _iqk_by_path()
1285 	_iqk_rxk_setting(rtwdev, path);  in _iqk_by_path()
1287 		iqk_info->iqk_rx_fail[0][path] = _iqk_nbrxk(rtwdev, phy_idx, path);  in _iqk_by_path()
1289 		iqk_info->iqk_rx_fail[0][path] = _rxk_group_sel(rtwdev, phy_idx, path);  in _iqk_by_path()
1291 	_iqk_info_iqk(rtwdev, phy_idx, path);  in _iqk_by_path()
1294 static void _iqk_get_ch_info(struct rtw89_dev *rtwdev,  in _iqk_get_ch_info()  argument
1297 	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);  in _iqk_get_ch_info()
1298 	struct rtw89_iqk_info *iqk_info = &rtwdev->iqk;  in _iqk_get_ch_info()
1300 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__);  in _iqk_get_ch_info()
1306 	rtw89_debug(rtwdev, RTW89_DBG_RFK,  in _iqk_get_ch_info()
1309 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]iqk_info->iqk_bw[%x] = 0x%x\n",  in _iqk_get_ch_info()
1311 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]iqk_info->iqk_ch[%x] = 0x%x\n",  in _iqk_get_ch_info()
1313 	rtw89_debug(rtwdev, RTW89_DBG_RFK,  in _iqk_get_ch_info()
1315 		    rtwdev->dbcc_en ? "on" : "off",  in _iqk_get_ch_info()
1321 	if (!rtwdev->dbcc_en)  in _iqk_get_ch_info()
1326 	rtw89_phy_write32_mask(rtwdev, R_IQKINF, B_IQKINF_VER, RTW8852C_IQK_VER);  in _iqk_get_ch_info()
1327 	rtw89_phy_write32_mask(rtwdev, R_IQKCH, B_IQKCH_BAND << (path * 16),  in _iqk_get_ch_info()
1329 	rtw89_phy_write32_mask(rtwdev, R_IQKCH, B_IQKCH_BW << (path * 16),  in _iqk_get_ch_info()
1331 	rtw89_phy_write32_mask(rtwdev, R_IQKCH, B_IQKCH_CH << (path * 16),  in _iqk_get_ch_info()
1334 	rtw89_phy_write32_mask(rtwdev, R_IQKINF2, B_IQKINF2_NCTLV, RTW8852C_NCTL_VER);  in _iqk_get_ch_info()
1337 static void _iqk_start_iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx,  in _iqk_start_iqk()  argument
1340 	_iqk_by_path(rtwdev, phy_idx, path);  in _iqk_start_iqk()
1343 static void _iqk_restore(struct rtw89_dev *rtwdev, u8 path)  in _iqk_restore()  argument
1345 	struct rtw89_iqk_info *iqk_info = &rtwdev->iqk;  in _iqk_restore()
1348 	rtw89_phy_write32_mask(rtwdev, R_TXIQC + (path << 8), MASKDWORD,  in _iqk_restore()
1350 	rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD,  in _iqk_restore()
1352 	rtw89_phy_write32_mask(rtwdev, R_NCTL_CFG, MASKDWORD,  in _iqk_restore()
1355 	fail = _iqk_check_cal(rtwdev, path, 0x12);  in _iqk_restore()
1356 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] restore fail  = %x\n", fail);  in _iqk_restore()
1358 	rtw89_phy_write32_mask(rtwdev, R_NCTL_N1, B_NCTL_N1_CIP, 0x00);  in _iqk_restore()
1359 	rtw89_phy_write32_mask(rtwdev, R_NCTL_RPT, MASKDWORD, 0x00000000);  in _iqk_restore()
1360 	rtw89_phy_write32_mask(rtwdev, R_KIP_SYSCFG, MASKDWORD, 0x80000000);  in _iqk_restore()
1362 	rtw89_write_rf(rtwdev, path, RR_LUTWE, RR_LUTWE_LOK, 0x0);  in _iqk_restore()
1363 	rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RR_MOD_V_RX);  in _iqk_restore()
1364 	rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x1);  in _iqk_restore()
1367 static void _iqk_afebb_restore(struct rtw89_dev *rtwdev,  in _iqk_afebb_restore()  argument
1370 	rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A,  in _iqk_afebb_restore()
1374 	rtw8852c_disable_rxagc(rtwdev, path, 0x1);  in _iqk_afebb_restore()
1377 static void _iqk_preset(struct rtw89_dev *rtwdev, u8 path)  in _iqk_preset()  argument
1379 	struct rtw89_mcc_info *mcc_info = &rtwdev->mcc;  in _iqk_preset()
1383 	rtw89_phy_write32_mask(rtwdev, R_COEF_SEL + (path << 8), B_COEF_SEL_IQC, idx);  in _iqk_preset()
1384 	rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_G3, idx);  in _iqk_preset()
1385 	rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0);  in _iqk_preset()
1386 	rtw89_phy_write32_mask(rtwdev, R_NCTL_RPT, MASKDWORD, 0x00000080);  in _iqk_preset()
1387 	rtw89_phy_write32_mask(rtwdev, R_KIP_SYSCFG, MASKDWORD, 0x81ff010a);  in _iqk_preset()
1390 static void _iqk_macbb_setting(struct rtw89_dev *rtwdev,  in _iqk_macbb_setting()  argument
1393 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===> %s\n", __func__);  in _iqk_macbb_setting()
1396 	rtw89_write_rf(rtwdev,  path, RR_BBDC, RR_BBDC_SEL, 0x0);  in _iqk_macbb_setting()
1397 	rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A0 << path, 0x1);  in _iqk_macbb_setting()
1398 	rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A1 << path, 0x0);  in _iqk_macbb_setting()
1399 	rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A2 << path, 0x1);  in _iqk_macbb_setting()
1400 	rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A3 << path, 0x0);  in _iqk_macbb_setting()
1403 	rtw8852c_disable_rxagc(rtwdev, path, 0x0);  in _iqk_macbb_setting()
1404 	rtw89_phy_write32_mask(rtwdev, R_UPD_CLK | (path << 13), MASKDWORD, 0xf801fffd);  in _iqk_macbb_setting()
1405 	rtw89_phy_write32_mask(rtwdev, R_UPD_CLK | (path << 13), B_DPD_DIS, 0x1);  in _iqk_macbb_setting()
1406 	rtw89_phy_write32_mask(rtwdev, R_UPD_CLK | (path << 13), B_DAC_VAL, 0x1);  in _iqk_macbb_setting()
1408 	rtw8852c_txck_force(rtwdev, path, true, DAC_960M);  in _iqk_macbb_setting()
1409 	rtw89_phy_write32_mask(rtwdev, R_UPD_CLK | (path << 13), B_DPD_GDIS, 0x1);  in _iqk_macbb_setting()
1411 	rtw8852c_rxck_force(rtwdev, path, true, ADC_1920M);  in _iqk_macbb_setting()
1412 	rtw89_phy_write32_mask(rtwdev, R_UPD_CLK | (path << 13), B_ACK_VAL, 0x2);  in _iqk_macbb_setting()
1414 	rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 | (path << 8), B_P0_CFCH_BW0, 0x1);  in _iqk_macbb_setting()
1415 	rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1 | (path << 8), B_P0_CFCH_BW1, 0xb);  in _iqk_macbb_setting()
1416 	rtw89_phy_write32_mask(rtwdev, R_P0_NRBW | (path << 13), B_P0_NRBW_DBG, 0x1);  in _iqk_macbb_setting()
1417 	rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15, 0x1f);  in _iqk_macbb_setting()
1418 	rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15, 0x13);  in _iqk_macbb_setting()
1419 	rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_15, 0x0001);  in _iqk_macbb_setting()
1420 	rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_15, 0x0041);  in _iqk_macbb_setting()
1421 	rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A1 << path, 0x1);  in _iqk_macbb_setting()
1422 	rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A3 << path, 0x1);  in _iqk_macbb_setting()
1425 static void _rck(struct rtw89_dev *rtwdev, enum rtw89_rf_path path)  in _rck()  argument
1431 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RCK] ====== S%d RCK ======\n", path);  in _rck()
1433 	rf_reg5 = rtw89_read_rf(rtwdev, path, RR_RSV1, RFREG_MASK);  in _rck()
1435 	rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0);  in _rck()
1436 	rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RR_MOD_V_RX);  in _rck()
1438 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RCK] RF0x00 = 0x%x\n",  in _rck()
1439 		    rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK));  in _rck()
1442 	rtw89_write_rf(rtwdev, path, RR_RCKC, RFREG_MASK, 0x00240);  in _rck()
1445 				       false, rtwdev, path, 0x1c, BIT(3));  in _rck()
1447 		rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RCK] RCK timeout\n");  in _rck()
1449 	rck_val = rtw89_read_rf(rtwdev, path, RR_RCKC, RR_RCKC_CA);  in _rck()
1450 	rtw89_write_rf(rtwdev, path, RR_RCKC, RFREG_MASK, rck_val);  in _rck()
1452 	rtw89_write_rf(rtwdev, path, RR_RSV1, RFREG_MASK, rf_reg5);  in _rck()
1454 	rtw89_debug(rtwdev, RTW89_DBG_RFK,  in _rck()
1456 		    rtw89_read_rf(rtwdev, path, RR_RCKC, RFREG_MASK),  in _rck()
1457 		    rtw89_read_rf(rtwdev, path, RR_RCKS, RFREG_MASK));  in _rck()
1460 static void _iqk_init(struct rtw89_dev *rtwdev)  in _iqk_init()  argument
1462 	struct rtw89_iqk_info *iqk_info = &rtwdev->iqk;  in _iqk_init()
1465 	rtw89_phy_write32_clr(rtwdev, R_IQKINF, MASKDWORD);  in _iqk_init()
1469 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__);  in _iqk_init()
1492 static void _doiqk(struct rtw89_dev *rtwdev, bool force,  in _doiqk()  argument
1495 	struct rtw89_iqk_info *iqk_info = &rtwdev->iqk;  in _doiqk()
1498 	u8 phy_map = rtw89_btc_phymap(rtwdev, phy_idx, RF_AB);  in _doiqk()
1500 	rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_ONESHOT_START);  in _doiqk()
1502 	rtw89_debug(rtwdev, RTW89_DBG_RFK,  in _doiqk()
1508 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]Test Ver 0x%x\n", iqk_info->version);  in _doiqk()
1509 	_iqk_get_ch_info(rtwdev, phy_idx, path);  in _doiqk()
1510 	_rfk_backup_bb_reg(rtwdev, backup_bb_val);  in _doiqk()
1511 	_rfk_backup_rf_reg(rtwdev, backup_rf_val[path], path);  in _doiqk()
1512 	_iqk_macbb_setting(rtwdev, phy_idx, path);  in _doiqk()
1513 	_iqk_preset(rtwdev, path);  in _doiqk()
1514 	_iqk_start_iqk(rtwdev, phy_idx, path);  in _doiqk()
1515 	_iqk_restore(rtwdev, path);  in _doiqk()
1516 	_iqk_afebb_restore(rtwdev, phy_idx, path);  in _doiqk()
1517 	_rfk_restore_bb_reg(rtwdev, backup_bb_val);  in _doiqk()
1518 	_rfk_restore_rf_reg(rtwdev, backup_rf_val[path], path);  in _doiqk()
1519 	rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_ONESHOT_STOP);  in _doiqk()
1522 static void _iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, bool force)  in _iqk()  argument
1524 	switch (_kpath(rtwdev, phy_idx)) {  in _iqk()
1526 		_doiqk(rtwdev, force, phy_idx, RF_PATH_A);  in _iqk()
1529 		_doiqk(rtwdev, force, phy_idx, RF_PATH_B);  in _iqk()
1532 		_doiqk(rtwdev, force, phy_idx, RF_PATH_A);  in _iqk()
1533 		_doiqk(rtwdev, force, phy_idx, RF_PATH_B);  in _iqk()
1540 static void _rx_dck_toggle(struct rtw89_dev *rtwdev, u8 path)  in _rx_dck_toggle()  argument
1545 	rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_LV, 0x0);  in _rx_dck_toggle()
1546 	rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_LV, 0x1);  in _rx_dck_toggle()
1549 				       2, 2000, false, rtwdev, path,  in _rx_dck_toggle()
1552 		rtw89_warn(rtwdev, "[RX_DCK] S%d RXDCK timeout\n", path);  in _rx_dck_toggle()
1554 		rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RX_DCK] S%d RXDCK finish\n", path);  in _rx_dck_toggle()
1556 	rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_LV, 0x0);  in _rx_dck_toggle()
1559 static void _set_rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, u8 path,  in _set_rx_dck()  argument
1564 	rtw89_write_rf(rtwdev, path, RR_DCK1, RR_DCK1_CLR, 0x0);  in _set_rx_dck()
1566 	_rx_dck_toggle(rtwdev, path);  in _set_rx_dck()
1567 	if (rtw89_read_rf(rtwdev, path, RR_DCKC, RR_DCKC_CHK) == 0)  in _set_rx_dck()
1569 	res = rtw89_read_rf(rtwdev, path, RR_DCK, RR_DCK_DONE);  in _set_rx_dck()
1571 		rtw89_write_rf(rtwdev, path, RR_RXBB2, RR_RXBB2_IDAC, res);  in _set_rx_dck()
1572 		_rx_dck_toggle(rtwdev, path);  in _set_rx_dck()
1573 		rtw89_write_rf(rtwdev, path, RR_RXBB2, RR_RXBB2_IDAC, 0x1);  in _set_rx_dck()
1618 static void _rf_direct_cntrl(struct rtw89_dev *rtwdev,  in _rf_direct_cntrl()  argument
1622 		rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x1);  in _rf_direct_cntrl()
1624 		rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0);  in _rf_direct_cntrl()
1627 static void _dpk_onoff(struct rtw89_dev *rtwdev,
1630 static void _dpk_bkup_kip(struct rtw89_dev *rtwdev, const u32 reg[],  in _dpk_bkup_kip()  argument
1637 			rtw89_phy_read32_mask(rtwdev, reg[i] + (path << 8), MASKDWORD);  in _dpk_bkup_kip()
1639 		rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] Backup 0x%x = %x\n",  in _dpk_bkup_kip()
1644 static void _dpk_reload_kip(struct rtw89_dev *rtwdev, const u32 reg[],  in _dpk_reload_kip()  argument
1650 		rtw89_phy_write32_mask(rtwdev, reg[i] + (path << 8),  in _dpk_reload_kip()
1652 		rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] Reload 0x%x = %x\n",  in _dpk_reload_kip()
1657 static u8 _dpk_one_shot(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,  in _dpk_one_shot()  argument
1666 	rtw89_phy_write32_mask(rtwdev, R_NCTL_CFG, MASKDWORD, dpk_cmd);  in _dpk_one_shot()
1669 				       10, 20000, false, rtwdev, 0xbff8, MASKBYTE0);  in _dpk_one_shot()
1671 	rtw89_phy_write32_clr(rtwdev, R_NCTL_N1, MASKBYTE0);  in _dpk_one_shot()
1673 	rtw89_debug(rtwdev, RTW89_DBG_RFK,  in _dpk_one_shot()
1683 		rtw89_debug(rtwdev, RTW89_DBG_RFK,  in _dpk_one_shot()
1691 static void _dpk_information(struct rtw89_dev *rtwdev,  in _dpk_information()  argument
1695 	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);  in _dpk_information()
1696 	struct rtw89_dpk_info *dpk = &rtwdev->dpk;  in _dpk_information()
1704 	rtw89_debug(rtwdev, RTW89_DBG_RFK,  in _dpk_information()
1707 		    rtwdev->is_tssi_mode[path] ? "on" : "off",  in _dpk_information()
1708 		    rtwdev->dbcc_en ? "on" : "off",  in _dpk_information()
1716 static void _dpk_bb_afe_setting(struct rtw89_dev *rtwdev,  in _dpk_bb_afe_setting()  argument
1721 	rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A0 << path, 0x1);  in _dpk_bb_afe_setting()
1722 	rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A1 << path, 0x0);  in _dpk_bb_afe_setting()
1723 	rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A2 << path, 0x1);  in _dpk_bb_afe_setting()
1724 	rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A3 << path, 0x0);  in _dpk_bb_afe_setting()
1727 	rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), MASKDWORD, 0xd801dffd);  in _dpk_bb_afe_setting()
1730 	rtw8852c_txck_force(rtwdev, path, true, DAC_960M);  in _dpk_bb_afe_setting()
1733 	rtw8852c_rxck_force(rtwdev, path, true, ADC_1920M);  in _dpk_bb_afe_setting()
1734 	rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 + (path << 8), B_P0_CFCH_BW0, 0x1);  in _dpk_bb_afe_setting()
1735 	rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1 + (path << 8), B_P0_CFCH_BW1, 0xb);  in _dpk_bb_afe_setting()
1736 	rtw89_phy_write32_mask(rtwdev, R_P0_NRBW + (path << 13),  in _dpk_bb_afe_setting()
1738 	rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, MASKBYTE3, 0x1f);  in _dpk_bb_afe_setting()
1739 	rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, MASKBYTE3, 0x13);  in _dpk_bb_afe_setting()
1740 	rtw89_phy_write32_mask(rtwdev, R_ANAPAR, MASKHWORD, 0x0001);  in _dpk_bb_afe_setting()
1741 	rtw89_phy_write32_mask(rtwdev, R_ANAPAR, MASKHWORD, 0x0041);  in _dpk_bb_afe_setting()
1744 	rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A1 << path, 0x1);  in _dpk_bb_afe_setting()
1745 	rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A3 << path, 0x1);  in _dpk_bb_afe_setting()
1747 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d BB/AFE setting\n", path);  in _dpk_bb_afe_setting()
1750 static void _dpk_bb_afe_restore(struct rtw89_dev *rtwdev, u8 path)  in _dpk_bb_afe_restore()  argument
1752 	rtw89_phy_write32_mask(rtwdev, R_P0_NRBW + (path << 13),  in _dpk_bb_afe_restore()
1754 	rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A0 << path, 0x1);  in _dpk_bb_afe_restore()
1755 	rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A1 << path, 0x0);  in _dpk_bb_afe_restore()
1756 	rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A2 << path, 0x1);  in _dpk_bb_afe_restore()
1757 	rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A3 << path, 0x0);  in _dpk_bb_afe_restore()
1758 	rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), MASKDWORD, 0x00000000);  in _dpk_bb_afe_restore()
1759 	rtw89_phy_write32_mask(rtwdev, R_P0_RXCK + (path << 13), B_P0_TXCK_ALL, 0x00);  in _dpk_bb_afe_restore()
1760 	rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A0 << path, 0x0);  in _dpk_bb_afe_restore()
1761 	rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A2 << path, 0x0);  in _dpk_bb_afe_restore()
1763 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d BB/AFE restore\n", path);  in _dpk_bb_afe_restore()
1766 static void _dpk_tssi_pause(struct rtw89_dev *rtwdev,  in _dpk_tssi_pause()  argument
1769 	rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK + (path << 13),  in _dpk_tssi_pause()
1772 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d TSSI %s\n", path,  in _dpk_tssi_pause()
1776 static void _dpk_kip_control_rfc(struct rtw89_dev *rtwdev, u8 path, bool ctrl_by_kip)  in _dpk_kip_control_rfc()  argument
1778 	rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), B_IQK_RFC_ON, ctrl_by_kip);  in _dpk_kip_control_rfc()
1779 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] RFC is controlled by %s\n",  in _dpk_kip_control_rfc()
1783 static void _dpk_txpwr_bb_force(struct rtw89_dev *rtwdev, u8 path, bool force)  in _dpk_txpwr_bb_force()  argument
1785 	rtw89_phy_write32_mask(rtwdev, R_TXPWRB + (path << 13), B_TXPWRB_ON, force);  in _dpk_txpwr_bb_force()
1786 	rtw89_phy_write32_mask(rtwdev, R_TXPWRB_H + (path << 13), B_TXPWRB_RDY, force);  in _dpk_txpwr_bb_force()
1788 	rtw89_debug(rtwdev, RTW89_DBG_RFK,  "[DPK] S%d txpwr_bb_force %s\n",  in _dpk_txpwr_bb_force()
1792 static void _dpk_kip_restore(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,  in _dpk_kip_restore()  argument
1795 	_dpk_one_shot(rtwdev, phy, path, D_KIP_RESTORE);  in _dpk_kip_restore()
1796 	_dpk_kip_control_rfc(rtwdev, path, false);  in _dpk_kip_restore()
1797 	_dpk_txpwr_bb_force(rtwdev, path, false);  in _dpk_kip_restore()
1798 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d restore KIP\n", path);  in _dpk_kip_restore()
1801 static void _dpk_lbk_rxiqk(struct rtw89_dev *rtwdev,  in _dpk_lbk_rxiqk()  argument
1809 	rtw89_phy_write32_mask(rtwdev, R_DPD_V1 + (path << 8), B_DPD_LBK, 0x1);  in _dpk_lbk_rxiqk()
1810 	rtw89_phy_write32_mask(rtwdev, R_MDPK_RX_DCK, B_MDPK_RX_DCK_EN, 0x1);  in _dpk_lbk_rxiqk()
1812 	_dpk_kip_control_rfc(rtwdev, path, false);  in _dpk_lbk_rxiqk()
1814 	cur_rxbb = rtw89_read_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXBB);  in _dpk_lbk_rxiqk()
1815 	rf_11 = rtw89_read_rf(rtwdev, path, RR_TXIG, RFREG_MASK);  in _dpk_lbk_rxiqk()
1816 	reg_81cc = rtw89_phy_read32_mask(rtwdev, R_KIP_IQP + (path << 8),  in _dpk_lbk_rxiqk()
1819 	rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, 0x0);  in _dpk_lbk_rxiqk()
1820 	rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, 0x3);  in _dpk_lbk_rxiqk()
1821 	rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0xd);  in _dpk_lbk_rxiqk()
1822 	rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXBB, 0x1f);  in _dpk_lbk_rxiqk()
1824 	rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), B_KIP_IQP_IQSW, 0x12);  in _dpk_lbk_rxiqk()
1825 	rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), B_KIP_IQP_SW, 0x3);  in _dpk_lbk_rxiqk()
1827 	_dpk_kip_control_rfc(rtwdev, path, true);  in _dpk_lbk_rxiqk()
1829 	rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, MASKDWORD, RX_TONE_IDX);  in _dpk_lbk_rxiqk()
1831 	_dpk_one_shot(rtwdev, phy, path, LBK_RXIQK);  in _dpk_lbk_rxiqk()
1833 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d LBK RXIQC = 0x%x\n", path,  in _dpk_lbk_rxiqk()
1834 		    rtw89_phy_read32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD));  in _dpk_lbk_rxiqk()
1836 	_dpk_kip_control_rfc(rtwdev, path, false);  in _dpk_lbk_rxiqk()
1838 	rtw89_write_rf(rtwdev, path, RR_TXIG, RFREG_MASK, rf_11);  in _dpk_lbk_rxiqk()
1839 	rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXBB, cur_rxbb);  in _dpk_lbk_rxiqk()
1840 	rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), B_KIP_IQP_SW, reg_81cc);  in _dpk_lbk_rxiqk()
1842 	rtw89_phy_write32_mask(rtwdev, R_MDPK_RX_DCK, B_MDPK_RX_DCK_EN, 0x0);  in _dpk_lbk_rxiqk()
1843 	rtw89_phy_write32_mask(rtwdev, R_KPATH_CFG, B_KPATH_CFG_ED, 0x0);  in _dpk_lbk_rxiqk()
1844 	rtw89_phy_write32_mask(rtwdev, R_LOAD_COEF + (path << 8), B_LOAD_COEF_DI, 0x1);  in _dpk_lbk_rxiqk()
1846 	_dpk_kip_control_rfc(rtwdev, path, true);  in _dpk_lbk_rxiqk()
1849 static void _dpk_rf_setting(struct rtw89_dev *rtwdev, u8 gain,  in _dpk_rf_setting()  argument
1852 	struct rtw89_dpk_info *dpk = &rtwdev->dpk;  in _dpk_rf_setting()
1855 		rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASK,  in _dpk_rf_setting()
1856 			       0x50121 | BIT(rtwdev->dbcc_en));  in _dpk_rf_setting()
1857 		rtw89_write_rf(rtwdev, path, RR_MOD_V1, RR_MOD_MASK, RF_DPK);  in _dpk_rf_setting()
1858 		rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_ATTC, 0x2);  in _dpk_rf_setting()
1859 		rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_ATTR, 0x4);  in _dpk_rf_setting()
1860 		rtw89_write_rf(rtwdev, path, RR_LUTDBG, RR_LUTDBG_TIA, 0x1);  in _dpk_rf_setting()
1861 		rtw89_write_rf(rtwdev, path, RR_TIA, RR_TIA_N6, 0x1);  in _dpk_rf_setting()
1863 		rtw89_debug(rtwdev, RTW89_DBG_RFK,  in _dpk_rf_setting()
1865 			    rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK),  in _dpk_rf_setting()
1866 			    rtw89_read_rf(rtwdev, path, RR_RXBB, RFREG_MASK),  in _dpk_rf_setting()
1867 			    rtw89_read_rf(rtwdev, path, RR_TIA, RFREG_MASK),  in _dpk_rf_setting()
1868 			    rtw89_read_rf(rtwdev, path, RR_BTC, RFREG_MASK),  in _dpk_rf_setting()
1869 			    rtw89_read_rf(rtwdev, path, RR_LUTDBG, RFREG_MASK),  in _dpk_rf_setting()
1870 			    rtw89_read_rf(rtwdev, path, 0x1001a, RFREG_MASK));  in _dpk_rf_setting()
1872 		rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASK,  in _dpk_rf_setting()
1873 			       0x50101 | BIT(rtwdev->dbcc_en));  in _dpk_rf_setting()
1874 		rtw89_write_rf(rtwdev, path, RR_MOD_V1, RR_MOD_MASK, RF_DPK);  in _dpk_rf_setting()
1877 			rtw89_write_rf(rtwdev, path, RR_IQGEN, RR_IQGEN_BIAS, 0x8);  in _dpk_rf_setting()
1878 			rtw89_write_rf(rtwdev, path, RR_LOGEN, RR_LOGEN_RPT, 0xd);  in _dpk_rf_setting()
1880 			rtw89_write_rf(rtwdev, path, RR_LOGEN, RR_LOGEN_RPT, 0xd);  in _dpk_rf_setting()
1883 		rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RXA2_ATT, 0x0);  in _dpk_rf_setting()
1884 		rtw89_write_rf(rtwdev, path, RR_TXIQK, RR_TXIQK_ATT2, 0x3);  in _dpk_rf_setting()
1885 		rtw89_write_rf(rtwdev, path, RR_LUTDBG, RR_LUTDBG_TIA, 0x1);  in _dpk_rf_setting()
1886 		rtw89_write_rf(rtwdev, path, RR_TIA, RR_TIA_N6, 0x1);  in _dpk_rf_setting()
1889 			rtw89_write_rf(rtwdev, path, RR_RXBB2, RR_RXBB2_EBW, 0x0);  in _dpk_rf_setting()
1893 static void _dpk_tpg_sel(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 kidx)  in _dpk_tpg_sel()  argument
1895 	struct rtw89_dpk_info *dpk = &rtwdev->dpk;  in _dpk_tpg_sel()
1898 		rtw89_phy_write32_mask(rtwdev, R_TPG_MOD, B_TPG_MOD_F, 0x3);  in _dpk_tpg_sel()
1899 		rtw89_phy_write32_mask(rtwdev, R_TPG_SEL, MASKDWORD, 0x0180ff30);  in _dpk_tpg_sel()
1901 		rtw89_phy_write32_mask(rtwdev, R_TPG_MOD, B_TPG_MOD_F, 0x0);  in _dpk_tpg_sel()
1902 		rtw89_phy_write32_mask(rtwdev, R_TPG_SEL, MASKDWORD, 0xffe0fa00);  in _dpk_tpg_sel()
1904 		rtw89_phy_write32_mask(rtwdev, R_TPG_MOD, B_TPG_MOD_F, 0x2);  in _dpk_tpg_sel()
1905 		rtw89_phy_write32_mask(rtwdev, R_TPG_SEL, MASKDWORD, 0xff4009e0);  in _dpk_tpg_sel()
1907 		rtw89_phy_write32_mask(rtwdev, R_TPG_MOD, B_TPG_MOD_F, 0x1);  in _dpk_tpg_sel()
1908 		rtw89_phy_write32_mask(rtwdev, R_TPG_SEL, MASKDWORD, 0xf9f007d0);  in _dpk_tpg_sel()
1910 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] TPG_Select for %s\n",  in _dpk_tpg_sel()
1916 static bool _dpk_sync_check(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 kidx)  in _dpk_sync_check()  argument
1921 	struct rtw89_dpk_info *dpk = &rtwdev->dpk;  in _dpk_sync_check()
1926 	rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, B_KIP_RPT1_SEL, 0x0);  in _dpk_sync_check()
1928 	corr_idx = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_CORI);  in _dpk_sync_check()
1929 	corr_val = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_CORV);  in _dpk_sync_check()
1934 	rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, B_KIP_RPT1_SEL, 0x9);  in _dpk_sync_check()
1936 	dc_i = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_DCI);  in _dpk_sync_check()
1937 	dc_q = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_DCQ);  in _dpk_sync_check()
1942 	rtw89_debug(rtwdev, RTW89_DBG_RFK,  in _dpk_sync_check()
1949 	rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, B_KIP_RPT1_SEL, 0x8);  in _dpk_sync_check()
1950 	rxbb = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_RXBB);  in _dpk_sync_check()
1952 	rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, B_KIP_RPT1_SEL, 0x31);  in _dpk_sync_check()
1953 	rxbb_ov = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_RXOV);  in _dpk_sync_check()
1955 	rtw89_debug(rtwdev, RTW89_DBG_RFK,  in _dpk_sync_check()
1958 		    rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_DONE),  in _dpk_sync_check()
1968 static u16 _dpk_dgain_read(struct rtw89_dev *rtwdev)  in _dpk_dgain_read()  argument
1972 	rtw89_phy_write32_clr(rtwdev, R_KIP_RPT1, B_KIP_RPT1_SEL);  in _dpk_dgain_read()
1974 	dgain = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_DCI);  in _dpk_dgain_read()
1976 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] DGain = 0x%x (%d)\n", dgain, dgain);  in _dpk_dgain_read()
1981 static u8 _dpk_gainloss_read(struct rtw89_dev *rtwdev)  in _dpk_gainloss_read()  argument
1985 	rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, B_KIP_RPT1_SEL, 0x6);  in _dpk_gainloss_read()
1986 	rtw89_phy_write32_mask(rtwdev, R_DPK_CFG2, B_DPK_CFG2_ST, 0x1);  in _dpk_gainloss_read()
1988 	result = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_GL);  in _dpk_gainloss_read()
1990 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] tmp GL = %d\n", result);  in _dpk_gainloss_read()
1995 static void _dpk_kset_query(struct rtw89_dev *rtwdev, enum rtw89_rf_path path)  in _dpk_kset_query()  argument
1997 	struct rtw89_dpk_info *dpk = &rtwdev->dpk;  in _dpk_kset_query()
1999 	rtw89_phy_write32_mask(rtwdev, R_KIP_RPT + (path << 8), B_KIP_RPT_SEL, 0x10);  in _dpk_kset_query()
2001 		rtw89_phy_read32_mask(rtwdev, R_RPT_PER + (path << 8), 0xE0000000) - 1;  in _dpk_kset_query()
2004 static void _dpk_kip_set_txagc(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,  in _dpk_kip_set_txagc()  argument
2009 		rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] set S%d txagc to %ddBm\n", path, dbm);  in _dpk_kip_set_txagc()
2010 		rtw89_phy_write32_mask(rtwdev, R_TXPWRB + (path << 13), B_TXPWRB_VAL, dbm << 2);  in _dpk_kip_set_txagc()
2012 	_dpk_one_shot(rtwdev, phy, path, D_TXAGC);  in _dpk_kip_set_txagc()
2013 	_dpk_kset_query(rtwdev, path);  in _dpk_kip_set_txagc()
2016 static u8 _dpk_gainloss(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,  in _dpk_gainloss()  argument
2019 	_dpk_one_shot(rtwdev, phy, path, D_GAIN_LOSS);  in _dpk_gainloss()
2020 	_dpk_kip_set_txagc(rtwdev, phy, path, 0xff, false);  in _dpk_gainloss()
2022 	rtw89_phy_write32_mask(rtwdev, R_DPK_GL + (path << 8), B_DPK_GL_A1, 0x0);  in _dpk_gainloss()
2023 	rtw89_phy_write32_mask(rtwdev, R_DPK_GL + (path << 8), B_DPK_GL_A0, 0x0);  in _dpk_gainloss()
2025 	return _dpk_gainloss_read(rtwdev);  in _dpk_gainloss()
2028 static bool _dpk_pas_read(struct rtw89_dev *rtwdev, bool is_check)  in _dpk_pas_read()  argument
2033 	rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, MASKBYTE2, 0x06);  in _dpk_pas_read()
2034 	rtw89_phy_write32_mask(rtwdev, R_DPK_CFG2, B_DPK_CFG2_ST, 0x0);  in _dpk_pas_read()
2035 	rtw89_phy_write32_mask(rtwdev, R_DPK_CFG3, MASKBYTE2, 0x08);  in _dpk_pas_read()
2038 		rtw89_phy_write32_mask(rtwdev, R_DPK_CFG3, MASKBYTE3, 0x00);  in _dpk_pas_read()
2039 		val1_i = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKHWORD);  in _dpk_pas_read()
2041 		val1_q = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKLWORD);  in _dpk_pas_read()
2044 		rtw89_phy_write32_mask(rtwdev, R_DPK_CFG3, MASKBYTE3, 0x1f);  in _dpk_pas_read()
2045 		val2_i = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKHWORD);  in _dpk_pas_read()
2047 		val2_q = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKLWORD);  in _dpk_pas_read()
2050 		rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] PAS_delta = 0x%x\n",  in _dpk_pas_read()
2055 			rtw89_phy_write32_mask(rtwdev, R_DPK_CFG3, MASKBYTE3, i);  in _dpk_pas_read()
2056 			rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] PAS_Read[%02d]= 0x%08x\n", i,  in _dpk_pas_read()
2057 				    rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKDWORD));  in _dpk_pas_read()
2067 static bool _dpk_kip_set_rxagc(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,  in _dpk_kip_set_rxagc()  argument
2070 	_dpk_one_shot(rtwdev, phy, path, D_RXAGC);  in _dpk_kip_set_rxagc()
2072 	return _dpk_sync_check(rtwdev, path, kidx);  in _dpk_kip_set_rxagc()
2075 static void _dpk_read_rxsram(struct rtw89_dev *rtwdev)  in _dpk_read_rxsram()  argument
2079 	rtw89_rfk_parser(rtwdev, &rtw8852c_read_rxsram_pre_defs_tbl);  in _dpk_read_rxsram()
2082 		rtw89_phy_write32_mask(rtwdev, R_SRAM_IQRX, MASKDWORD, 0x00010000 | addr);  in _dpk_read_rxsram()
2084 		rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] RXSRAM[%03d] = 0x%07x\n", addr,  in _dpk_read_rxsram()
2085 			    rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKDWORD));  in _dpk_read_rxsram()
2088 	rtw89_rfk_parser(rtwdev, &rtw8852c_read_rxsram_post_defs_tbl);  in _dpk_read_rxsram()
2091 static void _dpk_bypass_rxiqc(struct rtw89_dev *rtwdev, enum rtw89_rf_path path)  in _dpk_bypass_rxiqc()  argument
2093 	rtw89_phy_write32_mask(rtwdev, R_DPD_V1 + (path << 8), B_DPD_LBK, 0x1);  in _dpk_bypass_rxiqc()
2094 	rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD, 0x40000002);  in _dpk_bypass_rxiqc()
2096 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] Bypass RXIQC\n");  in _dpk_bypass_rxiqc()
2099 static u8 _dpk_agc(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,  in _dpk_agc()  argument
2102 	struct rtw89_dpk_info *dpk = &rtwdev->dpk;  in _dpk_agc()
2114 			is_fail = _dpk_kip_set_rxagc(rtwdev, phy, path, kidx);  in _dpk_agc()
2117 				_dpk_read_rxsram(rtwdev);  in _dpk_agc()
2124 			dgain = _dpk_dgain_read(rtwdev);  in _dpk_agc()
2127 				_dpk_one_shot(rtwdev, phy, path, D_SYNC);  in _dpk_agc()
2128 				dgain = _dpk_dgain_read(rtwdev);  in _dpk_agc()
2133 					_dpk_bypass_rxiqc(rtwdev, path);  in _dpk_agc()
2135 					_dpk_lbk_rxiqk(rtwdev, phy, path);  in _dpk_agc()
2141 			tmp_gl_idx = _dpk_gainloss(rtwdev, phy, path, kidx);  in _dpk_agc()
2143 			if ((tmp_gl_idx == 0 && _dpk_pas_read(rtwdev, true)) ||  in _dpk_agc()
2155 				rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] Txagc@lower bound!!\n");  in _dpk_agc()
2158 				_dpk_kip_set_txagc(rtwdev, phy, path, tmp_dbm, true);  in _dpk_agc()
2167 				rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] Txagc@upper bound!!\n");  in _dpk_agc()
2170 				_dpk_kip_set_txagc(rtwdev, phy, path, tmp_dbm, true);  in _dpk_agc()
2177 			_dpk_kip_control_rfc(rtwdev, path, false);  in _dpk_agc()
2178 			tmp_rxbb = rtw89_read_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXBB);  in _dpk_agc()
2184 			rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXBB, tmp_rxbb);  in _dpk_agc()
2185 			rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] Adjust RXBB (%+d) = 0x%x\n",  in _dpk_agc()
2187 			_dpk_kip_control_rfc(rtwdev, path, true);  in _dpk_agc()
2197 		rtw89_warn(rtwdev, "[DPK] exceed loop limit\n");  in _dpk_agc()
2202 static void _dpk_set_mdpd_para(struct rtw89_dev *rtwdev, u8 order)  in _dpk_set_mdpd_para()  argument
2212 		rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] Wrong MDPD order!!(0x%x)\n", order);  in _dpk_set_mdpd_para()
2216 	rtw89_rfk_parser(rtwdev, order_tbls[order]);  in _dpk_set_mdpd_para()
2218 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] Set %s for IDL\n",  in _dpk_set_mdpd_para()
2224 static void _dpk_idl_mpa(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,  in _dpk_idl_mpa()  argument
2227 	struct rtw89_dpk_info *dpk = &rtwdev->dpk;  in _dpk_idl_mpa()
2232 	rtw89_phy_write32_mask(rtwdev, R_LDL_NORM, B_LDL_NORM_MA, 0x1);  in _dpk_idl_mpa()
2234 	if (rtw89_phy_read32_mask(rtwdev, R_DPK_MPA, B_DPK_MPA_T2) == 0x1)  in _dpk_idl_mpa()
2235 		_dpk_set_mdpd_para(rtwdev, 0x2);  in _dpk_idl_mpa()
2236 	else if (rtw89_phy_read32_mask(rtwdev, R_DPK_MPA, B_DPK_MPA_T1) == 0x1)  in _dpk_idl_mpa()
2237 		_dpk_set_mdpd_para(rtwdev, 0x1);  in _dpk_idl_mpa()
2238 	else if (rtw89_phy_read32_mask(rtwdev, R_DPK_MPA, B_DPK_MPA_T0) == 0x1)  in _dpk_idl_mpa()
2239 		_dpk_set_mdpd_para(rtwdev, 0x0);  in _dpk_idl_mpa()
2243 		_dpk_set_mdpd_para(rtwdev, 0x2);  in _dpk_idl_mpa()
2246 		_dpk_set_mdpd_para(rtwdev, 0x1);  in _dpk_idl_mpa()
2248 		_dpk_set_mdpd_para(rtwdev, 0x0);  in _dpk_idl_mpa()
2250 	rtw89_phy_write32_mask(rtwdev, R_DPK_IDL, B_DPK_IDL, 0x0);  in _dpk_idl_mpa()
2253 	_dpk_one_shot(rtwdev, phy, path, D_MDPK_IDL);  in _dpk_idl_mpa()
2254 	rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, B_KIP_RPT1_SEL, 0x0);  in _dpk_idl_mpa()
2255 	dpk_sync = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKDWORD);  in _dpk_idl_mpa()
2256 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] dpk_sync = 0x%x\n", dpk_sync);  in _dpk_idl_mpa()
2258 	rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, B_KIP_RPT1_SEL, 0xf);  in _dpk_idl_mpa()
2259 	ov_flag = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_SYNERR);  in _dpk_idl_mpa()
2261 		rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] ReK due to MDPK ov!!!\n");  in _dpk_idl_mpa()
2262 		_dpk_one_shot(rtwdev, phy, path, D_MDPK_IDL);  in _dpk_idl_mpa()
2263 		rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, B_KIP_RPT1_SEL, 0xf);  in _dpk_idl_mpa()
2264 		ov_flag = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_SYNERR);  in _dpk_idl_mpa()
2268 		_dpk_set_mdpd_para(rtwdev, 0x2);  in _dpk_idl_mpa()
2269 		_dpk_one_shot(rtwdev, phy, path, D_MDPK_IDL);  in _dpk_idl_mpa()
2273 static bool _dpk_reload_check(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,  in _dpk_reload_check()  argument
2276 	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);  in _dpk_reload_check()
2277 	struct rtw89_dpk_info *dpk = &rtwdev->dpk;  in _dpk_reload_check()
2289 		rtw89_phy_write32_mask(rtwdev, R_COEF_SEL + (path << 8),  in _dpk_reload_check()
2293 		rtw89_debug(rtwdev, RTW89_DBG_RFK,  in _dpk_reload_check()
2300 static void _dpk_kip_pwr_clk_onoff(struct rtw89_dev *rtwdev, bool turn_on)  in _dpk_kip_pwr_clk_onoff()  argument
2302 	rtw89_rfk_parser(rtwdev, turn_on ? &rtw8852c_dpk_kip_pwr_clk_on_defs_tbl :  in _dpk_kip_pwr_clk_onoff()
2306 static void _dpk_kip_preset_8852c(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,  in _dpk_kip_preset_8852c()  argument
2309 	rtw89_phy_write32_mask(rtwdev, R_KIP_MOD, B_KIP_MOD,  in _dpk_kip_preset_8852c()
2310 			       rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK));  in _dpk_kip_preset_8852c()
2312 	if (rtwdev->hal.cv == CHIP_CAV)  in _dpk_kip_preset_8852c()
2313 		rtw89_phy_write32_mask(rtwdev,  in _dpk_kip_preset_8852c()
2317 		rtw89_phy_write32_mask(rtwdev,  in _dpk_kip_preset_8852c()
2321 	_dpk_kip_control_rfc(rtwdev, path, true);  in _dpk_kip_preset_8852c()
2322 	rtw89_phy_write32_mask(rtwdev, R_COEF_SEL + (path << 8), B_COEF_SEL_MDPD, kidx);  in _dpk_kip_preset_8852c()
2324 	_dpk_one_shot(rtwdev, phy, path, D_KIP_PRESET);  in _dpk_kip_preset_8852c()
2327 static void _dpk_para_query(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 kidx)  in _dpk_para_query()  argument
2331 	struct rtw89_dpk_info *dpk = &rtwdev->dpk;  in _dpk_para_query()
2334 	para = rtw89_phy_read32_mask(rtwdev, dpk_par_regs[kidx][dpk->cur_k_set] + (path << 8),  in _dpk_para_query()
2340 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] thermal/ txagc_RF (K%d) = 0x%x/ 0x%x\n",  in _dpk_para_query()
2344 static void _dpk_gain_normalize_8852c(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,  in _dpk_gain_normalize_8852c()  argument
2347 	struct rtw89_dpk_info *dpk = &rtwdev->dpk;  in _dpk_gain_normalize_8852c()
2350 		rtw89_phy_write32_mask(rtwdev, R_DPK_GN + (path << 8), B_DPK_GN_AG, 0x200);  in _dpk_gain_normalize_8852c()
2351 		rtw89_phy_write32_mask(rtwdev, R_DPK_GN + (path << 8), B_DPK_GN_EN, 0x3);  in _dpk_gain_normalize_8852c()
2353 		_dpk_one_shot(rtwdev, phy, path, D_GAIN_NORM);  in _dpk_gain_normalize_8852c()
2355 		rtw89_phy_write32_mask(rtwdev, dpk_par_regs[kidx][dpk->cur_k_set] + (path << 8),  in _dpk_gain_normalize_8852c()
2359 		rtw89_phy_read32_mask(rtwdev, dpk_par_regs[kidx][dpk->cur_k_set] + (path << 8),  in _dpk_gain_normalize_8852c()
2363 static u8 _dpk_order_convert(struct rtw89_dev *rtwdev)  in _dpk_order_convert()  argument
2365 	u32 val32 = rtw89_phy_read32_mask(rtwdev, R_LDL_NORM, B_LDL_NORM_OP);  in _dpk_order_convert()
2386 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] convert MDPD order to 0x%x\n", val);  in _dpk_order_convert()
2391 static void _dpk_on(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,  in _dpk_on()  argument
2394 	struct rtw89_dpk_info *dpk = &rtwdev->dpk;  in _dpk_on()
2396 	rtw89_phy_write32_mask(rtwdev, R_LOAD_COEF + (path << 8), B_LOAD_COEF_MDPD, 0x1);  in _dpk_on()
2397 	rtw89_phy_write32_mask(rtwdev, R_LOAD_COEF + (path << 8), B_LOAD_COEF_MDPD, 0x0);  in _dpk_on()
2398 	rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2),  in _dpk_on()
2399 			       B_DPD_ORDER, _dpk_order_convert(rtwdev));  in _dpk_on()
2404 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d[%d] path_ok = 0x%x\n",  in _dpk_on()
2407 	rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2),  in _dpk_on()
2410 	_dpk_gain_normalize_8852c(rtwdev, phy, path, kidx, false);  in _dpk_on()
2413 static bool _dpk_main(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,  in _dpk_main()  argument
2416 	struct rtw89_dpk_info *dpk = &rtwdev->dpk;  in _dpk_main()
2421 	rtw89_debug(rtwdev, RTW89_DBG_RFK,  in _dpk_main()
2423 	_dpk_kip_control_rfc(rtwdev, path, false);  in _dpk_main()
2424 	_rf_direct_cntrl(rtwdev, path, false);  in _dpk_main()
2425 	rtw89_write_rf(rtwdev, path, RR_BBDC, RFREG_MASK, 0x03ffd);  in _dpk_main()
2426 	_dpk_rf_setting(rtwdev, gain, path, kidx);  in _dpk_main()
2427 	_set_rx_dck(rtwdev, phy, path, false);  in _dpk_main()
2428 	_dpk_kip_pwr_clk_onoff(rtwdev, true);  in _dpk_main()
2429 	_dpk_kip_preset_8852c(rtwdev, phy, path, kidx);  in _dpk_main()
2430 	_dpk_txpwr_bb_force(rtwdev, path, true);  in _dpk_main()
2431 	_dpk_kip_set_txagc(rtwdev, phy, path, init_xdbm, true);  in _dpk_main()
2432 	_dpk_tpg_sel(rtwdev, path, kidx);  in _dpk_main()
2434 	is_fail = _dpk_agc(rtwdev, phy, path, kidx, init_xdbm, false);  in _dpk_main()
2438 	_dpk_idl_mpa(rtwdev, phy, path, kidx);  in _dpk_main()
2439 	_dpk_para_query(rtwdev, path, kidx);  in _dpk_main()
2440 	_dpk_on(rtwdev, phy, path, kidx);  in _dpk_main()
2443 	_dpk_kip_control_rfc(rtwdev, path, false);  in _dpk_main()
2444 	rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RF_RX);  in _dpk_main()
2445 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d[%d]_K%d %s\n", path, kidx,  in _dpk_main()
2451 static void _dpk_init(struct rtw89_dev *rtwdev, u8 path)  in _dpk_init()  argument
2453 	struct rtw89_dpk_info *dpk = &rtwdev->dpk;  in _dpk_init()
2459 static void _dpk_drf_direct_cntrl(struct rtw89_dev *rtwdev, u8 path, bool is_bybb)  in _dpk_drf_direct_cntrl()  argument
2462 		rtw89_write_rf(rtwdev,  path, RR_BBDC, RR_BBDC_SEL, 0x1);  in _dpk_drf_direct_cntrl()
2464 		rtw89_write_rf(rtwdev,  path, RR_BBDC, RR_BBDC_SEL, 0x0);  in _dpk_drf_direct_cntrl()
2467 static void _dpk_cal_select(struct rtw89_dev *rtwdev, bool force,  in _dpk_cal_select()  argument
2470 	struct rtw89_dpk_info *dpk = &rtwdev->dpk;  in _dpk_cal_select()
2482 			reloaded[path] = _dpk_reload_check(rtwdev, phy, path);  in _dpk_cal_select()
2486 				_dpk_onoff(rtwdev, path, false);  in _dpk_cal_select()
2494 		rtw89_debug(rtwdev, RTW89_DBG_RFK,  in _dpk_cal_select()
2497 		_dpk_bkup_kip(rtwdev, kip_reg, kip_bkup, path);  in _dpk_cal_select()
2498 		_rfk_backup_rf_reg(rtwdev, backup_rf_val[path], path);  in _dpk_cal_select()
2499 		_dpk_information(rtwdev, phy, path);  in _dpk_cal_select()
2500 		_dpk_init(rtwdev, path);  in _dpk_cal_select()
2501 		if (rtwdev->is_tssi_mode[path])  in _dpk_cal_select()
2502 			_dpk_tssi_pause(rtwdev, path, true);  in _dpk_cal_select()
2506 		rtw89_debug(rtwdev, RTW89_DBG_RFK,  in _dpk_cal_select()
2509 		rtw8852c_disable_rxagc(rtwdev, path, 0x0);  in _dpk_cal_select()
2510 		_dpk_drf_direct_cntrl(rtwdev, path, false);  in _dpk_cal_select()
2511 		_dpk_bb_afe_setting(rtwdev, phy, path, kpath);  in _dpk_cal_select()
2512 		is_fail = _dpk_main(rtwdev, phy, path, 1);  in _dpk_cal_select()
2513 		_dpk_onoff(rtwdev, path, is_fail);  in _dpk_cal_select()
2517 		rtw89_debug(rtwdev, RTW89_DBG_RFK,  in _dpk_cal_select()
2520 		_dpk_kip_restore(rtwdev, phy, path);  in _dpk_cal_select()
2521 		_dpk_reload_kip(rtwdev, kip_reg, kip_bkup, path);  in _dpk_cal_select()
2522 		_rfk_restore_rf_reg(rtwdev, backup_rf_val[path], path);  in _dpk_cal_select()
2523 		_dpk_bb_afe_restore(rtwdev, path);  in _dpk_cal_select()
2524 		rtw8852c_disable_rxagc(rtwdev, path, 0x1);  in _dpk_cal_select()
2525 		if (rtwdev->is_tssi_mode[path])  in _dpk_cal_select()
2526 			_dpk_tssi_pause(rtwdev, path, false);  in _dpk_cal_select()
2529 	_dpk_kip_pwr_clk_onoff(rtwdev, false);  in _dpk_cal_select()
2532 static bool _dpk_bypass_check(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy)  in _dpk_bypass_check()  argument
2534 	struct rtw89_fem_info *fem = &rtwdev->fem;  in _dpk_bypass_check()
2535 	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);  in _dpk_bypass_check()
2538 	if (rtwdev->hal.cv == CHIP_CAV && band != RTW89_BAND_2G) {  in _dpk_bypass_check()
2539 		rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] Skip DPK due to CAV & not 2G!!\n");  in _dpk_bypass_check()
2542 		rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] Skip DPK due to 2G_ext_PA exist!!\n");  in _dpk_bypass_check()
2545 		rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] Skip DPK due to 5G_ext_PA exist!!\n");  in _dpk_bypass_check()
2548 		rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] Skip DPK due to 6G_ext_PA exist!!\n");  in _dpk_bypass_check()
2555 static void _dpk_force_bypass(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy)  in _dpk_force_bypass()  argument
2559 	kpath = _kpath(rtwdev, phy);  in _dpk_force_bypass()
2563 			_dpk_onoff(rtwdev, path, true);  in _dpk_force_bypass()
2567 static void _dpk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, bool force)  in _dpk()  argument
2569 	rtw89_debug(rtwdev, RTW89_DBG_RFK,  in _dpk()
2571 		    RTW8852C_DPK_VER, rtwdev->hal.cv,  in _dpk()
2574 	if (_dpk_bypass_check(rtwdev, phy))  in _dpk()
2575 		_dpk_force_bypass(rtwdev, phy);  in _dpk()
2577 		_dpk_cal_select(rtwdev, force, phy, _kpath(rtwdev, phy));  in _dpk()
2579 	if (rtw89_read_rf(rtwdev, RF_PATH_A, RR_DCKC, RR_DCKC_CHK) == 0x1)  in _dpk()
2580 		rtw8852c_rx_dck(rtwdev, phy, false);  in _dpk()
2583 static void _dpk_onoff(struct rtw89_dev *rtwdev,  in _dpk_onoff()  argument
2586 	struct rtw89_dpk_info *dpk = &rtwdev->dpk;  in _dpk_onoff()
2592 	rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2),  in _dpk_onoff()
2595 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d[%d] DPK %s !!!\n", path,  in _dpk_onoff()
2599 static void _dpk_track(struct rtw89_dev *rtwdev)  in _dpk_track()  argument
2601 	struct rtw89_dpk_info *dpk = &rtwdev->dpk;  in _dpk_track()
2611 		rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK,  in _dpk_track()
2616 			rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB + (path << 13), 0x0000003f);  in _dpk_track()
2618 			rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB + (path << 13), MASKBYTE2);  in _dpk_track()
2620 			rtw89_phy_read32_mask(rtwdev, R_TXAGC_BTP + (path << 13), B_TXAGC_BTP);  in _dpk_track()
2623 		rtw89_phy_write32_mask(rtwdev, R_KIP_RPT + (path << 8), B_KIP_RPT_SEL, 0xf);  in _dpk_track()
2625 			rtw89_phy_read32_mask(rtwdev, R_RPT_PER + (path << 8), B_RPT_PER_TH);  in _dpk_track()
2627 			rtw89_phy_read32_mask(rtwdev, R_RPT_PER + (path << 8), B_RPT_PER_OF);  in _dpk_track()
2629 			rtw89_phy_read32_mask(rtwdev, R_RPT_PER + (path << 8), B_RPT_PER_TSSI);  in _dpk_track()
2632 		cur_ther = ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]);  in _dpk_track()
2634 		rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK,  in _dpk_track()
2642 		rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK,  in _dpk_track()
2645 		rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK,  in _dpk_track()
2649 		rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK,  in _dpk_track()
2652 		rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK,  in _dpk_track()
2656 		if (rtw89_phy_read32_mask(rtwdev, R_DPK_WR, B_DPK_WR_ST) == 0x0 &&  in _dpk_track()
2657 		    txagc_rf != 0 && rtwdev->hal.cv == CHIP_CAV) {  in _dpk_track()
2658 			rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK,  in _dpk_track()
2661 			rtw89_phy_write32_mask(rtwdev, R_DPD_BND + (path << 8) + (kidx << 2),  in _dpk_track()
2667 static void _tssi_set_sys(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,  in _tssi_set_sys()  argument
2670 	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);  in _tssi_set_sys()
2673 	rtw89_rfk_parser(rtwdev, &rtw8852c_tssi_sys_defs_tbl);  in _tssi_set_sys()
2676 		rtw89_rfk_parser_by_cond(rtwdev, band == RTW89_BAND_2G,  in _tssi_set_sys()
2680 		rtw89_rfk_parser_by_cond(rtwdev, band == RTW89_BAND_2G,  in _tssi_set_sys()
2685 static void _tssi_ini_txpwr_ctrl_bb(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,  in _tssi_ini_txpwr_ctrl_bb()  argument
2688 	rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A,  in _tssi_ini_txpwr_ctrl_bb()
2693 static void _tssi_ini_txpwr_ctrl_bb_he_tb(struct rtw89_dev *rtwdev,  in _tssi_ini_txpwr_ctrl_bb_he_tb()  argument
2697 	rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A,  in _tssi_ini_txpwr_ctrl_bb_he_tb()
2702 static void _tssi_set_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,  in _tssi_set_dck()  argument
2705 	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);  in _tssi_set_dck()
2709 		rtw89_rfk_parser(rtwdev, &rtw8852c_tssi_dck_defs_a_tbl);  in _tssi_set_dck()
2710 		rtw89_rfk_parser_by_cond(rtwdev, band == RTW89_BAND_2G,  in _tssi_set_dck()
2714 		rtw89_rfk_parser(rtwdev, &rtw8852c_tssi_dck_defs_b_tbl);  in _tssi_set_dck()
2715 		rtw89_rfk_parser_by_cond(rtwdev, band == RTW89_BAND_2G,  in _tssi_set_dck()
2721 static void _tssi_set_bbgain_split(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,  in _tssi_set_bbgain_split()  argument
2724 	rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A,  in _tssi_set_bbgain_split()
2729 static void _tssi_set_tmeter_tbl(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,  in _tssi_set_tmeter_tbl()  argument
2743 	struct rtw89_tssi_info *tssi_info = &rtwdev->tssi;  in _tssi_set_tmeter_tbl()
2744 	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);  in _tssi_set_tmeter_tbl()
2815 		rtw89_debug(rtwdev, RTW89_DBG_TSSI,  in _tssi_set_tmeter_tbl()
2818 		rtw89_phy_write32_mask(rtwdev, R_P0_TMETER, B_P0_TMETER_DIS, 0x0);  in _tssi_set_tmeter_tbl()
2819 		rtw89_phy_write32_mask(rtwdev, R_P0_TMETER, B_P0_TMETER_TRK, 0x1);  in _tssi_set_tmeter_tbl()
2822 			rtw89_phy_write32_mask(rtwdev, R_P0_TMETER, B_P0_TMETER, 32);  in _tssi_set_tmeter_tbl()
2823 			rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_VAL, 32);  in _tssi_set_tmeter_tbl()
2826 				rtw89_phy_write32(rtwdev, R_P0_TSSI_BASE + i, 0x0);  in _tssi_set_tmeter_tbl()
2828 				rtw89_debug(rtwdev, RTW89_DBG_TSSI,  in _tssi_set_tmeter_tbl()
2834 			rtw89_phy_write32_mask(rtwdev, R_P0_TMETER, B_P0_TMETER, thermal);  in _tssi_set_tmeter_tbl()
2835 			rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_VAL,  in _tssi_set_tmeter_tbl()
2852 				rtw89_phy_write32(rtwdev, R_P0_TSSI_BASE + i, tmp);  in _tssi_set_tmeter_tbl()
2854 				rtw89_debug(rtwdev, RTW89_DBG_TSSI,  in _tssi_set_tmeter_tbl()
2859 		rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, R_P0_RFCTM_RDY, 0x1);  in _tssi_set_tmeter_tbl()
2860 		rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, R_P0_RFCTM_RDY, 0x0);  in _tssi_set_tmeter_tbl()
2865 		rtw89_debug(rtwdev, RTW89_DBG_TSSI,  in _tssi_set_tmeter_tbl()
2868 		rtw89_phy_write32_mask(rtwdev, R_P1_TMETER, B_P1_TMETER_DIS, 0x0);  in _tssi_set_tmeter_tbl()
2869 		rtw89_phy_write32_mask(rtwdev, R_P1_TMETER, B_P1_TMETER_TRK, 0x1);  in _tssi_set_tmeter_tbl()
2872 			rtw89_phy_write32_mask(rtwdev, R_P1_TMETER, B_P1_TMETER, 32);  in _tssi_set_tmeter_tbl()
2873 			rtw89_phy_write32_mask(rtwdev, R_P1_RFCTM, B_P1_RFCTM_VAL, 32);  in _tssi_set_tmeter_tbl()
2876 				rtw89_phy_write32(rtwdev, R_TSSI_THOF + i, 0x0);  in _tssi_set_tmeter_tbl()
2878 				rtw89_debug(rtwdev, RTW89_DBG_TSSI,  in _tssi_set_tmeter_tbl()
2884 			rtw89_phy_write32_mask(rtwdev, R_P1_TMETER, B_P1_TMETER, thermal);  in _tssi_set_tmeter_tbl()
2885 			rtw89_phy_write32_mask(rtwdev, R_P1_RFCTM, B_P1_RFCTM_VAL,  in _tssi_set_tmeter_tbl()
2902 				rtw89_phy_write32(rtwdev, R_TSSI_THOF + i, tmp);  in _tssi_set_tmeter_tbl()
2904 				rtw89_debug(rtwdev, RTW89_DBG_TSSI,  in _tssi_set_tmeter_tbl()
2909 		rtw89_phy_write32_mask(rtwdev, R_P1_RFCTM, R_P1_RFCTM_RDY, 0x1);  in _tssi_set_tmeter_tbl()
2910 		rtw89_phy_write32_mask(rtwdev, R_P1_RFCTM, R_P1_RFCTM_RDY, 0x0);  in _tssi_set_tmeter_tbl()
2915 static void _tssi_slope_cal_org(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,  in _tssi_slope_cal_org()  argument
2918 	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);  in _tssi_slope_cal_org()
2922 		rtw89_rfk_parser_by_cond(rtwdev, band == RTW89_BAND_2G,  in _tssi_slope_cal_org()
2926 		rtw89_rfk_parser_by_cond(rtwdev, band == RTW89_BAND_2G,  in _tssi_slope_cal_org()
2932 static void _tssi_set_aligk_default(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,  in _tssi_set_aligk_default()  argument
2935 	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);  in _tssi_set_aligk_default()
2955 	rtw89_rfk_parser(rtwdev, tbl);  in _tssi_set_aligk_default()
2958 static void _tssi_set_slope(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,  in _tssi_set_slope()  argument
2961 	rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A,  in _tssi_set_slope()
2966 static void _tssi_run_slope(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,  in _tssi_run_slope()  argument
2969 	rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A,  in _tssi_run_slope()
2974 static void _tssi_set_track(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,  in _tssi_set_track()  argument
2977 	rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A,  in _tssi_set_track()
2982 static void _tssi_set_txagc_offset_mv_avg(struct rtw89_dev *rtwdev,  in _tssi_set_txagc_offset_mv_avg()  argument
2986 	rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A,  in _tssi_set_txagc_offset_mv_avg()
2991 static void _tssi_enable(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy)  in _tssi_enable()  argument
2993 	struct rtw89_tssi_info *tssi_info = &rtwdev->tssi;  in _tssi_enable()
2996 	if (rtwdev->dbcc_en) {  in _tssi_enable()
3007 		_tssi_set_track(rtwdev, phy, i);  in _tssi_enable()
3008 		_tssi_set_txagc_offset_mv_avg(rtwdev, phy, i);  in _tssi_enable()
3010 		rtw89_rfk_parser_by_cond(rtwdev, i == RF_PATH_A,  in _tssi_enable()
3015 			ewma_thermal_read(&rtwdev->phystat.avg_thermal[i]);  in _tssi_enable()
3016 		rtwdev->is_tssi_mode[i] = true;  in _tssi_enable()
3020 static void _tssi_disable(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy)  in _tssi_disable()  argument
3024 	if (rtwdev->dbcc_en) {  in _tssi_disable()
3036 			rtw89_rfk_parser(rtwdev, &rtw8852c_tssi_disable_defs_a_tbl);  in _tssi_disable()
3037 			rtwdev->is_tssi_mode[RF_PATH_A] = false;  in _tssi_disable()
3039 			rtw89_rfk_parser(rtwdev, &rtw8852c_tssi_disable_defs_b_tbl);  in _tssi_disable()
3040 			rtwdev->is_tssi_mode[RF_PATH_B] = false;  in _tssi_disable()
3045 static u32 _tssi_get_cck_group(struct rtw89_dev *rtwdev, u8 ch)  in _tssi_get_cck_group()  argument
3071 static u32 _tssi_get_ofdm_group(struct rtw89_dev *rtwdev, u8 ch)  in _tssi_get_ofdm_group()  argument
3139 static u32 _tssi_get_6g_ofdm_group(struct rtw89_dev *rtwdev, u8 ch)  in _tssi_get_6g_ofdm_group()  argument
3259 static u32 _tssi_get_trim_group(struct rtw89_dev *rtwdev, u8 ch)  in _tssi_get_trim_group()  argument
3287 static u32 _tssi_get_6g_trim_group(struct rtw89_dev *rtwdev, u8 ch)  in _tssi_get_6g_trim_group()  argument
3343 static s8 _tssi_get_ofdm_de(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,  in _tssi_get_ofdm_de()  argument
3346 	struct rtw89_tssi_info *tssi_info = &rtwdev->tssi;  in _tssi_get_ofdm_de()
3347 	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);  in _tssi_get_ofdm_de()
3356 		gidx = _tssi_get_ofdm_group(rtwdev, ch);  in _tssi_get_ofdm_de()
3358 		rtw89_debug(rtwdev, RTW89_DBG_TSSI,  in _tssi_get_ofdm_de()
3369 			rtw89_debug(rtwdev, RTW89_DBG_TSSI,  in _tssi_get_ofdm_de()
3375 			rtw89_debug(rtwdev, RTW89_DBG_TSSI,  in _tssi_get_ofdm_de()
3379 		gidx = _tssi_get_6g_ofdm_group(rtwdev, ch);  in _tssi_get_ofdm_de()
3381 		rtw89_debug(rtwdev, RTW89_DBG_TSSI,  in _tssi_get_ofdm_de()
3392 			rtw89_debug(rtwdev, RTW89_DBG_TSSI,  in _tssi_get_ofdm_de()
3398 			rtw89_debug(rtwdev, RTW89_DBG_TSSI,  in _tssi_get_ofdm_de()
3406 static s8 _tssi_get_ofdm_trim_de(struct rtw89_dev *rtwdev,  in _tssi_get_ofdm_trim_de()  argument
3410 	struct rtw89_tssi_info *tssi_info = &rtwdev->tssi;  in _tssi_get_ofdm_trim_de()
3411 	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);  in _tssi_get_ofdm_trim_de()
3420 		tgidx = _tssi_get_trim_group(rtwdev, ch);  in _tssi_get_ofdm_trim_de()
3422 		rtw89_debug(rtwdev, RTW89_DBG_TSSI,  in _tssi_get_ofdm_trim_de()
3433 			rtw89_debug(rtwdev, RTW89_DBG_TSSI,  in _tssi_get_ofdm_trim_de()
3439 			rtw89_debug(rtwdev, RTW89_DBG_TSSI,  in _tssi_get_ofdm_trim_de()
3444 		tgidx = _tssi_get_6g_trim_group(rtwdev, ch);  in _tssi_get_ofdm_trim_de()
3446 		rtw89_debug(rtwdev, RTW89_DBG_TSSI,  in _tssi_get_ofdm_trim_de()
3457 			rtw89_debug(rtwdev, RTW89_DBG_TSSI,  in _tssi_get_ofdm_trim_de()
3463 			rtw89_debug(rtwdev, RTW89_DBG_TSSI,  in _tssi_get_ofdm_trim_de()
3472 static void _tssi_set_efuse_to_de(struct rtw89_dev *rtwdev,  in _tssi_set_efuse_to_de()  argument
3475 	struct rtw89_tssi_info *tssi_info = &rtwdev->tssi;  in _tssi_set_efuse_to_de()
3476 	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);  in _tssi_set_efuse_to_de()
3484 	rtw89_debug(rtwdev, RTW89_DBG_TSSI, "[TSSI][TRIM]: phy=%d ch=%d\n",  in _tssi_set_efuse_to_de()
3487 	if (rtwdev->dbcc_en) {  in _tssi_set_efuse_to_de()
3498 		gidx = _tssi_get_cck_group(rtwdev, ch);  in _tssi_set_efuse_to_de()
3499 		trim_de = _tssi_get_ofdm_trim_de(rtwdev, phy, i);  in _tssi_set_efuse_to_de()
3502 		rtw89_debug(rtwdev, RTW89_DBG_TSSI,  in _tssi_set_efuse_to_de()
3506 		rtw89_phy_write32_mask(rtwdev, _tssi_de_cck_long[i], _TSSI_DE_MASK, val);  in _tssi_set_efuse_to_de()
3507 		rtw89_phy_write32_mask(rtwdev, _tssi_de_cck_short[i], _TSSI_DE_MASK, val);  in _tssi_set_efuse_to_de()
3509 		rtw89_debug(rtwdev, RTW89_DBG_TSSI,  in _tssi_set_efuse_to_de()
3512 			    rtw89_phy_read32_mask(rtwdev, _tssi_de_cck_long[i],  in _tssi_set_efuse_to_de()
3515 		ofdm_de = _tssi_get_ofdm_de(rtwdev, phy, i);  in _tssi_set_efuse_to_de()
3516 		trim_de = _tssi_get_ofdm_trim_de(rtwdev, phy, i);  in _tssi_set_efuse_to_de()
3519 		rtw89_debug(rtwdev, RTW89_DBG_TSSI,  in _tssi_set_efuse_to_de()
3523 		rtw89_phy_write32_mask(rtwdev, _tssi_de_mcs_20m[i], _TSSI_DE_MASK, val);  in _tssi_set_efuse_to_de()
3524 		rtw89_phy_write32_mask(rtwdev, _tssi_de_mcs_40m[i], _TSSI_DE_MASK, val);  in _tssi_set_efuse_to_de()
3525 		rtw89_phy_write32_mask(rtwdev, _tssi_de_mcs_80m[i], _TSSI_DE_MASK, val);  in _tssi_set_efuse_to_de()
3526 		rtw89_phy_write32_mask(rtwdev, _tssi_de_mcs_80m_80m[i], _TSSI_DE_MASK, val);  in _tssi_set_efuse_to_de()
3527 		rtw89_phy_write32_mask(rtwdev, _tssi_de_mcs_5m[i], _TSSI_DE_MASK, val);  in _tssi_set_efuse_to_de()
3528 		rtw89_phy_write32_mask(rtwdev, _tssi_de_mcs_10m[i], _TSSI_DE_MASK, val);  in _tssi_set_efuse_to_de()
3530 		rtw89_debug(rtwdev, RTW89_DBG_TSSI,  in _tssi_set_efuse_to_de()
3533 			    rtw89_phy_read32_mask(rtwdev, _tssi_de_mcs_20m[i],  in _tssi_set_efuse_to_de()
3538 static void rtw8852c_tssi_cont_en(struct rtw89_dev *rtwdev, bool en,  in rtw8852c_tssi_cont_en()  argument
3545 		rtw89_phy_write32_mask(rtwdev, tssi_trk[path], BIT(30), 0x0);  in rtw8852c_tssi_cont_en()
3546 		rtw89_phy_write32_mask(rtwdev, tssi_en[path], BIT(31), 0x0);  in rtw8852c_tssi_cont_en()
3547 		if (rtwdev->dbcc_en && path == RF_PATH_B)  in rtw8852c_tssi_cont_en()
3548 			_tssi_set_efuse_to_de(rtwdev, RTW89_PHY_1);  in rtw8852c_tssi_cont_en()
3550 			_tssi_set_efuse_to_de(rtwdev, RTW89_PHY_0);  in rtw8852c_tssi_cont_en()
3552 		rtw89_phy_write32_mask(rtwdev, tssi_trk[path], BIT(30), 0x1);  in rtw8852c_tssi_cont_en()
3553 		rtw89_phy_write32_mask(rtwdev, tssi_en[path], BIT(31), 0x1);  in rtw8852c_tssi_cont_en()
3557 void rtw8852c_tssi_cont_en_phyidx(struct rtw89_dev *rtwdev, bool en, u8 phy_idx)  in rtw8852c_tssi_cont_en_phyidx()  argument
3559 	if (!rtwdev->dbcc_en) {  in rtw8852c_tssi_cont_en_phyidx()
3560 		rtw8852c_tssi_cont_en(rtwdev, en, RF_PATH_A);  in rtw8852c_tssi_cont_en_phyidx()
3561 		rtw8852c_tssi_cont_en(rtwdev, en, RF_PATH_B);  in rtw8852c_tssi_cont_en_phyidx()
3564 			rtw8852c_tssi_cont_en(rtwdev, en, RF_PATH_A);  in rtw8852c_tssi_cont_en_phyidx()
3566 			rtw8852c_tssi_cont_en(rtwdev, en, RF_PATH_B);  in rtw8852c_tssi_cont_en_phyidx()
3570 static void _bw_setting(struct rtw89_dev *rtwdev, enum rtw89_rf_path path,  in _bw_setting()  argument
3576 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RFK]===>%s\n", __func__);  in _bw_setting()
3582 	rf_reg18 = rtw89_read_rf(rtwdev, path, reg_reg18_addr, RFREG_MASK);  in _bw_setting()
3590 		rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 | (path << 8), B_P0_CFCH_BW0, 0x3);  in _bw_setting()
3591 		rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1 | (path << 8), B_P0_CFCH_BW1, 0xf);  in _bw_setting()
3595 		rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 | (path << 8), B_P0_CFCH_BW0, 0x3);  in _bw_setting()
3596 		rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1 | (path << 8), B_P0_CFCH_BW1, 0xf);  in _bw_setting()
3600 		rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 | (path << 8), B_P0_CFCH_BW0, 0x2);  in _bw_setting()
3601 		rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1 | (path << 8), B_P0_CFCH_BW1, 0xd);  in _bw_setting()
3605 		rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 | (path << 8), B_P0_CFCH_BW0, 0x1);  in _bw_setting()
3606 		rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1 | (path << 8), B_P0_CFCH_BW1, 0xb);  in _bw_setting()
3612 	rtw89_write_rf(rtwdev, path, reg_reg18_addr, RFREG_MASK, rf_reg18);  in _bw_setting()
3615 static void _ctrl_bw(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,  in _ctrl_bw()  argument
3622 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RFK]===>%s\n", __func__);  in _ctrl_bw()
3623 	kpath = _kpath(rtwdev, phy);  in _ctrl_bw()
3630 		_bw_setting(rtwdev, path, bw, is_dav);  in _ctrl_bw()
3632 		_bw_setting(rtwdev, path, bw, is_dav);  in _ctrl_bw()
3633 		if (rtwdev->dbcc_en)  in _ctrl_bw()
3636 		if (path == RF_PATH_B && rtwdev->hal.cv == CHIP_CAV) {  in _ctrl_bw()
3637 			rtw89_write_rf(rtwdev, RF_PATH_B, RR_RSV1, RR_RSV1_RST, 0x0);  in _ctrl_bw()
3638 			tmp = rtw89_read_rf(rtwdev, RF_PATH_A, RR_CFGCH, RFREG_MASK);  in _ctrl_bw()
3639 			rtw89_write_rf(rtwdev, RF_PATH_B, RR_APK, RR_APK_MOD, 0x3);  in _ctrl_bw()
3640 			rtw89_write_rf(rtwdev, RF_PATH_B, RR_CFGCH, RFREG_MASK, tmp);  in _ctrl_bw()
3642 			rtw89_write_rf(rtwdev, RF_PATH_B, RR_RSV1, RR_RSV1_RST, 0x1);  in _ctrl_bw()
3647 static void _ch_setting(struct rtw89_dev *rtwdev, enum rtw89_rf_path path,  in _ch_setting()  argument
3653 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RFK]===>%s\n", __func__);  in _ch_setting()
3659 	rf_reg18 = rtw89_read_rf(rtwdev, path, reg_reg18_addr, RFREG_MASK);  in _ch_setting()
3679 	rtw89_write_rf(rtwdev, path, reg_reg18_addr, RFREG_MASK, rf_reg18);  in _ch_setting()
3683 static void _ctrl_ch(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,  in _ctrl_ch()  argument
3688 	rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RFK]===>%s\n", __func__);  in _ctrl_ch()
3699 	kpath = _kpath(rtwdev, phy);  in _ctrl_ch()
3703 			_ch_setting(rtwdev, path, central_ch, band, true);  in _ctrl_ch()
3704 			_ch_setting(rtwdev, path, central_ch, band, false);  in _ctrl_ch()
3709 static void _rxbb_bw(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,  in _rxbb_bw()  argument
3716 	kpath = _kpath(rtwdev, phy);  in _rxbb_bw()
3721 		rtw89_write_rf(rtwdev, path, RR_LUTWE2, RR_LUTWE2_RTXBW, 0x1);  in _rxbb_bw()
3722 		rtw89_write_rf(rtwdev, path, RR_LUTWA, RR_LUTWA_M2, 0xa);  in _rxbb_bw()
3738 		rtw89_write_rf(rtwdev, path, RR_LUTWD0, RR_LUTWD0_LB, val);  in _rxbb_bw()
3739 		rtw89_write_rf(rtwdev, path, RR_LUTWE2, RR_LUTWE2_RTXBW, 0x0);  in _rxbb_bw()
3743 static void _lck_keep_thermal(struct rtw89_dev *rtwdev)  in _lck_keep_thermal()  argument
3745 	struct rtw89_lck_info *lck = &rtwdev->lck;  in _lck_keep_thermal()
3748 	for (path = 0; path < rtwdev->chip->rf_path_num; path++) {  in _lck_keep_thermal()
3750 			ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]);  in _lck_keep_thermal()
3751 		rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK,  in _lck_keep_thermal()
3756 static void _lck(struct rtw89_dev *rtwdev)  in _lck()  argument
3759 	int path = rtwdev->dbcc_en ? 2 : 1;  in _lck()
3762 	rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK, "[LCK] DO LCK\n");  in _lck()
3764 	tmp18[0] = rtw89_read_rf(rtwdev, RF_PATH_A, RR_CFGCH, RFREG_MASK);  in _lck()
3765 	tmp18[1] = rtw89_read_rf(rtwdev, RF_PATH_B, RR_CFGCH, RFREG_MASK);  in _lck()
3768 		rtw89_write_rf(rtwdev, i, RR_LCK_TRG, RR_LCK_TRGSEL, 0x1);  in _lck()
3769 		rtw89_write_rf(rtwdev, i, RR_CFGCH, RFREG_MASK, tmp18[i]);  in _lck()
3770 		rtw89_write_rf(rtwdev, i, RR_LCK_TRG, RR_LCK_TRGSEL, 0x0);  in _lck()
3773 	_lck_keep_thermal(rtwdev);  in _lck()
3778 void rtw8852c_lck_track(struct rtw89_dev *rtwdev)  in rtw8852c_lck_track()  argument
3780 	struct rtw89_lck_info *lck = &rtwdev->lck;  in rtw8852c_lck_track()
3785 	for (path = 0; path < rtwdev->chip->rf_path_num; path++) {  in rtw8852c_lck_track()
3787 			ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]);  in rtw8852c_lck_track()
3790 		rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK,  in rtw8852c_lck_track()
3795 			_lck(rtwdev);  in rtw8852c_lck_track()
3801 void rtw8852c_lck_init(struct rtw89_dev *rtwdev)  in rtw8852c_lck_init()  argument
3803 	_lck_keep_thermal(rtwdev);  in rtw8852c_lck_init()
3807 void rtw8852c_ctrl_bw_ch(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,  in rtw8852c_ctrl_bw_ch()  argument
3811 	_ctrl_ch(rtwdev, phy, central_ch, band);  in rtw8852c_ctrl_bw_ch()
3812 	_ctrl_bw(rtwdev, phy, bw);  in rtw8852c_ctrl_bw_ch()
3813 	_rxbb_bw(rtwdev, phy, bw);  in rtw8852c_ctrl_bw_ch()
3816 void rtw8852c_set_channel_rf(struct rtw89_dev *rtwdev,  in rtw8852c_set_channel_rf()  argument
3820 	rtw8852c_ctrl_bw_ch(rtwdev, phy_idx, chan->channel,  in rtw8852c_set_channel_rf()
3825 void rtw8852c_mcc_get_ch_info(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx)  in rtw8852c_mcc_get_ch_info()  argument
3827 	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);  in rtw8852c_mcc_get_ch_info()
3828 	struct rtw89_mcc_info *mcc_info = &rtwdev->mcc;  in rtw8852c_mcc_get_ch_info()
3844 void rtw8852c_rck(struct rtw89_dev *rtwdev)  in rtw8852c_rck()  argument
3849 		_rck(rtwdev, path);  in rtw8852c_rck()
3852 void rtw8852c_dack(struct rtw89_dev *rtwdev)  in rtw8852c_dack()  argument
3854 	u8 phy_map = rtw89_btc_phymap(rtwdev, RTW89_PHY_0, 0);  in rtw8852c_dack()
3856 	rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DACK, BTC_WRFK_START);  in rtw8852c_dack()
3857 	_dac_cal(rtwdev, false);  in rtw8852c_dack()
3858 	rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DACK, BTC_WRFK_STOP);  in rtw8852c_dack()
3861 void rtw8852c_iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx)  in rtw8852c_iqk()  argument
3864 	u8 phy_map = rtw89_btc_phymap(rtwdev, phy_idx, 0);  in rtw8852c_iqk()
3866 	rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_START);  in rtw8852c_iqk()
3867 	rtw89_chip_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL);  in rtw8852c_iqk()
3868 	_wait_rx_mode(rtwdev, _kpath(rtwdev, phy_idx));  in rtw8852c_iqk()
3870 	_iqk_init(rtwdev);  in rtw8852c_iqk()
3871 	_iqk(rtwdev, phy_idx, false);  in rtw8852c_iqk()
3873 	rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en);  in rtw8852c_iqk()
3874 	rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_STOP);  in rtw8852c_iqk()
3879 void rtw8852c_rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, bool is_afe)  in rtw8852c_rx_dck()  argument
3881 	struct rtw89_rx_dck_info *rx_dck = &rtwdev->rx_dck;  in rtw8852c_rx_dck()
3885 	kpath = _kpath(rtwdev, phy);  in rtw8852c_rx_dck()
3886 	rtw89_debug(rtwdev, RTW89_DBG_RFK,  in rtw8852c_rx_dck()
3888 		    RXDCK_VER_8852C, rtwdev->hal.cv);  in rtw8852c_rx_dck()
3891 		rf_reg5 = rtw89_read_rf(rtwdev, path, RR_RSV1, RFREG_MASK);  in rtw8852c_rx_dck()
3895 		if (rtwdev->is_tssi_mode[path])  in rtw8852c_rx_dck()
3896 			rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK + (path << 13),  in rtw8852c_rx_dck()
3898 		rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0);  in rtw8852c_rx_dck()
3899 		rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RR_MOD_V_RX);  in rtw8852c_rx_dck()
3900 		_set_rx_dck(rtwdev, phy, path, is_afe);  in rtw8852c_rx_dck()
3901 		rx_dck->thermal[path] = ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]);  in rtw8852c_rx_dck()
3902 		rtw89_write_rf(rtwdev, path, RR_RSV1, RFREG_MASK, rf_reg5);  in rtw8852c_rx_dck()
3904 		if (rtwdev->is_tssi_mode[path])  in rtw8852c_rx_dck()
3905 			rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK + (path << 13),  in rtw8852c_rx_dck()
3912 void rtw8852c_rx_dck_track(struct rtw89_dev *rtwdev)  in rtw8852c_rx_dck_track()  argument
3914 	struct rtw89_rx_dck_info *rx_dck = &rtwdev->rx_dck;  in rtw8852c_rx_dck_track()
3921 			ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]);  in rtw8852c_rx_dck_track()
3924 		rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK,  in rtw8852c_rx_dck_track()
3929 			rtw8852c_rx_dck(rtwdev, RTW89_PHY_0, false);  in rtw8852c_rx_dck_track()
3935 void rtw8852c_dpk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx)  in rtw8852c_dpk()  argument
3938 	u8 phy_map = rtw89_btc_phymap(rtwdev, phy_idx, 0);  in rtw8852c_dpk()
3940 	rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DPK, BTC_WRFK_START);  in rtw8852c_dpk()
3941 	rtw89_chip_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL);  in rtw8852c_dpk()
3942 	_wait_rx_mode(rtwdev, _kpath(rtwdev, phy_idx));  in rtw8852c_dpk()
3944 	rtwdev->dpk.is_dpk_enable = true;  in rtw8852c_dpk()
3945 	rtwdev->dpk.is_dpk_reload_en = false;  in rtw8852c_dpk()
3946 	_dpk(rtwdev, phy_idx, false);  in rtw8852c_dpk()
3948 	rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en);  in rtw8852c_dpk()
3949 	rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DPK, BTC_WRFK_STOP);  in rtw8852c_dpk()
3952 void rtw8852c_dpk_track(struct rtw89_dev *rtwdev)  in rtw8852c_dpk_track()  argument
3954 	_dpk_track(rtwdev);  in rtw8852c_dpk_track()
3957 void rtw8852c_tssi(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy)  in rtw8852c_tssi()  argument
3961 	rtw89_debug(rtwdev, RTW89_DBG_TSSI, "[TSSI] %s: phy=%d\n", __func__, phy);  in rtw8852c_tssi()
3963 	if (rtwdev->dbcc_en) {  in rtw8852c_tssi()
3973 	_tssi_disable(rtwdev, phy);  in rtw8852c_tssi()
3976 		_tssi_set_sys(rtwdev, phy, i);  in rtw8852c_tssi()
3977 		_tssi_ini_txpwr_ctrl_bb(rtwdev, phy, i);  in rtw8852c_tssi()
3978 		_tssi_ini_txpwr_ctrl_bb_he_tb(rtwdev, phy, i);  in rtw8852c_tssi()
3979 		_tssi_set_dck(rtwdev, phy, i);  in rtw8852c_tssi()
3980 		_tssi_set_bbgain_split(rtwdev, phy, i);  in rtw8852c_tssi()
3981 		_tssi_set_tmeter_tbl(rtwdev, phy, i);  in rtw8852c_tssi()
3982 		_tssi_slope_cal_org(rtwdev, phy, i);  in rtw8852c_tssi()
3983 		_tssi_set_aligk_default(rtwdev, phy, i);  in rtw8852c_tssi()
3984 		_tssi_set_slope(rtwdev, phy, i);  in rtw8852c_tssi()
3985 		_tssi_run_slope(rtwdev, phy, i);  in rtw8852c_tssi()
3988 	_tssi_enable(rtwdev, phy);  in rtw8852c_tssi()
3989 	_tssi_set_efuse_to_de(rtwdev, phy);  in rtw8852c_tssi()
3992 void rtw8852c_tssi_scan(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy)  in rtw8852c_tssi_scan()  argument
3996 	rtw89_debug(rtwdev, RTW89_DBG_TSSI, "[TSSI] %s: phy=%d\n",  in rtw8852c_tssi_scan()
3999 	if (!rtwdev->is_tssi_mode[RF_PATH_A])  in rtw8852c_tssi_scan()
4001 	if (!rtwdev->is_tssi_mode[RF_PATH_B])  in rtw8852c_tssi_scan()
4004 	if (rtwdev->dbcc_en) {  in rtw8852c_tssi_scan()
4014 	_tssi_disable(rtwdev, phy);  in rtw8852c_tssi_scan()
4017 		_tssi_set_sys(rtwdev, phy, i);  in rtw8852c_tssi_scan()
4018 		_tssi_set_dck(rtwdev, phy, i);  in rtw8852c_tssi_scan()
4019 		_tssi_set_tmeter_tbl(rtwdev, phy, i);  in rtw8852c_tssi_scan()
4020 		_tssi_slope_cal_org(rtwdev, phy, i);  in rtw8852c_tssi_scan()
4021 		_tssi_set_aligk_default(rtwdev, phy, i);  in rtw8852c_tssi_scan()
4024 	_tssi_enable(rtwdev, phy);  in rtw8852c_tssi_scan()
4025 	_tssi_set_efuse_to_de(rtwdev, phy);  in rtw8852c_tssi_scan()
4028 static void rtw8852c_tssi_default_txagc(struct rtw89_dev *rtwdev,  in rtw8852c_tssi_default_txagc()  argument
4031 	struct rtw89_tssi_info *tssi_info = &rtwdev->tssi;  in rtw8852c_tssi_default_txagc()
4034 	if (!rtwdev->is_tssi_mode[RF_PATH_A] && !rtwdev->is_tssi_mode[RF_PATH_B])  in rtw8852c_tssi_default_txagc()
4039 		if (rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB, B_TXAGC_BB_OFT) != 0xc000 &&  in rtw8852c_tssi_default_txagc()
4040 		    rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB, B_TXAGC_BB_OFT) != 0x0) {  in rtw8852c_tssi_default_txagc()
4043 					rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB,  in rtw8852c_tssi_default_txagc()
4050 		if (rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB_S1, B_TXAGC_BB_S1_OFT) != 0xc000 &&  in rtw8852c_tssi_default_txagc()
4051 		    rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB_S1, B_TXAGC_BB_S1_OFT) != 0x0) {  in rtw8852c_tssi_default_txagc()
4054 					rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB_S1,  in rtw8852c_tssi_default_txagc()
4062 		rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT,  in rtw8852c_tssi_default_txagc()
4064 		rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_TRK, B_P1_TSSI_OFT,  in rtw8852c_tssi_default_txagc()
4067 		rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT_EN, 0x0);  in rtw8852c_tssi_default_txagc()
4068 		rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT_EN, 0x1);  in rtw8852c_tssi_default_txagc()
4070 		rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_TRK, B_P1_TSSI_OFT_EN, 0x0);  in rtw8852c_tssi_default_txagc()
4071 		rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_TRK, B_P1_TSSI_OFT_EN, 0x1);  in rtw8852c_tssi_default_txagc()
4075 void rtw8852c_wifi_scan_notify(struct rtw89_dev *rtwdev,  in rtw8852c_wifi_scan_notify()  argument
4079 		rtw8852c_tssi_default_txagc(rtwdev, phy_idx, true);  in rtw8852c_wifi_scan_notify()
4081 		rtw8852c_tssi_default_txagc(rtwdev, phy_idx, false);  in rtw8852c_wifi_scan_notify()