Lines Matching full:path
136 u8 path; in _wait_rx_mode() local
140 for (path = 0; path < RF_PATH_MAX; path++) { in _wait_rx_mode()
141 if (!(kpath & BIT(path))) in _wait_rx_mode()
145 2, 5000, false, rtwdev, path, 0x00, in _wait_rx_mode()
149 path, ret); in _wait_rx_mode()
287 enum rtw89_rf_path path, u8 index) in _dack_reload_by_path() argument
295 path_offset = (path == RF_PATH_A ? 0 : 0x28); in _dack_reload_by_path()
303 val32 |= dack->msbk_d[path][index][i + 12] << (i * 8); in _dack_reload_by_path()
312 val32 |= dack->msbk_d[path][index][i + 8] << (i * 8); in _dack_reload_by_path()
321 val32 |= dack->msbk_d[path][index][i + 4] << (i * 8); in _dack_reload_by_path()
330 val32 |= dack->msbk_d[path][index][i] << (i * 8); in _dack_reload_by_path()
337 val32 = (dack->biask_d[path][index] << 22) | in _dack_reload_by_path()
338 (dack->dadck_d[path][index] << 14); in _dack_reload_by_path()
344 static void _dack_reload(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) in _dack_reload() argument
349 _dack_reload_by_path(rtwdev, path, i); in _dack_reload()
390 static void _dack_reset(struct rtw89_dev *rtwdev, u8 path) in _dack_reset() argument
392 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _dack_reset()
426 static void rtw8852c_txck_force(struct rtw89_dev *rtwdev, u8 path, bool force, in rtw8852c_txck_force() argument
429 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_TXCK_ON, 0x0); in rtw8852c_txck_force()
434 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_TXCK_VAL, ck); in rtw8852c_txck_force()
435 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_TXCK_ON, 0x1); in rtw8852c_txck_force()
438 static void rtw8852c_rxck_force(struct rtw89_dev *rtwdev, u8 path, bool force, in rtw8852c_rxck_force() argument
441 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_RXCK_ON, 0x0); in rtw8852c_rxck_force()
446 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_RXCK_VAL, ck); in rtw8852c_rxck_force()
447 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_RXCK_ON, 0x1); in rtw8852c_rxck_force()
608 static void rtw8852c_disable_rxagc(struct rtw89_dev *rtwdev, u8 path, u8 en_rxgac) in rtw8852c_disable_rxagc() argument
610 if (path == RF_PATH_A) in rtw8852c_disable_rxagc()
616 static void _iqk_rxk_setting(struct rtw89_dev *rtwdev, u8 path) in _iqk_rxk_setting() argument
620 if (path == RF_PATH_A) in _iqk_rxk_setting()
625 switch (iqk_info->iqk_bw[path]) { in _iqk_rxk_setting()
628 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), B_DPD_GDIS, 0x1); in _iqk_rxk_setting()
629 rtw8852c_rxck_force(rtwdev, path, true, ADC_480M); in _iqk_rxk_setting()
630 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), B_ACK_VAL, 0x0); in _iqk_rxk_setting()
631 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 + (path << 8), B_P0_CFCH_BW0, 0x3); in _iqk_rxk_setting()
632 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1 + (path << 8), B_P0_CFCH_BW1, 0xf); in _iqk_rxk_setting()
633 rtw89_write_rf(rtwdev, path, RR_RXBB2, RR_RXBB2_CKT, 0x1); in _iqk_rxk_setting()
634 rtw89_phy_write32_mask(rtwdev, R_P0_NRBW + (path << 13), B_P0_NRBW_DBG, 0x1); in _iqk_rxk_setting()
637 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), B_DPD_GDIS, 0x1); in _iqk_rxk_setting()
638 rtw8852c_rxck_force(rtwdev, path, true, ADC_960M); in _iqk_rxk_setting()
639 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), B_ACK_VAL, 0x1); in _iqk_rxk_setting()
640 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 + (path << 8), B_P0_CFCH_BW0, 0x2); in _iqk_rxk_setting()
641 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1 + (path << 8), B_P0_CFCH_BW1, 0xd); in _iqk_rxk_setting()
642 rtw89_write_rf(rtwdev, path, RR_RXBB2, RR_RXBB2_CKT, 0x1); in _iqk_rxk_setting()
643 rtw89_phy_write32_mask(rtwdev, R_P0_NRBW + (path << 13), B_P0_NRBW_DBG, 0x1); in _iqk_rxk_setting()
646 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), B_DPD_GDIS, 0x1); in _iqk_rxk_setting()
647 rtw8852c_rxck_force(rtwdev, path, true, ADC_1920M); in _iqk_rxk_setting()
648 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), B_ACK_VAL, 0x2); in _iqk_rxk_setting()
649 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 + (path << 8), B_P0_CFCH_BW0, 0x1); in _iqk_rxk_setting()
650 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1 + (path << 8), B_P0_CFCH_BW1, 0xb); in _iqk_rxk_setting()
651 rtw89_write_rf(rtwdev, path, RR_RXBB2, RR_RXBB2_CKT, 0x1); in _iqk_rxk_setting()
652 rtw89_phy_write32_mask(rtwdev, R_P0_NRBW + (path << 13), B_P0_NRBW_DBG, 0x1); in _iqk_rxk_setting()
660 if (path == RF_PATH_A) in _iqk_rxk_setting()
666 static bool _iqk_check_cal(struct rtw89_dev *rtwdev, u8 path, u8 ktype) in _iqk_check_cal() argument
678 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, ret=%d\n", path, ret); in _iqk_check_cal()
681 "[IQK]S%x, type= %x, 0x8008 = 0x%x\n", path, ktype, tmp); in _iqk_check_cal()
687 enum rtw89_phy_idx phy_idx, u8 path, u8 ktype) in _iqk_one_shot() argument
690 u32 addr_rfc_ctl = R_UPD_CLK + (path << 13); in _iqk_one_shot()
696 iqk_cmd = 0x008 | (1 << (4 + path)) | (path << 1); in _iqk_one_shot()
700 iqk_cmd = 0x008 | (1 << (4 + path)); in _iqk_one_shot()
704 iqk_cmd = 0x108 | (1 << (4 + path)); in _iqk_one_shot()
708 iqk_cmd = 0x508 | (1 << (4 + path)); in _iqk_one_shot()
712 iqk_cmd = 0x208 | (1 << (4 + path)); in _iqk_one_shot()
716 iqk_cmd = 0x308 | (1 << (4 + path)); in _iqk_one_shot()
720 iqk_cmd = 0x008 | (1 << (4 + path)) | ((0x8 + iqk_info->iqk_bw[path]) << 8); in _iqk_one_shot()
723 iqk_cmd = 0x508 | (1 << (4 + path)) | (path << 1); in _iqk_one_shot()
727 iqk_cmd = 0x008 | (1 << (4 + path)) | ((0xc + iqk_info->iqk_bw[path]) << 8); in _iqk_one_shot()
731 iqk_cmd = 0x408 | (1 << (4 + path)); in _iqk_one_shot()
735 iqk_cmd = 0x608 | (1 << (4 + path)); in _iqk_one_shot()
743 fail = _iqk_check_cal(rtwdev, path, ktype); in _iqk_one_shot()
750 enum rtw89_phy_idx phy_idx, u8 path) in _rxk_group_sel() argument
758 bkrf0 = rtw89_read_rf(rtwdev, path, RR_MOD, RR_MOD_NBW); in _rxk_group_sel()
759 if (path == RF_PATH_B) { in _rxk_group_sel()
767 switch (iqk_info->iqk_band[path]) { in _rxk_group_sel()
770 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, 0xc); in _rxk_group_sel()
771 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_NBW, 0x0); in _rxk_group_sel()
772 rtw89_write_rf(rtwdev, path, RR_RXG, RR_RXG_IQKMOD, 0x9); in _rxk_group_sel()
775 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, 0xc); in _rxk_group_sel()
776 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_NBW, 0x0); in _rxk_group_sel()
777 rtw89_write_rf(rtwdev, path, RR_RXAE, RR_RXAE_IQKMOD, 0x8); in _rxk_group_sel()
780 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, 0xc); in _rxk_group_sel()
781 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_NBW, 0x0); in _rxk_group_sel()
782 rtw89_write_rf(rtwdev, path, RR_RXAE, RR_RXAE_IQKMOD, 0x9); in _rxk_group_sel()
789 switch (iqk_info->iqk_band[path]) { in _rxk_group_sel()
792 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXG, in _rxk_group_sel()
794 rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_VOBUF, in _rxk_group_sel()
798 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXG, in _rxk_group_sel()
800 rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RXA2_IATT, in _rxk_group_sel()
804 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXG, in _rxk_group_sel()
806 rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RXA2_IATT, in _rxk_group_sel()
810 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), in _rxk_group_sel()
812 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), in _rxk_group_sel()
814 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), in _rxk_group_sel()
816 fail = _iqk_one_shot(rtwdev, phy_idx, path, ID_RXK); in _rxk_group_sel()
819 if (path == RF_PATH_B) in _rxk_group_sel()
820 rtw89_write_rf(rtwdev, path, RR_IQKPLL, RR_IQKPLL_MOD, 0x0); in _rxk_group_sel()
821 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_NBW, bkrf0); in _rxk_group_sel()
824 iqk_info->nb_rxcfir[path] = 0x40000002; in _rxk_group_sel()
825 iqk_info->is_wb_rxiqk[path] = false; in _rxk_group_sel()
827 iqk_info->nb_rxcfir[path] = 0x40000000; in _rxk_group_sel()
828 iqk_info->is_wb_rxiqk[path] = true; in _rxk_group_sel()
835 enum rtw89_phy_idx phy_idx, u8 path) in _iqk_nbrxk() argument
843 bkrf0 = rtw89_read_rf(rtwdev, path, RR_MOD, RR_MOD_NBW); in _iqk_nbrxk()
844 if (path == RF_PATH_B) { in _iqk_nbrxk()
852 switch (iqk_info->iqk_band[path]) { in _iqk_nbrxk()
855 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, 0xc); in _iqk_nbrxk()
856 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_NBW, 0x0); in _iqk_nbrxk()
857 rtw89_write_rf(rtwdev, path, RR_RXG, RR_RXG_IQKMOD, 0x9); in _iqk_nbrxk()
860 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, 0xc); in _iqk_nbrxk()
861 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_NBW, 0x0); in _iqk_nbrxk()
862 rtw89_write_rf(rtwdev, path, RR_RXAE, RR_RXAE_IQKMOD, 0x8); in _iqk_nbrxk()
865 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, 0xc); in _iqk_nbrxk()
866 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_NBW, 0x0); in _iqk_nbrxk()
867 rtw89_write_rf(rtwdev, path, RR_RXAE, RR_RXAE_IQKMOD, 0x9); in _iqk_nbrxk()
873 switch (iqk_info->iqk_band[path]) { in _iqk_nbrxk()
876 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXG, _rxk_g_idxrxgain[gp]); in _iqk_nbrxk()
877 rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_VOBUF, _rxk_g_idxattc2[gp]); in _iqk_nbrxk()
880 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXG, _rxk_a_idxrxgain[gp]); in _iqk_nbrxk()
881 rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RXA2_IATT, _rxk_a_idxattc2[gp]); in _iqk_nbrxk()
884 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXG, _rxk_a6_idxrxgain[gp]); in _iqk_nbrxk()
885 rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RXA2_IATT, _rxk_a6_idxattc2[gp]); in _iqk_nbrxk()
889 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_SEL, 0x1); in _iqk_nbrxk()
890 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_SET, 0x0); in _iqk_nbrxk()
891 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_GP_V1, gp); in _iqk_nbrxk()
892 fail = _iqk_one_shot(rtwdev, phy_idx, path, ID_RXK); in _iqk_nbrxk()
894 if (path == RF_PATH_B) in _iqk_nbrxk()
895 rtw89_write_rf(rtwdev, path, RR_IQKPLL, RR_IQKPLL_MOD, 0x0); in _iqk_nbrxk()
897 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_NBW, bkrf0); in _iqk_nbrxk()
900 iqk_info->nb_rxcfir[path] = in _iqk_nbrxk()
901 rtw89_phy_read32_mask(rtwdev, R_RXIQC + (path << 8), in _iqk_nbrxk()
904 iqk_info->nb_rxcfir[path] = 0x40000002; in _iqk_nbrxk()
906 iqk_info->is_wb_rxiqk[path] = false; in _iqk_nbrxk()
911 enum rtw89_phy_idx phy_idx, u8 path) in _txk_group_sel() argument
918 switch (iqk_info->iqk_band[path]) { in _txk_group_sel()
920 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, in _txk_group_sel()
922 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, in _txk_group_sel()
924 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, in _txk_group_sel()
927 R_KIP_IQP + (path << 8), in _txk_group_sel()
931 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, in _txk_group_sel()
933 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, in _txk_group_sel()
935 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, in _txk_group_sel()
938 R_KIP_IQP + (path << 8), in _txk_group_sel()
942 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, in _txk_group_sel()
944 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, in _txk_group_sel()
946 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, in _txk_group_sel()
949 R_KIP_IQP + (path << 8), in _txk_group_sel()
955 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), in _txk_group_sel()
957 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), in _txk_group_sel()
959 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), in _txk_group_sel()
961 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), in _txk_group_sel()
965 fail = _iqk_one_shot(rtwdev, phy_idx, path, ID_TXK); in _txk_group_sel()
969 iqk_info->nb_txcfir[path] = 0x40000002; in _txk_group_sel()
970 iqk_info->is_wb_txiqk[path] = false; in _txk_group_sel()
972 iqk_info->nb_txcfir[path] = 0x40000000; in _txk_group_sel()
973 iqk_info->is_wb_txiqk[path] = true; in _txk_group_sel()
980 enum rtw89_phy_idx phy_idx, u8 path) in _iqk_nbtxk() argument
986 switch (iqk_info->iqk_band[path]) { in _iqk_nbtxk()
988 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, _txk_g_power_range[gp]); in _iqk_nbtxk()
989 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, _txk_g_track_range[gp]); in _iqk_nbtxk()
990 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, _txk_g_gain_bb[gp]); in _iqk_nbtxk()
991 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_nbtxk()
995 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, _txk_a_power_range[gp]); in _iqk_nbtxk()
996 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, _txk_a_track_range[gp]); in _iqk_nbtxk()
997 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, _txk_a_gain_bb[gp]); in _iqk_nbtxk()
998 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_nbtxk()
1002 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, _txk_a6_power_range[gp]); in _iqk_nbtxk()
1003 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, _txk_a6_track_range[gp]); in _iqk_nbtxk()
1004 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, _txk_a6_gain_bb[gp]); in _iqk_nbtxk()
1005 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_nbtxk()
1012 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_SEL, 0x1); in _iqk_nbtxk()
1013 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_SET, 0x1); in _iqk_nbtxk()
1014 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_G2, 0x0); in _iqk_nbtxk()
1015 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_GP, gp + 1); in _iqk_nbtxk()
1018 fail = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBTXK); in _iqk_nbtxk()
1021 iqk_info->nb_txcfir[path] = in _iqk_nbtxk()
1022 rtw89_phy_read32_mask(rtwdev, R_TXIQC + (path << 8), in _iqk_nbtxk()
1025 iqk_info->nb_txcfir[path] = 0x40000002; in _iqk_nbtxk()
1027 iqk_info->is_wb_txiqk[path] = false; in _iqk_nbtxk()
1032 static bool _lok_finetune_check(struct rtw89_dev *rtwdev, u8 path) in _lok_finetune_check() argument
1045 val = rtw89_read_rf(rtwdev, path, RR_TXMO, RFREG_MASK); in _lok_finetune_check()
1054 iqk_info->lok_idac[idx][path] = val; in _lok_finetune_check()
1056 val = rtw89_read_rf(rtwdev, path, RR_LOKVB, RFREG_MASK); in _lok_finetune_check()
1065 iqk_info->lok_vbuf[idx][path] = val; in _lok_finetune_check()
1071 enum rtw89_phy_idx phy_idx, u8 path) in _iqk_lok() argument
1082 switch (iqk_info->iqk_band[path]) { in _iqk_lok()
1084 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x6); in _iqk_lok()
1085 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_lok()
1090 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x6); in _iqk_lok()
1091 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_lok()
1096 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x6); in _iqk_lok()
1097 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_lok()
1104 tmp = _iqk_one_shot(rtwdev, phy_idx, path, tmp_id); in _iqk_lok()
1105 iqk_info->lok_cor_fail[0][path] = tmp; in _iqk_lok()
1108 switch (iqk_info->iqk_band[path]) { in _iqk_lok()
1110 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x12); in _iqk_lok()
1111 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_lok()
1115 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x12); in _iqk_lok()
1116 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_lok()
1120 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x12); in _iqk_lok()
1121 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_lok()
1127 tmp = _iqk_one_shot(rtwdev, phy_idx, path, ID_FLOK_VBUFFER); in _iqk_lok()
1130 switch (iqk_info->iqk_band[path]) { in _iqk_lok()
1132 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x6); in _iqk_lok()
1133 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_lok()
1138 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x6); in _iqk_lok()
1139 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_lok()
1144 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x6); in _iqk_lok()
1145 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_lok()
1152 tmp = _iqk_one_shot(rtwdev, phy_idx, path, tmp_id); in _iqk_lok()
1153 iqk_info->lok_fin_fail[0][path] = tmp; in _iqk_lok()
1156 switch (iqk_info->iqk_band[path]) { in _iqk_lok()
1159 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x12); in _iqk_lok()
1160 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_lok()
1164 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x12); in _iqk_lok()
1165 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_lok()
1169 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x12); in _iqk_lok()
1170 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_lok()
1174 tmp = _iqk_one_shot(rtwdev, phy_idx, path, ID_FLOK_VBUFFER); in _iqk_lok()
1175 fail = _lok_finetune_check(rtwdev, path); in _iqk_lok()
1180 static void _iqk_txk_setting(struct rtw89_dev *rtwdev, u8 path) in _iqk_txk_setting() argument
1184 switch (iqk_info->iqk_band[path]) { in _iqk_txk_setting()
1187 rtw89_write_rf(rtwdev, path, RR_TXG1, RR_TXG1_ATT2, 0x0); in _iqk_txk_setting()
1188 rtw89_write_rf(rtwdev, path, RR_TXG1, RR_TXG1_ATT1, 0x0); in _iqk_txk_setting()
1189 rtw89_write_rf(rtwdev, path, RR_TXG2, RR_TXG2_ATT0, 0x1); in _iqk_txk_setting()
1190 rtw89_write_rf(rtwdev, path, RR_TXA2, RR_TXA2_LDO, 0xf); in _iqk_txk_setting()
1191 rtw89_write_rf(rtwdev, path, RR_TXGA, RR_TXGA_LOK_EXT, 0x0); in _iqk_txk_setting()
1192 rtw89_write_rf(rtwdev, path, RR_LUTWE, RR_LUTWE_LOK, 0x1); in _iqk_txk_setting()
1193 rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASK, in _iqk_txk_setting()
1196 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, 0x0); in _iqk_txk_setting()
1197 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, 0x6); in _iqk_txk_setting()
1200 rtw89_write_rf(rtwdev, path, RR_TXATANK, RR_TXATANK_LBSW2, 0x0); in _iqk_txk_setting()
1201 rtw89_write_rf(rtwdev, path, RR_TXPOW, RR_TXPOW_TXAS, 0x1); in _iqk_txk_setting()
1202 rtw89_write_rf(rtwdev, path, RR_TXA2, RR_TXA2_LDO, 0xf); in _iqk_txk_setting()
1203 rtw89_write_rf(rtwdev, path, RR_TXGA, RR_TXGA_LOK_EXT, 0x0); in _iqk_txk_setting()
1204 rtw89_write_rf(rtwdev, path, RR_LUTWE, RR_LUTWE_LOK, 0x1); in _iqk_txk_setting()
1205 rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASK, in _iqk_txk_setting()
1208 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, 0x0); in _iqk_txk_setting()
1209 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, 0x6); in _iqk_txk_setting()
1212 rtw89_write_rf(rtwdev, path, RR_TXATANK, RR_TXATANK_LBSW2, 0x0); in _iqk_txk_setting()
1213 rtw89_write_rf(rtwdev, path, RR_TXPOW, RR_TXPOW_TXAS, 0x1); in _iqk_txk_setting()
1214 rtw89_write_rf(rtwdev, path, RR_TXA2, RR_TXA2_LDO, 0xf); in _iqk_txk_setting()
1215 rtw89_write_rf(rtwdev, path, RR_TXGA, RR_TXGA_LOK_EXT, 0x0); in _iqk_txk_setting()
1216 rtw89_write_rf(rtwdev, path, RR_LUTWE, RR_LUTWE_LOK, 0x1); in _iqk_txk_setting()
1217 rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASK, in _iqk_txk_setting()
1220 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, 0x0); in _iqk_txk_setting()
1221 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, 0x6); in _iqk_txk_setting()
1227 u8 path) in _iqk_info_iqk() argument
1233 iqk_info->thermal[path] = in _iqk_info_iqk()
1234 ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]); in _iqk_info_iqk()
1236 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%d_thermal = %d\n", path, in _iqk_info_iqk()
1237 iqk_info->thermal[path]); in _iqk_info_iqk()
1238 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%d_LOK_COR_fail= %d\n", path, in _iqk_info_iqk()
1239 iqk_info->lok_cor_fail[0][path]); in _iqk_info_iqk()
1240 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%d_LOK_FIN_fail= %d\n", path, in _iqk_info_iqk()
1241 iqk_info->lok_fin_fail[0][path]); in _iqk_info_iqk()
1242 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%d_TXIQK_fail = %d\n", path, in _iqk_info_iqk()
1243 iqk_info->iqk_tx_fail[0][path]); in _iqk_info_iqk()
1244 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%d_RXIQK_fail= %d,\n", path, in _iqk_info_iqk()
1245 iqk_info->iqk_rx_fail[0][path]); in _iqk_info_iqk()
1247 flag = iqk_info->lok_cor_fail[0][path]; in _iqk_info_iqk()
1248 rtw89_phy_write32_mask(rtwdev, R_IQKINF, B_IQKINF_FCOR << (path * 4), flag); in _iqk_info_iqk()
1249 flag = iqk_info->lok_fin_fail[0][path]; in _iqk_info_iqk()
1250 rtw89_phy_write32_mask(rtwdev, R_IQKINF, B_IQKINF_FFIN << (path * 4), flag); in _iqk_info_iqk()
1251 flag = iqk_info->iqk_tx_fail[0][path]; in _iqk_info_iqk()
1252 rtw89_phy_write32_mask(rtwdev, R_IQKINF, B_IQKINF_FTX << (path * 4), flag); in _iqk_info_iqk()
1253 flag = iqk_info->iqk_rx_fail[0][path]; in _iqk_info_iqk()
1254 rtw89_phy_write32_mask(rtwdev, R_IQKINF, B_IQKINF_F_RX << (path * 4), flag); in _iqk_info_iqk()
1256 tmp = rtw89_phy_read32_mask(rtwdev, R_IQK_RES + (path << 8), MASKDWORD); in _iqk_info_iqk()
1257 iqk_info->bp_iqkenable[path] = tmp; in _iqk_info_iqk()
1258 tmp = rtw89_phy_read32_mask(rtwdev, R_TXIQC + (path << 8), MASKDWORD); in _iqk_info_iqk()
1259 iqk_info->bp_txkresult[path] = tmp; in _iqk_info_iqk()
1260 tmp = rtw89_phy_read32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD); in _iqk_info_iqk()
1261 iqk_info->bp_rxkresult[path] = tmp; in _iqk_info_iqk()
1266 tmp = rtw89_phy_read32_mask(rtwdev, R_IQKINF, B_IQKINF_FAIL << (path * 4)); in _iqk_info_iqk()
1269 rtw89_phy_write32_mask(rtwdev, R_IQKINF2, B_IQKINF2_FCNT << (path * 4), in _iqk_info_iqk()
1273 static void _iqk_by_path(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, u8 path) in _iqk_by_path() argument
1277 _iqk_txk_setting(rtwdev, path); in _iqk_by_path()
1278 iqk_info->lok_fail[path] = _iqk_lok(rtwdev, phy_idx, path); in _iqk_by_path()
1281 iqk_info->iqk_tx_fail[0][path] = _iqk_nbtxk(rtwdev, phy_idx, path); in _iqk_by_path()
1283 iqk_info->iqk_tx_fail[0][path] = _txk_group_sel(rtwdev, phy_idx, path); in _iqk_by_path()
1285 _iqk_rxk_setting(rtwdev, path); in _iqk_by_path()
1287 iqk_info->iqk_rx_fail[0][path] = _iqk_nbrxk(rtwdev, phy_idx, path); in _iqk_by_path()
1289 iqk_info->iqk_rx_fail[0][path] = _rxk_group_sel(rtwdev, phy_idx, path); in _iqk_by_path()
1291 _iqk_info_iqk(rtwdev, phy_idx, path); in _iqk_by_path()
1295 enum rtw89_phy_idx phy, u8 path) in _iqk_get_ch_info() argument
1302 iqk_info->iqk_band[path] = chan->band_type; in _iqk_get_ch_info()
1303 iqk_info->iqk_bw[path] = chan->band_width; in _iqk_get_ch_info()
1304 iqk_info->iqk_ch[path] = chan->channel; in _iqk_get_ch_info()
1307 "[IQK]iqk_info->iqk_band[%x] = 0x%x\n", path, in _iqk_get_ch_info()
1308 iqk_info->iqk_band[path]); in _iqk_get_ch_info()
1310 path, iqk_info->iqk_bw[path]); in _iqk_get_ch_info()
1312 path, iqk_info->iqk_ch[path]); in _iqk_get_ch_info()
1314 "[IQK]S%d (PHY%d): / DBCC %s/ %s/ CH%d/ %s\n", path, phy, in _iqk_get_ch_info()
1316 iqk_info->iqk_band[path] == 0 ? "2G" : in _iqk_get_ch_info()
1317 iqk_info->iqk_band[path] == 1 ? "5G" : "6G", in _iqk_get_ch_info()
1318 iqk_info->iqk_ch[path], in _iqk_get_ch_info()
1319 iqk_info->iqk_bw[path] == 0 ? "20M" : in _iqk_get_ch_info()
1320 iqk_info->iqk_bw[path] == 1 ? "40M" : "80M"); in _iqk_get_ch_info()
1327 rtw89_phy_write32_mask(rtwdev, R_IQKCH, B_IQKCH_BAND << (path * 16), in _iqk_get_ch_info()
1328 iqk_info->iqk_band[path]); in _iqk_get_ch_info()
1329 rtw89_phy_write32_mask(rtwdev, R_IQKCH, B_IQKCH_BW << (path * 16), in _iqk_get_ch_info()
1330 iqk_info->iqk_bw[path]); in _iqk_get_ch_info()
1331 rtw89_phy_write32_mask(rtwdev, R_IQKCH, B_IQKCH_CH << (path * 16), in _iqk_get_ch_info()
1332 iqk_info->iqk_ch[path]); in _iqk_get_ch_info()
1338 u8 path) in _iqk_start_iqk() argument
1340 _iqk_by_path(rtwdev, phy_idx, path); in _iqk_start_iqk()
1343 static void _iqk_restore(struct rtw89_dev *rtwdev, u8 path) in _iqk_restore() argument
1348 rtw89_phy_write32_mask(rtwdev, R_TXIQC + (path << 8), MASKDWORD, in _iqk_restore()
1349 iqk_info->nb_txcfir[path]); in _iqk_restore()
1350 rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD, in _iqk_restore()
1351 iqk_info->nb_rxcfir[path]); in _iqk_restore()
1353 0x00001219 + (path << 4)); in _iqk_restore()
1355 fail = _iqk_check_cal(rtwdev, path, 0x12); in _iqk_restore()
1362 rtw89_write_rf(rtwdev, path, RR_LUTWE, RR_LUTWE_LOK, 0x0); in _iqk_restore()
1363 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RR_MOD_V_RX); in _iqk_restore()
1364 rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x1); in _iqk_restore()
1368 enum rtw89_phy_idx phy_idx, u8 path) in _iqk_afebb_restore() argument
1370 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _iqk_afebb_restore()
1374 rtw8852c_disable_rxagc(rtwdev, path, 0x1); in _iqk_afebb_restore()
1377 static void _iqk_preset(struct rtw89_dev *rtwdev, u8 path) in _iqk_preset() argument
1383 rtw89_phy_write32_mask(rtwdev, R_COEF_SEL + (path << 8), B_COEF_SEL_IQC, idx); in _iqk_preset()
1384 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_G3, idx); in _iqk_preset()
1385 rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); in _iqk_preset()
1391 enum rtw89_phy_idx phy_idx, u8 path) in _iqk_macbb_setting() argument
1396 rtw89_write_rf(rtwdev, path, RR_BBDC, RR_BBDC_SEL, 0x0); in _iqk_macbb_setting()
1397 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A0 << path, 0x1); in _iqk_macbb_setting()
1398 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A1 << path, 0x0); in _iqk_macbb_setting()
1399 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A2 << path, 0x1); in _iqk_macbb_setting()
1400 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A3 << path, 0x0); in _iqk_macbb_setting()
1403 rtw8852c_disable_rxagc(rtwdev, path, 0x0); in _iqk_macbb_setting()
1404 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK | (path << 13), MASKDWORD, 0xf801fffd); in _iqk_macbb_setting()
1405 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK | (path << 13), B_DPD_DIS, 0x1); in _iqk_macbb_setting()
1406 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK | (path << 13), B_DAC_VAL, 0x1); in _iqk_macbb_setting()
1408 rtw8852c_txck_force(rtwdev, path, true, DAC_960M); in _iqk_macbb_setting()
1409 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK | (path << 13), B_DPD_GDIS, 0x1); in _iqk_macbb_setting()
1411 rtw8852c_rxck_force(rtwdev, path, true, ADC_1920M); in _iqk_macbb_setting()
1412 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK | (path << 13), B_ACK_VAL, 0x2); in _iqk_macbb_setting()
1414 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 | (path << 8), B_P0_CFCH_BW0, 0x1); in _iqk_macbb_setting()
1415 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1 | (path << 8), B_P0_CFCH_BW1, 0xb); in _iqk_macbb_setting()
1416 rtw89_phy_write32_mask(rtwdev, R_P0_NRBW | (path << 13), B_P0_NRBW_DBG, 0x1); in _iqk_macbb_setting()
1421 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A1 << path, 0x1); in _iqk_macbb_setting()
1422 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A3 << path, 0x1); in _iqk_macbb_setting()
1425 static void _rck(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) in _rck() argument
1431 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RCK] ====== S%d RCK ======\n", path); in _rck()
1433 rf_reg5 = rtw89_read_rf(rtwdev, path, RR_RSV1, RFREG_MASK); in _rck()
1435 rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); in _rck()
1436 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RR_MOD_V_RX); in _rck()
1439 rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK)); in _rck()
1442 rtw89_write_rf(rtwdev, path, RR_RCKC, RFREG_MASK, 0x00240); in _rck()
1445 false, rtwdev, path, 0x1c, BIT(3)); in _rck()
1449 rck_val = rtw89_read_rf(rtwdev, path, RR_RCKC, RR_RCKC_CA); in _rck()
1450 rtw89_write_rf(rtwdev, path, RR_RCKC, RFREG_MASK, rck_val); in _rck()
1452 rtw89_write_rf(rtwdev, path, RR_RSV1, RFREG_MASK, rf_reg5); in _rck()
1456 rtw89_read_rf(rtwdev, path, RR_RCKC, RFREG_MASK), in _rck()
1457 rtw89_read_rf(rtwdev, path, RR_RCKS, RFREG_MASK)); in _rck()
1463 u8 ch, path; in _iqk_init() local
1481 for (path = 0; path < RTW8852C_IQK_SS; path++) { in _iqk_init()
1482 iqk_info->lok_cor_fail[ch][path] = false; in _iqk_init()
1483 iqk_info->lok_fin_fail[ch][path] = false; in _iqk_init()
1484 iqk_info->iqk_tx_fail[ch][path] = false; in _iqk_init()
1485 iqk_info->iqk_rx_fail[ch][path] = false; in _iqk_init()
1486 iqk_info->iqk_mcc_ch[ch][path] = 0x0; in _iqk_init()
1487 iqk_info->iqk_table_idx[path] = 0x0; in _iqk_init()
1493 enum rtw89_phy_idx phy_idx, u8 path) in _doiqk() argument
1509 _iqk_get_ch_info(rtwdev, phy_idx, path); in _doiqk()
1511 _rfk_backup_rf_reg(rtwdev, backup_rf_val[path], path); in _doiqk()
1512 _iqk_macbb_setting(rtwdev, phy_idx, path); in _doiqk()
1513 _iqk_preset(rtwdev, path); in _doiqk()
1514 _iqk_start_iqk(rtwdev, phy_idx, path); in _doiqk()
1515 _iqk_restore(rtwdev, path); in _doiqk()
1516 _iqk_afebb_restore(rtwdev, phy_idx, path); in _doiqk()
1518 _rfk_restore_rf_reg(rtwdev, backup_rf_val[path], path); in _doiqk()
1540 static void _rx_dck_toggle(struct rtw89_dev *rtwdev, u8 path) in _rx_dck_toggle() argument
1545 rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_LV, 0x0); in _rx_dck_toggle()
1546 rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_LV, 0x1); in _rx_dck_toggle()
1549 2, 2000, false, rtwdev, path, in _rx_dck_toggle()
1552 rtw89_warn(rtwdev, "[RX_DCK] S%d RXDCK timeout\n", path); in _rx_dck_toggle()
1554 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RX_DCK] S%d RXDCK finish\n", path); in _rx_dck_toggle()
1556 rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_LV, 0x0); in _rx_dck_toggle()
1559 static void _set_rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, u8 path, in _set_rx_dck() argument
1564 rtw89_write_rf(rtwdev, path, RR_DCK1, RR_DCK1_CLR, 0x0); in _set_rx_dck()
1566 _rx_dck_toggle(rtwdev, path); in _set_rx_dck()
1567 if (rtw89_read_rf(rtwdev, path, RR_DCKC, RR_DCKC_CHK) == 0) in _set_rx_dck()
1569 res = rtw89_read_rf(rtwdev, path, RR_DCK, RR_DCK_DONE); in _set_rx_dck()
1571 rtw89_write_rf(rtwdev, path, RR_RXBB2, RR_RXBB2_IDAC, res); in _set_rx_dck()
1572 _rx_dck_toggle(rtwdev, path); in _set_rx_dck()
1573 rtw89_write_rf(rtwdev, path, RR_RXBB2, RR_RXBB2_IDAC, 0x1); in _set_rx_dck()
1619 enum rtw89_rf_path path, bool is_bybb) in _rf_direct_cntrl() argument
1622 rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x1); in _rf_direct_cntrl()
1624 rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); in _rf_direct_cntrl()
1628 enum rtw89_rf_path path, bool off);
1631 u32 reg_bkup[][RTW8852C_DPK_KIP_REG_NUM], u8 path) in _dpk_bkup_kip() argument
1636 reg_bkup[path][i] = in _dpk_bkup_kip()
1637 rtw89_phy_read32_mask(rtwdev, reg[i] + (path << 8), MASKDWORD); in _dpk_bkup_kip()
1640 reg[i] + (path << 8), reg_bkup[path][i]); in _dpk_bkup_kip()
1645 u32 reg_bkup[][RTW8852C_DPK_KIP_REG_NUM], u8 path) in _dpk_reload_kip() argument
1650 rtw89_phy_write32_mask(rtwdev, reg[i] + (path << 8), in _dpk_reload_kip()
1651 MASKDWORD, reg_bkup[path][i]); in _dpk_reload_kip()
1653 reg[i] + (path << 8), reg_bkup[path][i]); in _dpk_reload_kip()
1658 enum rtw89_rf_path path, enum rtw8852c_dpk_id id) in _dpk_one_shot() argument
1664 dpk_cmd = (u16)((id << 8) | (0x19 + path * 0x12)); in _dpk_one_shot()
1693 enum rtw89_rf_path path) in _dpk_information() argument
1698 u8 kidx = dpk->cur_idx[path]; in _dpk_information()
1700 dpk->bp[path][kidx].band = chan->band_type; in _dpk_information()
1701 dpk->bp[path][kidx].ch = chan->channel; in _dpk_information()
1702 dpk->bp[path][kidx].bw = chan->band_width; in _dpk_information()
1706 path, dpk->cur_idx[path], phy, in _dpk_information()
1707 rtwdev->is_tssi_mode[path] ? "on" : "off", in _dpk_information()
1709 dpk->bp[path][kidx].band == 0 ? "2G" : in _dpk_information()
1710 dpk->bp[path][kidx].band == 1 ? "5G" : "6G", in _dpk_information()
1711 dpk->bp[path][kidx].ch, in _dpk_information()
1712 dpk->bp[path][kidx].bw == 0 ? "20M" : in _dpk_information()
1713 dpk->bp[path][kidx].bw == 1 ? "40M" : "80M"); in _dpk_information()
1718 enum rtw89_rf_path path, u8 kpath) in _dpk_bb_afe_setting() argument
1721 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A0 << path, 0x1); in _dpk_bb_afe_setting()
1722 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A1 << path, 0x0); in _dpk_bb_afe_setting()
1723 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A2 << path, 0x1); in _dpk_bb_afe_setting()
1724 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A3 << path, 0x0); in _dpk_bb_afe_setting()
1727 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), MASKDWORD, 0xd801dffd); in _dpk_bb_afe_setting()
1730 rtw8852c_txck_force(rtwdev, path, true, DAC_960M); in _dpk_bb_afe_setting()
1733 rtw8852c_rxck_force(rtwdev, path, true, ADC_1920M); in _dpk_bb_afe_setting()
1734 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 + (path << 8), B_P0_CFCH_BW0, 0x1); in _dpk_bb_afe_setting()
1735 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1 + (path << 8), B_P0_CFCH_BW1, 0xb); in _dpk_bb_afe_setting()
1736 rtw89_phy_write32_mask(rtwdev, R_P0_NRBW + (path << 13), in _dpk_bb_afe_setting()
1744 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A1 << path, 0x1); in _dpk_bb_afe_setting()
1745 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A3 << path, 0x1); in _dpk_bb_afe_setting()
1747 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d BB/AFE setting\n", path); in _dpk_bb_afe_setting()
1750 static void _dpk_bb_afe_restore(struct rtw89_dev *rtwdev, u8 path) in _dpk_bb_afe_restore() argument
1752 rtw89_phy_write32_mask(rtwdev, R_P0_NRBW + (path << 13), in _dpk_bb_afe_restore()
1754 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A0 << path, 0x1); in _dpk_bb_afe_restore()
1755 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A1 << path, 0x0); in _dpk_bb_afe_restore()
1756 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A2 << path, 0x1); in _dpk_bb_afe_restore()
1757 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A3 << path, 0x0); in _dpk_bb_afe_restore()
1758 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), MASKDWORD, 0x00000000); in _dpk_bb_afe_restore()
1759 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK + (path << 13), B_P0_TXCK_ALL, 0x00); in _dpk_bb_afe_restore()
1760 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A0 << path, 0x0); in _dpk_bb_afe_restore()
1761 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A2 << path, 0x0); in _dpk_bb_afe_restore()
1763 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d BB/AFE restore\n", path); in _dpk_bb_afe_restore()
1767 enum rtw89_rf_path path, bool is_pause) in _dpk_tssi_pause() argument
1769 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK + (path << 13), in _dpk_tssi_pause()
1772 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d TSSI %s\n", path, in _dpk_tssi_pause()
1776 static void _dpk_kip_control_rfc(struct rtw89_dev *rtwdev, u8 path, bool ctrl_by_kip) in _dpk_kip_control_rfc() argument
1778 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), B_IQK_RFC_ON, ctrl_by_kip); in _dpk_kip_control_rfc()
1783 static void _dpk_txpwr_bb_force(struct rtw89_dev *rtwdev, u8 path, bool force) in _dpk_txpwr_bb_force() argument
1785 rtw89_phy_write32_mask(rtwdev, R_TXPWRB + (path << 13), B_TXPWRB_ON, force); in _dpk_txpwr_bb_force()
1786 rtw89_phy_write32_mask(rtwdev, R_TXPWRB_H + (path << 13), B_TXPWRB_RDY, force); in _dpk_txpwr_bb_force()
1789 path, force ? "on" : "off"); in _dpk_txpwr_bb_force()
1793 enum rtw89_rf_path path) in _dpk_kip_restore() argument
1795 _dpk_one_shot(rtwdev, phy, path, D_KIP_RESTORE); in _dpk_kip_restore()
1796 _dpk_kip_control_rfc(rtwdev, path, false); in _dpk_kip_restore()
1797 _dpk_txpwr_bb_force(rtwdev, path, false); in _dpk_kip_restore()
1798 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d restore KIP\n", path); in _dpk_kip_restore()
1803 enum rtw89_rf_path path) in _dpk_lbk_rxiqk() argument
1809 rtw89_phy_write32_mask(rtwdev, R_DPD_V1 + (path << 8), B_DPD_LBK, 0x1); in _dpk_lbk_rxiqk()
1812 _dpk_kip_control_rfc(rtwdev, path, false); in _dpk_lbk_rxiqk()
1814 cur_rxbb = rtw89_read_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXBB); in _dpk_lbk_rxiqk()
1815 rf_11 = rtw89_read_rf(rtwdev, path, RR_TXIG, RFREG_MASK); in _dpk_lbk_rxiqk()
1816 reg_81cc = rtw89_phy_read32_mask(rtwdev, R_KIP_IQP + (path << 8), in _dpk_lbk_rxiqk()
1819 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, 0x0); in _dpk_lbk_rxiqk()
1820 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, 0x3); in _dpk_lbk_rxiqk()
1821 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0xd); in _dpk_lbk_rxiqk()
1822 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXBB, 0x1f); in _dpk_lbk_rxiqk()
1824 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), B_KIP_IQP_IQSW, 0x12); in _dpk_lbk_rxiqk()
1825 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), B_KIP_IQP_SW, 0x3); in _dpk_lbk_rxiqk()
1827 _dpk_kip_control_rfc(rtwdev, path, true); in _dpk_lbk_rxiqk()
1831 _dpk_one_shot(rtwdev, phy, path, LBK_RXIQK); in _dpk_lbk_rxiqk()
1833 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d LBK RXIQC = 0x%x\n", path, in _dpk_lbk_rxiqk()
1834 rtw89_phy_read32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD)); in _dpk_lbk_rxiqk()
1836 _dpk_kip_control_rfc(rtwdev, path, false); in _dpk_lbk_rxiqk()
1838 rtw89_write_rf(rtwdev, path, RR_TXIG, RFREG_MASK, rf_11); in _dpk_lbk_rxiqk()
1839 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXBB, cur_rxbb); in _dpk_lbk_rxiqk()
1840 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), B_KIP_IQP_SW, reg_81cc); in _dpk_lbk_rxiqk()
1844 rtw89_phy_write32_mask(rtwdev, R_LOAD_COEF + (path << 8), B_LOAD_COEF_DI, 0x1); in _dpk_lbk_rxiqk()
1846 _dpk_kip_control_rfc(rtwdev, path, true); in _dpk_lbk_rxiqk()
1850 enum rtw89_rf_path path, u8 kidx) in _dpk_rf_setting() argument
1854 if (dpk->bp[path][kidx].band == RTW89_BAND_2G) { in _dpk_rf_setting()
1855 rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASK, in _dpk_rf_setting()
1857 rtw89_write_rf(rtwdev, path, RR_MOD_V1, RR_MOD_MASK, RF_DPK); in _dpk_rf_setting()
1858 rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_ATTC, 0x2); in _dpk_rf_setting()
1859 rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_ATTR, 0x4); in _dpk_rf_setting()
1860 rtw89_write_rf(rtwdev, path, RR_LUTDBG, RR_LUTDBG_TIA, 0x1); in _dpk_rf_setting()
1861 rtw89_write_rf(rtwdev, path, RR_TIA, RR_TIA_N6, 0x1); in _dpk_rf_setting()
1865 rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK), in _dpk_rf_setting()
1866 rtw89_read_rf(rtwdev, path, RR_RXBB, RFREG_MASK), in _dpk_rf_setting()
1867 rtw89_read_rf(rtwdev, path, RR_TIA, RFREG_MASK), in _dpk_rf_setting()
1868 rtw89_read_rf(rtwdev, path, RR_BTC, RFREG_MASK), in _dpk_rf_setting()
1869 rtw89_read_rf(rtwdev, path, RR_LUTDBG, RFREG_MASK), in _dpk_rf_setting()
1870 rtw89_read_rf(rtwdev, path, 0x1001a, RFREG_MASK)); in _dpk_rf_setting()
1872 rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASK, in _dpk_rf_setting()
1874 rtw89_write_rf(rtwdev, path, RR_MOD_V1, RR_MOD_MASK, RF_DPK); in _dpk_rf_setting()
1876 if (dpk->bp[path][kidx].band == RTW89_BAND_6G && dpk->bp[path][kidx].ch >= 161) { in _dpk_rf_setting()
1877 rtw89_write_rf(rtwdev, path, RR_IQGEN, RR_IQGEN_BIAS, 0x8); in _dpk_rf_setting()
1878 rtw89_write_rf(rtwdev, path, RR_LOGEN, RR_LOGEN_RPT, 0xd); in _dpk_rf_setting()
1880 rtw89_write_rf(rtwdev, path, RR_LOGEN, RR_LOGEN_RPT, 0xd); in _dpk_rf_setting()
1883 rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RXA2_ATT, 0x0); in _dpk_rf_setting()
1884 rtw89_write_rf(rtwdev, path, RR_TXIQK, RR_TXIQK_ATT2, 0x3); in _dpk_rf_setting()
1885 rtw89_write_rf(rtwdev, path, RR_LUTDBG, RR_LUTDBG_TIA, 0x1); in _dpk_rf_setting()
1886 rtw89_write_rf(rtwdev, path, RR_TIA, RR_TIA_N6, 0x1); in _dpk_rf_setting()
1888 if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_160) in _dpk_rf_setting()
1889 rtw89_write_rf(rtwdev, path, RR_RXBB2, RR_RXBB2_EBW, 0x0); in _dpk_rf_setting()
1893 static void _dpk_tpg_sel(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 kidx) in _dpk_tpg_sel() argument
1897 if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_160) { in _dpk_tpg_sel()
1900 } else if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_80) { in _dpk_tpg_sel()
1903 } else if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_40) { in _dpk_tpg_sel()
1911 dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_160 ? "160M" : in _dpk_tpg_sel()
1912 dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_80 ? "80M" : in _dpk_tpg_sel()
1913 dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_40 ? "40M" : "20M"); in _dpk_tpg_sel()
1916 static bool _dpk_sync_check(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 kidx) in _dpk_sync_check() argument
1931 dpk->corr_idx[path][kidx] = corr_idx; in _dpk_sync_check()
1932 dpk->corr_val[path][kidx] = corr_val; in _dpk_sync_check()
1944 path, corr_idx, corr_val, dc_i, dc_q); in _dpk_sync_check()
1946 dpk->dc_i[path][kidx] = dc_i; in _dpk_sync_check()
1947 dpk->dc_q[path][kidx] = dc_q; in _dpk_sync_check()
1957 path, rxbb, in _dpk_sync_check()
1995 static void _dpk_kset_query(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) in _dpk_kset_query() argument
1999 rtw89_phy_write32_mask(rtwdev, R_KIP_RPT + (path << 8), B_KIP_RPT_SEL, 0x10); in _dpk_kset_query()
2001 rtw89_phy_read32_mask(rtwdev, R_RPT_PER + (path << 8), 0xE0000000) - 1; in _dpk_kset_query()
2005 enum rtw89_rf_path path, u8 dbm, bool set_from_bb) in _dpk_kip_set_txagc() argument
2009 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] set S%d txagc to %ddBm\n", path, dbm); in _dpk_kip_set_txagc()
2010 rtw89_phy_write32_mask(rtwdev, R_TXPWRB + (path << 13), B_TXPWRB_VAL, dbm << 2); in _dpk_kip_set_txagc()
2012 _dpk_one_shot(rtwdev, phy, path, D_TXAGC); in _dpk_kip_set_txagc()
2013 _dpk_kset_query(rtwdev, path); in _dpk_kip_set_txagc()
2017 enum rtw89_rf_path path, u8 kidx) in _dpk_gainloss() argument
2019 _dpk_one_shot(rtwdev, phy, path, D_GAIN_LOSS); in _dpk_gainloss()
2020 _dpk_kip_set_txagc(rtwdev, phy, path, 0xff, false); in _dpk_gainloss()
2022 rtw89_phy_write32_mask(rtwdev, R_DPK_GL + (path << 8), B_DPK_GL_A1, 0x0); in _dpk_gainloss()
2023 rtw89_phy_write32_mask(rtwdev, R_DPK_GL + (path << 8), B_DPK_GL_A0, 0x0); in _dpk_gainloss()
2068 enum rtw89_rf_path path, u8 kidx) in _dpk_kip_set_rxagc() argument
2070 _dpk_one_shot(rtwdev, phy, path, D_RXAGC); in _dpk_kip_set_rxagc()
2072 return _dpk_sync_check(rtwdev, path, kidx); in _dpk_kip_set_rxagc()
2091 static void _dpk_bypass_rxiqc(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) in _dpk_bypass_rxiqc() argument
2093 rtw89_phy_write32_mask(rtwdev, R_DPD_V1 + (path << 8), B_DPD_LBK, 0x1); in _dpk_bypass_rxiqc()
2094 rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD, 0x40000002); in _dpk_bypass_rxiqc()
2100 enum rtw89_rf_path path, u8 kidx, u8 init_xdbm, u8 loss_only) in _dpk_agc() argument
2114 is_fail = _dpk_kip_set_rxagc(rtwdev, phy, path, kidx); in _dpk_agc()
2127 _dpk_one_shot(rtwdev, phy, path, D_SYNC); in _dpk_agc()
2132 if (dpk->bp[path][kidx].band == RTW89_BAND_2G) in _dpk_agc()
2133 _dpk_bypass_rxiqc(rtwdev, path); in _dpk_agc()
2135 _dpk_lbk_rxiqk(rtwdev, phy, path); in _dpk_agc()
2141 tmp_gl_idx = _dpk_gainloss(rtwdev, phy, path, kidx); in _dpk_agc()
2158 _dpk_kip_set_txagc(rtwdev, phy, path, tmp_dbm, true); in _dpk_agc()
2170 _dpk_kip_set_txagc(rtwdev, phy, path, tmp_dbm, true); in _dpk_agc()
2177 _dpk_kip_control_rfc(rtwdev, path, false); in _dpk_agc()
2178 tmp_rxbb = rtw89_read_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXBB); in _dpk_agc()
2184 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXBB, tmp_rxbb); in _dpk_agc()
2187 _dpk_kip_control_rfc(rtwdev, path, true); in _dpk_agc()
2225 enum rtw89_rf_path path, u8 kidx) in _dpk_idl_mpa() argument
2240 else if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_5 || in _dpk_idl_mpa()
2241 dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_10 || in _dpk_idl_mpa()
2242 dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_20) in _dpk_idl_mpa()
2244 else if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_40 || in _dpk_idl_mpa()
2245 dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_80) in _dpk_idl_mpa()
2253 _dpk_one_shot(rtwdev, phy, path, D_MDPK_IDL); in _dpk_idl_mpa()
2262 _dpk_one_shot(rtwdev, phy, path, D_MDPK_IDL); in _dpk_idl_mpa()
2269 _dpk_one_shot(rtwdev, phy, path, D_MDPK_IDL); in _dpk_idl_mpa()
2274 enum rtw89_rf_path path) in _dpk_reload_check() argument
2285 if (cur_band != dpk->bp[path][idx].band || in _dpk_reload_check()
2286 cur_ch != dpk->bp[path][idx].ch) in _dpk_reload_check()
2289 rtw89_phy_write32_mask(rtwdev, R_COEF_SEL + (path << 8), in _dpk_reload_check()
2291 dpk->cur_idx[path] = idx; in _dpk_reload_check()
2294 "[DPK] reload S%d[%d] success\n", path, idx); in _dpk_reload_check()
2307 enum rtw89_rf_path path, u8 kidx) in _dpk_kip_preset_8852c() argument
2310 rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK)); in _dpk_kip_preset_8852c()
2314 R_DPD_CH0A + (path << 8) + (kidx << 2), in _dpk_kip_preset_8852c()
2318 R_DPD_CH0A + (path << 8) + (kidx << 2), in _dpk_kip_preset_8852c()
2321 _dpk_kip_control_rfc(rtwdev, path, true); in _dpk_kip_preset_8852c()
2322 rtw89_phy_write32_mask(rtwdev, R_COEF_SEL + (path << 8), B_COEF_SEL_MDPD, kidx); in _dpk_kip_preset_8852c()
2324 _dpk_one_shot(rtwdev, phy, path, D_KIP_PRESET); in _dpk_kip_preset_8852c()
2327 static void _dpk_para_query(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 kidx) in _dpk_para_query() argument
2334 para = rtw89_phy_read32_mask(rtwdev, dpk_par_regs[kidx][dpk->cur_k_set] + (path << 8), in _dpk_para_query()
2337 dpk->bp[path][kidx].txagc_dpk = FIELD_GET(_DPK_PARA_TXAGC, para); in _dpk_para_query()
2338 dpk->bp[path][kidx].ther_dpk = FIELD_GET(_DPK_PARA_THER, para); in _dpk_para_query()
2341 dpk->cur_k_set, dpk->bp[path][kidx].ther_dpk, dpk->bp[path][kidx].txagc_dpk); in _dpk_para_query()
2345 enum rtw89_rf_path path, u8 kidx, bool is_execute) in _dpk_gain_normalize_8852c() argument
2350 rtw89_phy_write32_mask(rtwdev, R_DPK_GN + (path << 8), B_DPK_GN_AG, 0x200); in _dpk_gain_normalize_8852c()
2351 rtw89_phy_write32_mask(rtwdev, R_DPK_GN + (path << 8), B_DPK_GN_EN, 0x3); in _dpk_gain_normalize_8852c()
2353 _dpk_one_shot(rtwdev, phy, path, D_GAIN_NORM); in _dpk_gain_normalize_8852c()
2355 rtw89_phy_write32_mask(rtwdev, dpk_par_regs[kidx][dpk->cur_k_set] + (path << 8), in _dpk_gain_normalize_8852c()
2358 dpk->bp[path][kidx].gs = in _dpk_gain_normalize_8852c()
2359 rtw89_phy_read32_mask(rtwdev, dpk_par_regs[kidx][dpk->cur_k_set] + (path << 8), in _dpk_gain_normalize_8852c()
2392 enum rtw89_rf_path path, u8 kidx) in _dpk_on() argument
2396 rtw89_phy_write32_mask(rtwdev, R_LOAD_COEF + (path << 8), B_LOAD_COEF_MDPD, 0x1); in _dpk_on()
2397 rtw89_phy_write32_mask(rtwdev, R_LOAD_COEF + (path << 8), B_LOAD_COEF_MDPD, 0x0); in _dpk_on()
2398 rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2), in _dpk_on()
2401 dpk->bp[path][kidx].mdpd_en = BIT(dpk->cur_k_set); in _dpk_on()
2402 dpk->bp[path][kidx].path_ok = true; in _dpk_on()
2405 path, kidx, dpk->bp[path][kidx].mdpd_en); in _dpk_on()
2407 rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2), in _dpk_on()
2408 B_DPD_MEN, dpk->bp[path][kidx].mdpd_en); in _dpk_on()
2410 _dpk_gain_normalize_8852c(rtwdev, phy, path, kidx, false); in _dpk_on()
2414 enum rtw89_rf_path path, u8 gain) in _dpk_main() argument
2417 u8 kidx = dpk->cur_idx[path]; in _dpk_main()
2422 "[DPK] ========= S%d[%d] DPK Start =========\n", path, kidx); in _dpk_main()
2423 _dpk_kip_control_rfc(rtwdev, path, false); in _dpk_main()
2424 _rf_direct_cntrl(rtwdev, path, false); in _dpk_main()
2425 rtw89_write_rf(rtwdev, path, RR_BBDC, RFREG_MASK, 0x03ffd); in _dpk_main()
2426 _dpk_rf_setting(rtwdev, gain, path, kidx); in _dpk_main()
2427 _set_rx_dck(rtwdev, phy, path, false); in _dpk_main()
2429 _dpk_kip_preset_8852c(rtwdev, phy, path, kidx); in _dpk_main()
2430 _dpk_txpwr_bb_force(rtwdev, path, true); in _dpk_main()
2431 _dpk_kip_set_txagc(rtwdev, phy, path, init_xdbm, true); in _dpk_main()
2432 _dpk_tpg_sel(rtwdev, path, kidx); in _dpk_main()
2434 is_fail = _dpk_agc(rtwdev, phy, path, kidx, init_xdbm, false); in _dpk_main()
2438 _dpk_idl_mpa(rtwdev, phy, path, kidx); in _dpk_main()
2439 _dpk_para_query(rtwdev, path, kidx); in _dpk_main()
2440 _dpk_on(rtwdev, phy, path, kidx); in _dpk_main()
2443 _dpk_kip_control_rfc(rtwdev, path, false); in _dpk_main()
2444 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RF_RX); in _dpk_main()
2445 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d[%d]_K%d %s\n", path, kidx, in _dpk_main()
2451 static void _dpk_init(struct rtw89_dev *rtwdev, u8 path) in _dpk_init() argument
2454 u8 kidx = dpk->cur_idx[path]; in _dpk_init()
2456 dpk->bp[path][kidx].path_ok = false; in _dpk_init()
2459 static void _dpk_drf_direct_cntrl(struct rtw89_dev *rtwdev, u8 path, bool is_bybb) in _dpk_drf_direct_cntrl() argument
2462 rtw89_write_rf(rtwdev, path, RR_BBDC, RR_BBDC_SEL, 0x1); in _dpk_drf_direct_cntrl()
2464 rtw89_write_rf(rtwdev, path, RR_BBDC, RR_BBDC_SEL, 0x0); in _dpk_drf_direct_cntrl()
2474 u8 path; in _dpk_cal_select() local
2478 for (path = 0; path < RTW8852C_DPK_RF_PATH; path++) { in _dpk_cal_select()
2479 if (!(kpath & BIT(path))) in _dpk_cal_select()
2482 reloaded[path] = _dpk_reload_check(rtwdev, phy, path); in _dpk_cal_select()
2483 if (!reloaded[path] && dpk->bp[path][0].ch != 0) in _dpk_cal_select()
2484 dpk->cur_idx[path] = !dpk->cur_idx[path]; in _dpk_cal_select()
2486 _dpk_onoff(rtwdev, path, false); in _dpk_cal_select()
2489 for (path = 0; path < RTW8852C_DPK_RF_PATH; path++) in _dpk_cal_select()
2490 dpk->cur_idx[path] = 0; in _dpk_cal_select()
2493 for (path = 0; path < RTW8852C_DPK_RF_PATH; path++) { in _dpk_cal_select()
2496 path, dpk->cur_idx[path]); in _dpk_cal_select()
2497 _dpk_bkup_kip(rtwdev, kip_reg, kip_bkup, path); in _dpk_cal_select()
2498 _rfk_backup_rf_reg(rtwdev, backup_rf_val[path], path); in _dpk_cal_select()
2499 _dpk_information(rtwdev, phy, path); in _dpk_cal_select()
2500 _dpk_init(rtwdev, path); in _dpk_cal_select()
2501 if (rtwdev->is_tssi_mode[path]) in _dpk_cal_select()
2502 _dpk_tssi_pause(rtwdev, path, true); in _dpk_cal_select()
2505 for (path = 0; path < RTW8852C_DPK_RF_PATH; path++) { in _dpk_cal_select()
2508 path, dpk->cur_idx[path]); in _dpk_cal_select()
2509 rtw8852c_disable_rxagc(rtwdev, path, 0x0); in _dpk_cal_select()
2510 _dpk_drf_direct_cntrl(rtwdev, path, false); in _dpk_cal_select()
2511 _dpk_bb_afe_setting(rtwdev, phy, path, kpath); in _dpk_cal_select()
2512 is_fail = _dpk_main(rtwdev, phy, path, 1); in _dpk_cal_select()
2513 _dpk_onoff(rtwdev, path, is_fail); in _dpk_cal_select()
2516 for (path = 0; path < RTW8852C_DPK_RF_PATH; path++) { in _dpk_cal_select()
2519 path, dpk->cur_idx[path]); in _dpk_cal_select()
2520 _dpk_kip_restore(rtwdev, phy, path); in _dpk_cal_select()
2521 _dpk_reload_kip(rtwdev, kip_reg, kip_bkup, path); in _dpk_cal_select()
2522 _rfk_restore_rf_reg(rtwdev, backup_rf_val[path], path); in _dpk_cal_select()
2523 _dpk_bb_afe_restore(rtwdev, path); in _dpk_cal_select()
2524 rtw8852c_disable_rxagc(rtwdev, path, 0x1); in _dpk_cal_select()
2525 if (rtwdev->is_tssi_mode[path]) in _dpk_cal_select()
2526 _dpk_tssi_pause(rtwdev, path, false); in _dpk_cal_select()
2557 u8 path, kpath; in _dpk_force_bypass() local
2561 for (path = 0; path < RTW8852C_DPK_RF_PATH; path++) { in _dpk_force_bypass()
2562 if (kpath & BIT(path)) in _dpk_force_bypass()
2563 _dpk_onoff(rtwdev, path, true); in _dpk_force_bypass()
2584 enum rtw89_rf_path path, bool off) in _dpk_onoff() argument
2587 u8 val, kidx = dpk->cur_idx[path]; in _dpk_onoff()
2589 val = dpk->is_dpk_enable && !off && dpk->bp[path][kidx].path_ok ? in _dpk_onoff()
2590 dpk->bp[path][kidx].mdpd_en : 0; in _dpk_onoff()
2592 rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2), in _dpk_onoff()
2595 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d[%d] DPK %s !!!\n", path, in _dpk_onoff()
2602 u8 path, kidx; in _dpk_track() local
2609 for (path = 0; path < RTW8852C_DPK_RF_PATH; path++) { in _dpk_track()
2610 kidx = dpk->cur_idx[path]; in _dpk_track()
2613 path, kidx, dpk->bp[path][kidx].ch); in _dpk_track()
2616 rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB + (path << 13), 0x0000003f); in _dpk_track()
2618 rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB + (path << 13), MASKBYTE2); in _dpk_track()
2620 rtw89_phy_read32_mask(rtwdev, R_TXAGC_BTP + (path << 13), B_TXAGC_BTP); in _dpk_track()
2623 rtw89_phy_write32_mask(rtwdev, R_KIP_RPT + (path << 8), B_KIP_RPT_SEL, 0xf); in _dpk_track()
2625 rtw89_phy_read32_mask(rtwdev, R_RPT_PER + (path << 8), B_RPT_PER_TH); in _dpk_track()
2627 rtw89_phy_read32_mask(rtwdev, R_RPT_PER + (path << 8), B_RPT_PER_OF); in _dpk_track()
2629 rtw89_phy_read32_mask(rtwdev, R_RPT_PER + (path << 8), B_RPT_PER_TSSI); in _dpk_track()
2632 cur_ther = ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]); in _dpk_track()
2637 if (dpk->bp[path][kidx].ch != 0 && cur_ther != 0) in _dpk_track()
2638 delta_ther = dpk->bp[path][kidx].ther_dpk - cur_ther; in _dpk_track()
2644 delta_ther, cur_ther, dpk->bp[path][kidx].ther_dpk); in _dpk_track()
2647 txagc_rf - dpk->bp[path][kidx].txagc_dpk, txagc_rf, in _dpk_track()
2648 dpk->bp[path][kidx].txagc_dpk); in _dpk_track()
2661 rtw89_phy_write32_mask(rtwdev, R_DPD_BND + (path << 8) + (kidx << 2), in _dpk_track()
2668 enum rtw89_rf_path path) in _tssi_set_sys() argument
2675 if (path == RF_PATH_A) in _tssi_set_sys()
2686 enum rtw89_rf_path path) in _tssi_ini_txpwr_ctrl_bb() argument
2688 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _tssi_ini_txpwr_ctrl_bb()
2695 enum rtw89_rf_path path) in _tssi_ini_txpwr_ctrl_bb_he_tb() argument
2697 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _tssi_ini_txpwr_ctrl_bb_he_tb()
2703 enum rtw89_rf_path path) in _tssi_set_dck() argument
2708 if (path == RF_PATH_A) { in _tssi_set_dck()
2722 enum rtw89_rf_path path) in _tssi_set_bbgain_split() argument
2724 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _tssi_set_bbgain_split()
2730 enum rtw89_rf_path path) in _tssi_set_tmeter_tbl() argument
2812 if (path == RF_PATH_A) { in _tssi_set_tmeter_tbl()
2916 enum rtw89_rf_path path) in _tssi_slope_cal_org() argument
2921 if (path == RF_PATH_A) { in _tssi_slope_cal_org()
2933 enum rtw89_rf_path path) in _tssi_set_aligk_default() argument
2939 if (path == RF_PATH_A) { in _tssi_set_aligk_default()
2959 enum rtw89_rf_path path) in _tssi_set_slope() argument
2961 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _tssi_set_slope()
2967 enum rtw89_rf_path path) in _tssi_run_slope() argument
2969 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _tssi_run_slope()
2975 enum rtw89_rf_path path) in _tssi_set_track() argument
2977 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _tssi_set_track()
2984 enum rtw89_rf_path path) in _tssi_set_txagc_offset_mv_avg() argument
2986 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _tssi_set_txagc_offset_mv_avg()
2994 u32 i, path = RF_PATH_A, path_max = RF_PATH_NUM_8852C; in _tssi_enable() local
2998 path = RF_PATH_A; in _tssi_enable()
3001 path = RF_PATH_B; in _tssi_enable()
3006 for (i = path; i < path_max; i++) { in _tssi_enable()
3022 u32 i, path = RF_PATH_A, path_max = RF_PATH_NUM_8852C; in _tssi_disable() local
3026 path = RF_PATH_A; in _tssi_disable()
3029 path = RF_PATH_B; in _tssi_disable()
3034 for (i = path; i < path_max; i++) { in _tssi_disable()
3344 enum rtw89_rf_path path) in _tssi_get_ofdm_de() argument
3359 "[TSSI][TRIM]: path=%d mcs group_idx=0x%x\n", in _tssi_get_ofdm_de()
3360 path, gidx); in _tssi_get_ofdm_de()
3365 de_1st = tssi_info->tssi_mcs[path][gidx_1st]; in _tssi_get_ofdm_de()
3366 de_2nd = tssi_info->tssi_mcs[path][gidx_2nd]; in _tssi_get_ofdm_de()
3370 "[TSSI][TRIM]: path=%d mcs de=%d 1st=%d 2nd=%d\n", in _tssi_get_ofdm_de()
3371 path, val, de_1st, de_2nd); in _tssi_get_ofdm_de()
3373 val = tssi_info->tssi_mcs[path][gidx]; in _tssi_get_ofdm_de()
3376 "[TSSI][TRIM]: path=%d mcs de=%d\n", path, val); in _tssi_get_ofdm_de()
3382 "[TSSI][TRIM]: path=%d mcs group_idx=0x%x\n", in _tssi_get_ofdm_de()
3383 path, gidx); in _tssi_get_ofdm_de()
3388 de_1st = tssi_info->tssi_6g_mcs[path][gidx_1st]; in _tssi_get_ofdm_de()
3389 de_2nd = tssi_info->tssi_6g_mcs[path][gidx_2nd]; in _tssi_get_ofdm_de()
3393 "[TSSI][TRIM]: path=%d mcs de=%d 1st=%d 2nd=%d\n", in _tssi_get_ofdm_de()
3394 path, val, de_1st, de_2nd); in _tssi_get_ofdm_de()
3396 val = tssi_info->tssi_6g_mcs[path][gidx]; in _tssi_get_ofdm_de()
3399 "[TSSI][TRIM]: path=%d mcs de=%d\n", path, val); in _tssi_get_ofdm_de()
3408 enum rtw89_rf_path path) in _tssi_get_ofdm_trim_de() argument
3423 "[TSSI][TRIM]: path=%d mcs trim_group_idx=0x%x\n", in _tssi_get_ofdm_trim_de()
3424 path, tgidx); in _tssi_get_ofdm_trim_de()
3429 tde_1st = tssi_info->tssi_trim[path][tgidx_1st]; in _tssi_get_ofdm_trim_de()
3430 tde_2nd = tssi_info->tssi_trim[path][tgidx_2nd]; in _tssi_get_ofdm_trim_de()
3434 "[TSSI][TRIM]: path=%d mcs trim_de=%d 1st=%d 2nd=%d\n", in _tssi_get_ofdm_trim_de()
3435 path, val, tde_1st, tde_2nd); in _tssi_get_ofdm_trim_de()
3437 val = tssi_info->tssi_trim[path][tgidx]; in _tssi_get_ofdm_trim_de()
3440 "[TSSI][TRIM]: path=%d mcs trim_de=%d\n", in _tssi_get_ofdm_trim_de()
3441 path, val); in _tssi_get_ofdm_trim_de()
3447 "[TSSI][TRIM]: path=%d mcs trim_group_idx=0x%x\n", in _tssi_get_ofdm_trim_de()
3448 path, tgidx); in _tssi_get_ofdm_trim_de()
3453 tde_1st = tssi_info->tssi_trim_6g[path][tgidx_1st]; in _tssi_get_ofdm_trim_de()
3454 tde_2nd = tssi_info->tssi_trim_6g[path][tgidx_2nd]; in _tssi_get_ofdm_trim_de()
3458 "[TSSI][TRIM]: path=%d mcs trim_de=%d 1st=%d 2nd=%d\n", in _tssi_get_ofdm_trim_de()
3459 path, val, tde_1st, tde_2nd); in _tssi_get_ofdm_trim_de()
3461 val = tssi_info->tssi_trim_6g[path][tgidx]; in _tssi_get_ofdm_trim_de()
3464 "[TSSI][TRIM]: path=%d mcs trim_de=%d\n", in _tssi_get_ofdm_trim_de()
3465 path, val); in _tssi_get_ofdm_trim_de()
3482 u32 i, path = RF_PATH_A, path_max = RF_PATH_NUM_8852C; in _tssi_set_efuse_to_de() local
3489 path = RF_PATH_A; in _tssi_set_efuse_to_de()
3492 path = RF_PATH_B; in _tssi_set_efuse_to_de()
3497 for (i = path; i < path_max; i++) { in _tssi_set_efuse_to_de()
3503 "[TSSI][TRIM]: path=%d cck[%d]=0x%x trim=0x%x\n", in _tssi_set_efuse_to_de()
3520 "[TSSI][TRIM]: path=%d mcs=0x%x trim=0x%x\n", in _tssi_set_efuse_to_de()
3539 enum rtw89_rf_path path) in rtw8852c_tssi_cont_en() argument
3545 rtw89_phy_write32_mask(rtwdev, tssi_trk[path], BIT(30), 0x0); in rtw8852c_tssi_cont_en()
3546 rtw89_phy_write32_mask(rtwdev, tssi_en[path], BIT(31), 0x0); in rtw8852c_tssi_cont_en()
3547 if (rtwdev->dbcc_en && path == RF_PATH_B) in rtw8852c_tssi_cont_en()
3552 rtw89_phy_write32_mask(rtwdev, tssi_trk[path], BIT(30), 0x1); in rtw8852c_tssi_cont_en()
3553 rtw89_phy_write32_mask(rtwdev, tssi_en[path], BIT(31), 0x1); in rtw8852c_tssi_cont_en()
3570 static void _bw_setting(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, in _bw_setting() argument
3582 rf_reg18 = rtw89_read_rf(rtwdev, path, reg_reg18_addr, RFREG_MASK); in _bw_setting()
3590 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 | (path << 8), B_P0_CFCH_BW0, 0x3); in _bw_setting()
3591 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1 | (path << 8), B_P0_CFCH_BW1, 0xf); in _bw_setting()
3595 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 | (path << 8), B_P0_CFCH_BW0, 0x3); in _bw_setting()
3596 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1 | (path << 8), B_P0_CFCH_BW1, 0xf); in _bw_setting()
3600 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 | (path << 8), B_P0_CFCH_BW0, 0x2); in _bw_setting()
3601 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1 | (path << 8), B_P0_CFCH_BW1, 0xd); in _bw_setting()
3605 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 | (path << 8), B_P0_CFCH_BW0, 0x1); in _bw_setting()
3606 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1 | (path << 8), B_P0_CFCH_BW1, 0xb); in _bw_setting()
3612 rtw89_write_rf(rtwdev, path, reg_reg18_addr, RFREG_MASK, rf_reg18); in _bw_setting()
3619 u8 kpath, path; in _ctrl_bw() local
3625 for (path = 0; path < 2; path++) { in _ctrl_bw()
3626 if (!(kpath & BIT(path))) in _ctrl_bw()
3630 _bw_setting(rtwdev, path, bw, is_dav); in _ctrl_bw()
3632 _bw_setting(rtwdev, path, bw, is_dav); in _ctrl_bw()
3636 if (path == RF_PATH_B && rtwdev->hal.cv == CHIP_CAV) { in _ctrl_bw()
3647 static void _ch_setting(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, in _ch_setting() argument
3659 rf_reg18 = rtw89_read_rf(rtwdev, path, reg_reg18_addr, RFREG_MASK); in _ch_setting()
3679 rtw89_write_rf(rtwdev, path, reg_reg18_addr, RFREG_MASK, rf_reg18); in _ch_setting()
3686 u8 kpath, path; in _ctrl_ch() local
3701 for (path = 0; path < 2; path++) { in _ctrl_ch()
3702 if (kpath & BIT(path)) { in _ctrl_ch()
3703 _ch_setting(rtwdev, path, central_ch, band, true); in _ctrl_ch()
3704 _ch_setting(rtwdev, path, central_ch, band, false); in _ctrl_ch()
3713 u8 path; in _rxbb_bw() local
3717 for (path = 0; path < 2; path++) { in _rxbb_bw()
3718 if (!(kpath & BIT(path))) in _rxbb_bw()
3721 rtw89_write_rf(rtwdev, path, RR_LUTWE2, RR_LUTWE2_RTXBW, 0x1); in _rxbb_bw()
3722 rtw89_write_rf(rtwdev, path, RR_LUTWA, RR_LUTWA_M2, 0xa); in _rxbb_bw()
3738 rtw89_write_rf(rtwdev, path, RR_LUTWD0, RR_LUTWD0_LB, val); in _rxbb_bw()
3739 rtw89_write_rf(rtwdev, path, RR_LUTWE2, RR_LUTWE2_RTXBW, 0x0); in _rxbb_bw()
3746 int path; in _lck_keep_thermal() local
3748 for (path = 0; path < rtwdev->chip->rf_path_num; path++) { in _lck_keep_thermal()
3749 lck->thermal[path] = in _lck_keep_thermal()
3750 ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]); in _lck_keep_thermal()
3752 "[LCK] path=%d thermal=0x%x", path, lck->thermal[path]); in _lck_keep_thermal()
3759 int path = rtwdev->dbcc_en ? 2 : 1; in _lck() local
3767 for (i = 0; i < path; i++) { in _lck()
3783 int path; in rtw8852c_lck_track() local
3785 for (path = 0; path < rtwdev->chip->rf_path_num; path++) { in rtw8852c_lck_track()
3787 ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]); in rtw8852c_lck_track()
3788 delta = abs((int)cur_thermal - lck->thermal[path]); in rtw8852c_lck_track()
3791 "[LCK] path=%d current thermal=0x%x delta=0x%x\n", in rtw8852c_lck_track()
3792 path, cur_thermal, delta); in rtw8852c_lck_track()
3846 u8 path; in rtw8852c_rck() local
3848 for (path = 0; path < 2; path++) in rtw8852c_rck()
3849 _rck(rtwdev, path); in rtw8852c_rck()
3882 u8 path, kpath; in rtw8852c_rx_dck() local
3890 for (path = 0; path < 2; path++) { in rtw8852c_rx_dck()
3891 rf_reg5 = rtw89_read_rf(rtwdev, path, RR_RSV1, RFREG_MASK); in rtw8852c_rx_dck()
3892 if (!(kpath & BIT(path))) in rtw8852c_rx_dck()
3895 if (rtwdev->is_tssi_mode[path]) in rtw8852c_rx_dck()
3896 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK + (path << 13), in rtw8852c_rx_dck()
3898 rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); in rtw8852c_rx_dck()
3899 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RR_MOD_V_RX); in rtw8852c_rx_dck()
3900 _set_rx_dck(rtwdev, phy, path, is_afe); in rtw8852c_rx_dck()
3901 rx_dck->thermal[path] = ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]); in rtw8852c_rx_dck()
3902 rtw89_write_rf(rtwdev, path, RR_RSV1, RFREG_MASK, rf_reg5); in rtw8852c_rx_dck()
3904 if (rtwdev->is_tssi_mode[path]) in rtw8852c_rx_dck()
3905 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK + (path << 13), in rtw8852c_rx_dck()
3917 int path; in rtw8852c_rx_dck_track() local
3919 for (path = 0; path < RF_PATH_NUM_8852C; path++) { in rtw8852c_rx_dck_track()
3921 ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]); in rtw8852c_rx_dck_track()
3922 delta = abs((int)cur_thermal - rx_dck->thermal[path]); in rtw8852c_rx_dck_track()
3925 "[RX_DCK] path=%d current thermal=0x%x delta=0x%x\n", in rtw8852c_rx_dck_track()
3926 path, cur_thermal, delta); in rtw8852c_rx_dck_track()
3959 u32 i, path = RF_PATH_A, path_max = RF_PATH_NUM_8852C; in rtw8852c_tssi() local
3965 path = RF_PATH_A; in rtw8852c_tssi()
3968 path = RF_PATH_B; in rtw8852c_tssi()
3975 for (i = path; i < path_max; i++) { in rtw8852c_tssi()
3994 u32 i, path = RF_PATH_A, path_max = RF_PATH_NUM_8852C; in rtw8852c_tssi_scan() local
4006 path = RF_PATH_A; in rtw8852c_tssi_scan()
4009 path = RF_PATH_B; in rtw8852c_tssi_scan()
4016 for (i = path; i < path_max; i++) { in rtw8852c_tssi_scan()