Lines Matching refs:rtwdev
160 static void rtw8852c_ctrl_btg(struct rtw89_dev *rtwdev, bool btg);
161 static void rtw8852c_ctrl_tx_path_tmac(struct rtw89_dev *rtwdev, u8 tx_path,
164 static int rtw8852c_pwr_on_func(struct rtw89_dev *rtwdev) in rtw8852c_pwr_on_func() argument
169 val32 = rtw89_read32_mask(rtwdev, R_AX_SYS_STATUS1, B_AX_PAD_HCI_SEL_V2_MASK); in rtw8852c_pwr_on_func()
171 rtw89_write32_set(rtwdev, R_AX_LDO_AON_CTRL0, B_AX_PD_REGU_L); in rtw8852c_pwr_on_func()
173 rtw89_write32_clr(rtwdev, R_AX_SYS_PW_CTRL, B_AX_AFSM_WLSUS_EN | in rtw8852c_pwr_on_func()
175 rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_DIS_WLBT_PDNSUSEN_SOPC); in rtw8852c_pwr_on_func()
176 rtw89_write32_set(rtwdev, R_AX_WLLPS_CTRL, B_AX_DIS_WLBT_LPSEN_LOPC); in rtw8852c_pwr_on_func()
177 rtw89_write32_clr(rtwdev, R_AX_SYS_PW_CTRL, B_AX_APDM_HPDN); in rtw8852c_pwr_on_func()
178 rtw89_write32_clr(rtwdev, R_AX_SYS_PW_CTRL, B_AX_APFM_SWLPS); in rtw8852c_pwr_on_func()
181 1000, 20000, false, rtwdev, R_AX_SYS_PW_CTRL); in rtw8852c_pwr_on_func()
185 rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_EN_WLON); in rtw8852c_pwr_on_func()
186 rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_APFN_ONMAC); in rtw8852c_pwr_on_func()
189 1000, 20000, false, rtwdev, R_AX_SYS_PW_CTRL); in rtw8852c_pwr_on_func()
193 rtw89_write8_set(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_PLATFORM_EN); in rtw8852c_pwr_on_func()
194 rtw89_write8_clr(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_PLATFORM_EN); in rtw8852c_pwr_on_func()
195 rtw89_write8_set(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_PLATFORM_EN); in rtw8852c_pwr_on_func()
196 rtw89_write8_clr(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_PLATFORM_EN); in rtw8852c_pwr_on_func()
198 rtw89_write8_set(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_PLATFORM_EN); in rtw8852c_pwr_on_func()
199 rtw89_write32_clr(rtwdev, R_AX_SYS_SDIO_CTRL, B_AX_PCIE_CALIB_EN_V1); in rtw8852c_pwr_on_func()
201 rtw89_write32_clr(rtwdev, R_AX_SYS_ISO_CTRL_EXTEND, B_AX_CMAC1_FEN); in rtw8852c_pwr_on_func()
202 rtw89_write32_set(rtwdev, R_AX_SYS_ISO_CTRL_EXTEND, B_AX_R_SYM_ISO_CMAC12PP); in rtw8852c_pwr_on_func()
203 rtw89_write32_clr(rtwdev, R_AX_AFE_CTRL1, B_AX_R_SYM_WLCMAC1_P4_PC_EN | in rtw8852c_pwr_on_func()
208 rtw89_write32_set(rtwdev, R_AX_SYS_ADIE_PAD_PWR_CTRL, B_AX_SYM_PADPDN_WL_PTA_1P3); in rtw8852c_pwr_on_func()
210 ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, in rtw8852c_pwr_on_func()
215 rtw89_write32_set(rtwdev, R_AX_SYS_ADIE_PAD_PWR_CTRL, B_AX_SYM_PADPDN_WL_RFC_1P3); in rtw8852c_pwr_on_func()
217 ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, in rtw8852c_pwr_on_func()
221 ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, XTAL_SI_OFF_WEI, in rtw8852c_pwr_on_func()
225 ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, XTAL_SI_OFF_EI, in rtw8852c_pwr_on_func()
229 ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_RFC2RF); in rtw8852c_pwr_on_func()
232 ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, XTAL_SI_PON_WEI, in rtw8852c_pwr_on_func()
236 ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, XTAL_SI_PON_EI, in rtw8852c_pwr_on_func()
240 ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_SRAM2RFC); in rtw8852c_pwr_on_func()
243 ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_XTAL_XMD_2, 0, XTAL_SI_LDO_LPS); in rtw8852c_pwr_on_func()
246 ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_XTAL_XMD_4, 0, XTAL_SI_LPS_CAP); in rtw8852c_pwr_on_func()
250 rtw89_write32_set(rtwdev, R_AX_PMC_DBG_CTRL2, B_AX_SYSON_DIS_PMCR_AX_WRMSK); in rtw8852c_pwr_on_func()
251 rtw89_write32_set(rtwdev, R_AX_SYS_ISO_CTRL, B_AX_ISO_EB2CORE); in rtw8852c_pwr_on_func()
252 rtw89_write32_clr(rtwdev, R_AX_SYS_ISO_CTRL, B_AX_PWC_EV2EF_B15); in rtw8852c_pwr_on_func()
256 rtw89_write32_clr(rtwdev, R_AX_SYS_ISO_CTRL, B_AX_PWC_EV2EF_B14); in rtw8852c_pwr_on_func()
257 rtw89_write32_clr(rtwdev, R_AX_PMC_DBG_CTRL2, B_AX_SYSON_DIS_PMCR_AX_WRMSK); in rtw8852c_pwr_on_func()
258 rtw89_write32_set(rtwdev, R_AX_GPIO0_15_EECS_EESK_LED1_PULL_LOW_EN, in rtw8852c_pwr_on_func()
262 rtw89_write32_set(rtwdev, R_AX_DMAC_FUNC_EN, in rtw8852c_pwr_on_func()
270 rtw89_write32_set(rtwdev, R_AX_CMAC_FUNC_EN, in rtw8852c_pwr_on_func()
279 static int rtw8852c_pwr_off_func(struct rtw89_dev *rtwdev) in rtw8852c_pwr_off_func() argument
284 ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, XTAL_SI_RFC2RF, in rtw8852c_pwr_off_func()
288 ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_OFF_EI); in rtw8852c_pwr_off_func()
291 ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_OFF_WEI); in rtw8852c_pwr_off_func()
294 ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_WL_RFC_S0, 0, XTAL_SI_RF00); in rtw8852c_pwr_off_func()
297 ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_WL_RFC_S1, 0, XTAL_SI_RF10); in rtw8852c_pwr_off_func()
300 ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, XTAL_SI_SRAM2RFC, in rtw8852c_pwr_off_func()
304 ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_PON_EI); in rtw8852c_pwr_off_func()
307 ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_PON_WEI); in rtw8852c_pwr_off_func()
311 rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_EN_WLON); in rtw8852c_pwr_off_func()
312 rtw89_write8_clr(rtwdev, R_AX_SYS_FUNC_EN, B_AX_FEN_BB_GLB_RSTN | B_AX_FEN_BBRSTB); in rtw8852c_pwr_off_func()
313 rtw89_write32_clr(rtwdev, R_AX_SYS_ISO_CTRL_EXTEND, in rtw8852c_pwr_off_func()
315 rtw89_write32_clr(rtwdev, R_AX_SYS_ADIE_PAD_PWR_CTRL, B_AX_SYM_PADPDN_WL_RFC_1P3); in rtw8852c_pwr_off_func()
317 ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_SHDN_WL); in rtw8852c_pwr_off_func()
321 rtw89_write32_clr(rtwdev, R_AX_SYS_ADIE_PAD_PWR_CTRL, B_AX_SYM_PADPDN_WL_PTA_1P3); in rtw8852c_pwr_off_func()
323 ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_GND_SHDN_WL); in rtw8852c_pwr_off_func()
327 rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_APFM_OFFMAC); in rtw8852c_pwr_off_func()
330 1000, 20000, false, rtwdev, R_AX_SYS_PW_CTRL); in rtw8852c_pwr_off_func()
334 rtw89_write32(rtwdev, R_AX_WLLPS_CTRL, 0x0001A0B0); in rtw8852c_pwr_off_func()
335 rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_XTAL_OFF_A_DIE); in rtw8852c_pwr_off_func()
336 rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_APFM_SWLPS); in rtw8852c_pwr_off_func()
349 static void rtw8852c_efuse_parsing_tssi(struct rtw89_dev *rtwdev, in rtw8852c_efuse_parsing_tssi() argument
352 struct rtw89_tssi_info *tssi = &rtwdev->tssi; in rtw8852c_efuse_parsing_tssi()
365 rtw89_debug(rtwdev, RTW89_DBG_TSSI, in rtw8852c_efuse_parsing_tssi()
377 rtw89_debug(rtwdev, RTW89_DBG_TSSI, in rtw8852c_efuse_parsing_tssi()
393 static void rtw8852c_efuse_parsing_gain_offset(struct rtw89_dev *rtwdev, in rtw8852c_efuse_parsing_gain_offset() argument
396 struct rtw89_phy_efuse_gain *gain = &rtwdev->efuse_gain; in rtw8852c_efuse_parsing_gain_offset()
418 static int rtw8852c_read_efuse(struct rtw89_dev *rtwdev, u8 *log_map) in rtw8852c_read_efuse() argument
420 struct rtw89_efuse *efuse = &rtwdev->efuse; in rtw8852c_read_efuse()
427 rtw8852c_efuse_parsing_tssi(rtwdev, map); in rtw8852c_read_efuse()
428 rtw8852c_efuse_parsing_gain_offset(rtwdev, map); in rtw8852c_read_efuse()
430 switch (rtwdev->hci.type) { in rtw8852c_read_efuse()
438 rtw89_info(rtwdev, "chip rfe_type is %d\n", efuse->rfe_type); in rtw8852c_read_efuse()
443 static void rtw8852c_phycap_parsing_tssi(struct rtw89_dev *rtwdev, u8 *phycap_map) in rtw8852c_phycap_parsing_tssi() argument
445 struct rtw89_tssi_info *tssi = &rtwdev->tssi; in rtw8852c_phycap_parsing_tssi()
448 u32 addr = rtwdev->chip->phycap_addr; in rtw8852c_phycap_parsing_tssi()
476 rtw89_debug(rtwdev, RTW89_DBG_TSSI, in rtw8852c_phycap_parsing_tssi()
482 rtw89_debug(rtwdev, RTW89_DBG_TSSI, in rtw8852c_phycap_parsing_tssi()
488 static void rtw8852c_phycap_parsing_thermal_trim(struct rtw89_dev *rtwdev, in rtw8852c_phycap_parsing_thermal_trim() argument
491 struct rtw89_power_trim_info *info = &rtwdev->pwr_trim; in rtw8852c_phycap_parsing_thermal_trim()
493 u32 addr = rtwdev->chip->phycap_addr; in rtw8852c_phycap_parsing_thermal_trim()
499 rtw89_debug(rtwdev, RTW89_DBG_RFK, in rtw8852c_phycap_parsing_thermal_trim()
508 static void rtw8852c_thermal_trim(struct rtw89_dev *rtwdev) in rtw8852c_thermal_trim() argument
515 struct rtw89_power_trim_info *info = &rtwdev->pwr_trim; in rtw8852c_thermal_trim()
519 rtw89_debug(rtwdev, RTW89_DBG_RFK, in rtw8852c_thermal_trim()
527 rtw89_write_rf(rtwdev, i, RR_TM2, RR_TM2_OFF, val); in rtw8852c_thermal_trim()
529 rtw89_debug(rtwdev, RTW89_DBG_RFK, in rtw8852c_thermal_trim()
536 static void rtw8852c_phycap_parsing_pa_bias_trim(struct rtw89_dev *rtwdev, in rtw8852c_phycap_parsing_pa_bias_trim() argument
539 struct rtw89_power_trim_info *info = &rtwdev->pwr_trim; in rtw8852c_phycap_parsing_pa_bias_trim()
541 u32 addr = rtwdev->chip->phycap_addr; in rtw8852c_phycap_parsing_pa_bias_trim()
547 rtw89_debug(rtwdev, RTW89_DBG_RFK, in rtw8852c_phycap_parsing_pa_bias_trim()
556 static void rtw8852c_pa_bias_trim(struct rtw89_dev *rtwdev) in rtw8852c_pa_bias_trim() argument
558 struct rtw89_power_trim_info *info = &rtwdev->pwr_trim; in rtw8852c_pa_bias_trim()
563 rtw89_debug(rtwdev, RTW89_DBG_RFK, in rtw8852c_pa_bias_trim()
573 rtw89_debug(rtwdev, RTW89_DBG_RFK, in rtw8852c_pa_bias_trim()
577 rtw89_write_rf(rtwdev, i, RR_BIASA, RR_BIASA_TXG, pabias_2g); in rtw8852c_pa_bias_trim()
578 rtw89_write_rf(rtwdev, i, RR_BIASA, RR_BIASA_TXA, pabias_5g); in rtw8852c_pa_bias_trim()
582 static int rtw8852c_read_phycap(struct rtw89_dev *rtwdev, u8 *phycap_map) in rtw8852c_read_phycap() argument
584 rtw8852c_phycap_parsing_tssi(rtwdev, phycap_map); in rtw8852c_read_phycap()
585 rtw8852c_phycap_parsing_thermal_trim(rtwdev, phycap_map); in rtw8852c_read_phycap()
586 rtw8852c_phycap_parsing_pa_bias_trim(rtwdev, phycap_map); in rtw8852c_read_phycap()
591 static void rtw8852c_power_trim(struct rtw89_dev *rtwdev) in rtw8852c_power_trim() argument
593 rtw8852c_thermal_trim(rtwdev); in rtw8852c_power_trim()
594 rtw8852c_pa_bias_trim(rtwdev); in rtw8852c_power_trim()
597 static void rtw8852c_set_channel_mac(struct rtw89_dev *rtwdev, in rtw8852c_set_channel_mac() argument
611 txsc80 = rtw89_phy_get_txsc(rtwdev, chan, in rtw8852c_set_channel_mac()
615 txsc40 = rtw89_phy_get_txsc(rtwdev, chan, in rtw8852c_set_channel_mac()
619 txsc20 = rtw89_phy_get_txsc(rtwdev, chan, in rtw8852c_set_channel_mac()
648 rtw89_write8_mask(rtwdev, rf_mod, B_AX_WMAC_RFMOD_MASK, rf_mod_val); in rtw8852c_set_channel_mac()
649 rtw89_write32(rtwdev, sub_carr, txsc); in rtw8852c_set_channel_mac()
660 rtw89_warn(rtwdev, "Invalid band_type:%d\n", chan->band_type); in rtw8852c_set_channel_mac()
663 rtw89_write8_clr(rtwdev, chk_rate, B_AX_BAND_MODE | B_AX_CHECK_CCK_EN | in rtw8852c_set_channel_mac()
665 rtw89_write8_set(rtwdev, chk_rate, chk_rate_mask); in rtw8852c_set_channel_mac()
678 static int rtw8852c_ctrl_sco_cck(struct rtw89_dev *rtwdev, u8 central_ch, in rtw8852c_ctrl_sco_cck() argument
691 rtw89_warn(rtwdev, "Invalid BW:%d for CCK\n", bw); in rtw8852c_ctrl_sco_cck()
694 rtw89_phy_write32_mask(rtwdev, R_BK_FC0_INV_V1, B_BK_FC0_INV_MSK_V1, in rtw8852c_ctrl_sco_cck()
696 rtw89_phy_write32_mask(rtwdev, R_CCK_FC0_INV_V1, B_CCK_FC0_INV_MSK_V1, in rtw8852c_ctrl_sco_cck()
816 static void rtw8852c_set_gain_error(struct rtw89_dev *rtwdev, in rtw8852c_set_gain_error() argument
820 const struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain; in rtw8852c_set_gain_error()
835 rtw89_phy_write32_mask(rtwdev, reg, mask, val); in rtw8852c_set_gain_error()
846 rtw89_phy_write32_mask(rtwdev, reg, mask, val); in rtw8852c_set_gain_error()
852 rtw89_phy_write32_mask(rtwdev, reg, mask, val); in rtw8852c_set_gain_error()
857 rtw89_phy_write32_mask(rtwdev, reg, mask, val); in rtw8852c_set_gain_error()
865 rtw89_phy_write32_mask(rtwdev, reg, mask, val); in rtw8852c_set_gain_error()
876 rtw89_phy_write32_mask(rtwdev, reg, mask, val); in rtw8852c_set_gain_error()
893 static u8 rtw8852c_encode_chan_idx(struct rtw89_dev *rtwdev, u8 central_ch, u8 band) in rtw8852c_encode_chan_idx() argument
913 rtw89_warn(rtwdev, "Unsupported band %d\n", band); in rtw8852c_encode_chan_idx()
922 rtw89_warn(rtwdev, "Unknown band %d channel %d\n", band, central_ch); in rtw8852c_encode_chan_idx()
932 static void rtw8852c_decode_chan_idx(struct rtw89_dev *rtwdev, u8 chan_idx, in rtw8852c_decode_chan_idx() argument
950 static void rtw8852c_set_gain_offset(struct rtw89_dev *rtwdev, in rtw8852c_set_gain_offset() argument
959 struct rtw89_phy_efuse_gain *efuse_gain = &rtwdev->efuse_gain; in rtw8852c_set_gain_offset()
967 if (rtwdev->dbcc_en && path == RF_PATH_B) in rtw8852c_set_gain_offset()
976 rtw89_phy_write32_mask(rtwdev, R_RPL_OFST, B_RPL_OFST_MASK, tmp & 0x7f); in rtw8852c_set_gain_offset()
1000 rtw89_phy_write32_mask(rtwdev, rssi_ofst_addr[path], B_PATH0_R_G_OFST_MASK, tmp & 0xff); in rtw8852c_set_gain_offset()
1003 rtw89_phy_write32_idx(rtwdev, R_RPL_PATHAB, rpl_mask[path], tmp & 0xff, phy_idx); in rtw8852c_set_gain_offset()
1004 rtw89_phy_write32_idx(rtwdev, R_RSSI_M_PATHAB, rpl_tb_mask[path], tmp & 0xff, phy_idx); in rtw8852c_set_gain_offset()
1007 static void rtw8852c_ctrl_ch(struct rtw89_dev *rtwdev, in rtw8852c_ctrl_ch() argument
1020 rtw89_warn(rtwdev, "Invalid central_freq\n"); in rtw8852c_ctrl_ch()
1026 rtw8852c_set_gain_error(rtwdev, subband, RF_PATH_A); in rtw8852c_ctrl_ch()
1027 rtw8852c_set_gain_offset(rtwdev, chan, phy_idx, RF_PATH_A); in rtw8852c_ctrl_ch()
1030 rtw89_phy_write32_idx(rtwdev, R_PATH0_BAND_SEL_V1, in rtw8852c_ctrl_ch()
1034 rtw89_phy_write32_idx(rtwdev, R_PATH0_BAND_SEL_V1, in rtw8852c_ctrl_ch()
1038 if (!rtwdev->dbcc_en) { in rtw8852c_ctrl_ch()
1039 rtw8852c_set_gain_error(rtwdev, subband, RF_PATH_B); in rtw8852c_ctrl_ch()
1040 rtw8852c_set_gain_offset(rtwdev, chan, phy_idx, RF_PATH_B); in rtw8852c_ctrl_ch()
1043 rtw89_phy_write32_idx(rtwdev, in rtw8852c_ctrl_ch()
1048 rtw89_phy_write32_idx(rtwdev, in rtw8852c_ctrl_ch()
1052 rtw89_phy_write32_clr(rtwdev, R_2P4G_BAND, B_2P4G_BAND_SEL); in rtw8852c_ctrl_ch()
1055 rtw89_phy_write32_clr(rtwdev, R_2P4G_BAND, B_2P4G_BAND_SEL); in rtw8852c_ctrl_ch()
1057 rtw89_phy_write32_set(rtwdev, R_2P4G_BAND, B_2P4G_BAND_SEL); in rtw8852c_ctrl_ch()
1060 rtw89_phy_write32_idx(rtwdev, R_FC0_V1, B_FC0_MSK_V1, in rtw8852c_ctrl_ch()
1064 rtw89_phy_write32_idx(rtwdev, R_FC0_BW, B_FC0_BW_INV, sco, in rtw8852c_ctrl_ch()
1068 rtw8852c_set_gain_error(rtwdev, subband, RF_PATH_B); in rtw8852c_ctrl_ch()
1069 rtw8852c_set_gain_offset(rtwdev, chan, phy_idx, RF_PATH_B); in rtw8852c_ctrl_ch()
1072 rtw89_phy_write32_idx(rtwdev, R_PATH1_BAND_SEL_V1, in rtw8852c_ctrl_ch()
1076 rtw89_phy_write32_idx(rtwdev, R_PATH1_BAND_SEL_V1, in rtw8852c_ctrl_ch()
1080 rtw89_phy_write32_idx(rtwdev, R_FC0_V1, B_FC0_MSK_V1, in rtw8852c_ctrl_ch()
1084 rtw89_phy_write32_idx(rtwdev, R_FC0_BW, B_FC0_BW_INV, sco, in rtw8852c_ctrl_ch()
1090 rtw89_phy_write32_mask(rtwdev, R_PCOEFF0_V1, in rtw8852c_ctrl_ch()
1092 rtw89_phy_write32_mask(rtwdev, R_PCOEFF2_V1, in rtw8852c_ctrl_ch()
1094 rtw89_phy_write32_mask(rtwdev, R_PCOEFF4_V1, in rtw8852c_ctrl_ch()
1096 rtw89_phy_write32_mask(rtwdev, R_PCOEFF6_V1, in rtw8852c_ctrl_ch()
1098 rtw89_phy_write32_mask(rtwdev, R_PCOEFF8_V1, in rtw8852c_ctrl_ch()
1100 rtw89_phy_write32_mask(rtwdev, R_PCOEFFA_V1, in rtw8852c_ctrl_ch()
1102 rtw89_phy_write32_mask(rtwdev, R_PCOEFFC_V1, in rtw8852c_ctrl_ch()
1104 rtw89_phy_write32_mask(rtwdev, R_PCOEFFE_V1, in rtw8852c_ctrl_ch()
1107 rtw89_phy_write32_mask(rtwdev, R_PCOEFF0_V1, in rtw8852c_ctrl_ch()
1109 rtw89_phy_write32_mask(rtwdev, R_PCOEFF2_V1, in rtw8852c_ctrl_ch()
1111 rtw89_phy_write32_mask(rtwdev, R_PCOEFF4_V1, in rtw8852c_ctrl_ch()
1113 rtw89_phy_write32_mask(rtwdev, R_PCOEFF6_V1, in rtw8852c_ctrl_ch()
1115 rtw89_phy_write32_mask(rtwdev, R_PCOEFF8_V1, in rtw8852c_ctrl_ch()
1117 rtw89_phy_write32_mask(rtwdev, R_PCOEFFA_V1, in rtw8852c_ctrl_ch()
1119 rtw89_phy_write32_mask(rtwdev, R_PCOEFFC_V1, in rtw8852c_ctrl_ch()
1121 rtw89_phy_write32_mask(rtwdev, R_PCOEFFE_V1, in rtw8852c_ctrl_ch()
1126 chan_idx = rtw8852c_encode_chan_idx(rtwdev, chan->primary_channel, band); in rtw8852c_ctrl_ch()
1127 rtw89_phy_write32_idx(rtwdev, R_MAC_PIN_SEL, B_CH_IDX_SEG0, chan_idx, phy_idx); in rtw8852c_ctrl_ch()
1130 static void rtw8852c_bw_setting(struct rtw89_dev *rtwdev, u8 bw, u8 path) in rtw8852c_bw_setting() argument
1137 rtw89_phy_write32_mask(rtwdev, adc_sel[path], 0x6000, 0x1); in rtw8852c_bw_setting()
1138 rtw89_phy_write32_mask(rtwdev, wbadc_sel[path], 0x30, 0x0); in rtw8852c_bw_setting()
1141 rtw89_phy_write32_mask(rtwdev, adc_sel[path], 0x6000, 0x2); in rtw8852c_bw_setting()
1142 rtw89_phy_write32_mask(rtwdev, wbadc_sel[path], 0x30, 0x1); in rtw8852c_bw_setting()
1148 rtw89_phy_write32_mask(rtwdev, adc_sel[path], 0x6000, 0x0); in rtw8852c_bw_setting()
1149 rtw89_phy_write32_mask(rtwdev, wbadc_sel[path], 0x30, 0x2); in rtw8852c_bw_setting()
1152 rtw89_warn(rtwdev, "Fail to set ADC\n"); in rtw8852c_bw_setting()
1156 static void rtw8852c_edcca_per20_bitmap_sifs(struct rtw89_dev *rtwdev, u8 bw, in rtw8852c_edcca_per20_bitmap_sifs() argument
1160 rtw89_phy_write32_idx(rtwdev, R_SNDCCA_A1, B_SNDCCA_A1_EN, 0xff, phy_idx); in rtw8852c_edcca_per20_bitmap_sifs()
1161 rtw89_phy_write32_idx(rtwdev, R_SNDCCA_A2, B_SNDCCA_A2_VAL, 0, phy_idx); in rtw8852c_edcca_per20_bitmap_sifs()
1163 rtw89_phy_write32_idx(rtwdev, R_SNDCCA_A1, B_SNDCCA_A1_EN, 0, phy_idx); in rtw8852c_edcca_per20_bitmap_sifs()
1164 rtw89_phy_write32_idx(rtwdev, R_SNDCCA_A2, B_SNDCCA_A2_VAL, 0, phy_idx); in rtw8852c_edcca_per20_bitmap_sifs()
1169 rtw8852c_ctrl_bw(struct rtw89_dev *rtwdev, u8 pri_ch, u8 bw, in rtw8852c_ctrl_bw() argument
1184 rtw89_phy_write32_idx(rtwdev, R_FC0_BW, B_FC0_BW_SET, 0x0, in rtw8852c_ctrl_bw()
1186 rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD, B_CHBW_MOD_SBW, in rtw8852c_ctrl_bw()
1188 rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD, B_CHBW_MOD_PRICH, 0x0, in rtw8852c_ctrl_bw()
1190 rtw89_phy_write32_mask(rtwdev, R_PATH0_SAMPL_DLY_T_V1, in rtw8852c_ctrl_bw()
1192 rtw89_phy_write32_mask(rtwdev, R_PATH1_SAMPL_DLY_T_V1, in rtw8852c_ctrl_bw()
1194 rtw89_phy_write32_mask(rtwdev, R_PATH0_BW_SEL_V1, in rtw8852c_ctrl_bw()
1196 rtw89_phy_write32_mask(rtwdev, R_PATH1_BW_SEL_V1, in rtw8852c_ctrl_bw()
1200 rtw89_phy_write32_idx(rtwdev, R_FC0_BW, B_FC0_BW_SET, 0x1, in rtw8852c_ctrl_bw()
1202 rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD, B_CHBW_MOD_SBW, 0x0, in rtw8852c_ctrl_bw()
1204 rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD, B_CHBW_MOD_PRICH, in rtw8852c_ctrl_bw()
1207 rtw89_phy_write32_mask(rtwdev, R_PATH0_SAMPL_DLY_T_V1, in rtw8852c_ctrl_bw()
1209 rtw89_phy_write32_mask(rtwdev, R_PATH1_SAMPL_DLY_T_V1, in rtw8852c_ctrl_bw()
1211 rtw89_phy_write32_mask(rtwdev, R_PATH0_BW_SEL_V1, in rtw8852c_ctrl_bw()
1213 rtw89_phy_write32_mask(rtwdev, R_PATH1_BW_SEL_V1, in rtw8852c_ctrl_bw()
1217 rtw89_phy_write32_idx(rtwdev, R_FC0_BW, B_FC0_BW_SET, 0x2, in rtw8852c_ctrl_bw()
1219 rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD, B_CHBW_MOD_SBW, 0x0, in rtw8852c_ctrl_bw()
1221 rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD, B_CHBW_MOD_PRICH, in rtw8852c_ctrl_bw()
1224 rtw89_phy_write32_mask(rtwdev, R_PATH0_SAMPL_DLY_T_V1, in rtw8852c_ctrl_bw()
1226 rtw89_phy_write32_mask(rtwdev, R_PATH1_SAMPL_DLY_T_V1, in rtw8852c_ctrl_bw()
1228 rtw89_phy_write32_mask(rtwdev, R_PATH0_BW_SEL_V1, in rtw8852c_ctrl_bw()
1230 rtw89_phy_write32_mask(rtwdev, R_PATH1_BW_SEL_V1, in rtw8852c_ctrl_bw()
1234 rtw89_phy_write32_idx(rtwdev, R_FC0_BW, B_FC0_BW_SET, 0x3, in rtw8852c_ctrl_bw()
1236 rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD, B_CHBW_MOD_SBW, 0x0, in rtw8852c_ctrl_bw()
1238 rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD, B_CHBW_MOD_PRICH, in rtw8852c_ctrl_bw()
1241 rtw89_phy_write32_mask(rtwdev, R_PATH0_SAMPL_DLY_T_V1, in rtw8852c_ctrl_bw()
1243 rtw89_phy_write32_mask(rtwdev, R_PATH1_SAMPL_DLY_T_V1, in rtw8852c_ctrl_bw()
1245 rtw89_phy_write32_mask(rtwdev, R_PATH0_BW_SEL_V1, in rtw8852c_ctrl_bw()
1247 rtw89_phy_write32_mask(rtwdev, R_PATH1_BW_SEL_V1, in rtw8852c_ctrl_bw()
1251 rtw89_warn(rtwdev, "Fail to switch bw (bw:%d, pri ch:%d)\n", bw, in rtw8852c_ctrl_bw()
1256 rtw89_phy_write32_idx(rtwdev, R_RX_BW40_2XFFT_EN_V1, in rtw8852c_ctrl_bw()
1258 rtw89_phy_write32_idx(rtwdev, R_T2F_GI_COMB, B_T2F_GI_COMB_EN, 1, phy_idx); in rtw8852c_ctrl_bw()
1260 rtw89_phy_write32_idx(rtwdev, R_RX_BW40_2XFFT_EN_V1, in rtw8852c_ctrl_bw()
1262 rtw89_phy_write32_idx(rtwdev, R_T2F_GI_COMB, B_T2F_GI_COMB_EN, 0, phy_idx); in rtw8852c_ctrl_bw()
1266 rtw8852c_bw_setting(rtwdev, bw, RF_PATH_A); in rtw8852c_ctrl_bw()
1267 if (!rtwdev->dbcc_en) in rtw8852c_ctrl_bw()
1268 rtw8852c_bw_setting(rtwdev, bw, RF_PATH_B); in rtw8852c_ctrl_bw()
1270 rtw8852c_bw_setting(rtwdev, bw, RF_PATH_B); in rtw8852c_ctrl_bw()
1273 rtw8852c_edcca_per20_bitmap_sifs(rtwdev, bw, phy_idx); in rtw8852c_ctrl_bw()
1276 static u32 rtw8852c_spur_freq(struct rtw89_dev *rtwdev, in rtw8852c_spur_freq() argument
1315 static void rtw8852c_set_csi_tone_idx(struct rtw89_dev *rtwdev, in rtw8852c_set_csi_tone_idx() argument
1322 spur_freq = rtw8852c_spur_freq(rtwdev, chan); in rtw8852c_set_csi_tone_idx()
1324 rtw89_phy_write32_idx(rtwdev, R_SEG0CSI_EN, B_SEG0CSI_EN, 0, phy_idx); in rtw8852c_set_csi_tone_idx()
1332 rtw89_phy_write32_idx(rtwdev, R_SEG0CSI, B_SEG0CSI_IDX, csi_tone_idx, phy_idx); in rtw8852c_set_csi_tone_idx()
1333 rtw89_phy_write32_idx(rtwdev, R_SEG0CSI_EN, B_SEG0CSI_EN, 1, phy_idx); in rtw8852c_set_csi_tone_idx()
1355 static void rtw8852c_set_nbi_tone_idx(struct rtw89_dev *rtwdev, in rtw8852c_set_nbi_tone_idx() argument
1366 spur_freq = rtw8852c_spur_freq(rtwdev, chan); in rtw8852c_set_nbi_tone_idx()
1368 rtw89_phy_write32_mask(rtwdev, nbi->notch1_en.addr, nbi->notch1_en.mask, 0); in rtw8852c_set_nbi_tone_idx()
1369 rtw89_phy_write32_mask(rtwdev, nbi->notch1_en.addr, nbi->notch1_en.mask, 0); in rtw8852c_set_nbi_tone_idx()
1397 rtw89_phy_write32_mask(rtwdev, nbi->notch2_idx.addr, in rtw8852c_set_nbi_tone_idx()
1399 rtw89_phy_write32_mask(rtwdev, nbi->notch2_frac_idx.addr, in rtw8852c_set_nbi_tone_idx()
1401 rtw89_phy_write32_mask(rtwdev, nbi->notch2_en.addr, nbi->notch2_en.mask, 0); in rtw8852c_set_nbi_tone_idx()
1402 rtw89_phy_write32_mask(rtwdev, nbi->notch2_en.addr, nbi->notch2_en.mask, 1); in rtw8852c_set_nbi_tone_idx()
1403 rtw89_phy_write32_mask(rtwdev, nbi->notch1_en.addr, nbi->notch1_en.mask, 0); in rtw8852c_set_nbi_tone_idx()
1405 rtw89_phy_write32_mask(rtwdev, nbi->notch1_idx.addr, in rtw8852c_set_nbi_tone_idx()
1407 rtw89_phy_write32_mask(rtwdev, nbi->notch1_frac_idx.addr, in rtw8852c_set_nbi_tone_idx()
1409 rtw89_phy_write32_mask(rtwdev, nbi->notch1_en.addr, nbi->notch1_en.mask, 0); in rtw8852c_set_nbi_tone_idx()
1410 rtw89_phy_write32_mask(rtwdev, nbi->notch1_en.addr, nbi->notch1_en.mask, 1); in rtw8852c_set_nbi_tone_idx()
1411 rtw89_phy_write32_mask(rtwdev, nbi->notch2_en.addr, nbi->notch2_en.mask, 0); in rtw8852c_set_nbi_tone_idx()
1415 static void rtw8852c_spur_notch(struct rtw89_dev *rtwdev, u32 val, in rtw8852c_spur_notch() argument
1429 rtw89_phy_write32_mask(rtwdev, notch, in rtw8852c_spur_notch()
1431 rtw89_phy_write32_set(rtwdev, notch, B_PATH0_NOTCH_EN); in rtw8852c_spur_notch()
1432 rtw89_phy_write32_mask(rtwdev, notch2, in rtw8852c_spur_notch()
1434 rtw89_phy_write32_set(rtwdev, notch2, B_PATH0_NOTCH2_EN); in rtw8852c_spur_notch()
1437 static void rtw8852c_spur_elimination(struct rtw89_dev *rtwdev, in rtw8852c_spur_elimination() argument
1442 rtw8852c_set_csi_tone_idx(rtwdev, chan, phy_idx); in rtw8852c_spur_elimination()
1448 rtw8852c_spur_notch(rtwdev, 0xe7f, RTW89_PHY_0); in rtw8852c_spur_elimination()
1449 if (!rtwdev->dbcc_en) in rtw8852c_spur_elimination()
1450 rtw8852c_spur_notch(rtwdev, 0xe7f, RTW89_PHY_1); in rtw8852c_spur_elimination()
1454 rtw8852c_spur_notch(rtwdev, 0x280, RTW89_PHY_0); in rtw8852c_spur_elimination()
1455 if (!rtwdev->dbcc_en) in rtw8852c_spur_elimination()
1456 rtw8852c_spur_notch(rtwdev, 0x280, RTW89_PHY_1); in rtw8852c_spur_elimination()
1458 rtw8852c_set_nbi_tone_idx(rtwdev, chan, RF_PATH_A); in rtw8852c_spur_elimination()
1459 if (!rtwdev->dbcc_en) in rtw8852c_spur_elimination()
1460 rtw8852c_set_nbi_tone_idx(rtwdev, chan, in rtw8852c_spur_elimination()
1467 rtw8852c_spur_notch(rtwdev, 0xe7f, RTW89_PHY_1); in rtw8852c_spur_elimination()
1471 rtw8852c_spur_notch(rtwdev, 0x280, RTW89_PHY_1); in rtw8852c_spur_elimination()
1473 rtw8852c_set_nbi_tone_idx(rtwdev, chan, RF_PATH_B); in rtw8852c_spur_elimination()
1478 rtw89_phy_write32_idx(rtwdev, R_PD_BOOST_EN, B_PD_BOOST_EN, 0, phy_idx); in rtw8852c_spur_elimination()
1480 rtw89_phy_write32_idx(rtwdev, R_PD_BOOST_EN, B_PD_BOOST_EN, 1, phy_idx); in rtw8852c_spur_elimination()
1483 static void rtw8852c_5m_mask(struct rtw89_dev *rtwdev, in rtw8852c_5m_mask() argument
1507 rtw89_phy_write32_mask(rtwdev, R_PATH0_5MDET, B_PATH0_5MDET_EN, 0x0); in rtw8852c_5m_mask()
1508 rtw89_phy_write32_mask(rtwdev, R_PATH1_5MDET, B_PATH1_5MDET_EN, 0x0); in rtw8852c_5m_mask()
1509 rtw89_phy_write32_idx(rtwdev, R_ASSIGN_SBD_OPT, in rtw8852c_5m_mask()
1513 rtw89_phy_write32_mask(rtwdev, R_PATH0_5MDET, B_PATH0_5MDET_TH, 0x4); in rtw8852c_5m_mask()
1514 rtw89_phy_write32_mask(rtwdev, R_PATH0_5MDET, B_PATH0_5MDET_EN, 0x1); in rtw8852c_5m_mask()
1515 rtw89_phy_write32_mask(rtwdev, R_PATH0_5MDET, B_PATH0_5MDET_SB2, 0x0); in rtw8852c_5m_mask()
1516 rtw89_phy_write32_mask(rtwdev, R_PATH0_5MDET, B_PATH0_5MDET_SB0, 0x1); in rtw8852c_5m_mask()
1517 rtw89_phy_write32_mask(rtwdev, R_PATH1_5MDET, B_PATH1_5MDET_TH, 0x4); in rtw8852c_5m_mask()
1518 rtw89_phy_write32_mask(rtwdev, R_PATH1_5MDET, B_PATH1_5MDET_EN, 0x1); in rtw8852c_5m_mask()
1519 rtw89_phy_write32_mask(rtwdev, R_PATH1_5MDET, B_PATH1_5MDET_SB2, 0x0); in rtw8852c_5m_mask()
1520 rtw89_phy_write32_mask(rtwdev, R_PATH1_5MDET, B_PATH1_5MDET_SB0, 0x1); in rtw8852c_5m_mask()
1522 rtw89_phy_write32_mask(rtwdev, R_PATH0_5MDET, B_PATH0_5MDET_TH, 0x4); in rtw8852c_5m_mask()
1523 rtw89_phy_write32_mask(rtwdev, R_PATH0_5MDET, B_PATH0_5MDET_EN, 0x1); in rtw8852c_5m_mask()
1524 rtw89_phy_write32_mask(rtwdev, R_PATH0_5MDET, B_PATH0_5MDET_SB2, 0x1); in rtw8852c_5m_mask()
1525 rtw89_phy_write32_mask(rtwdev, R_PATH0_5MDET, B_PATH0_5MDET_SB0, 0x0); in rtw8852c_5m_mask()
1526 rtw89_phy_write32_mask(rtwdev, R_PATH1_5MDET, B_PATH1_5MDET_TH, 0x4); in rtw8852c_5m_mask()
1527 rtw89_phy_write32_mask(rtwdev, R_PATH1_5MDET, B_PATH1_5MDET_EN, 0x1); in rtw8852c_5m_mask()
1528 rtw89_phy_write32_mask(rtwdev, R_PATH1_5MDET, B_PATH1_5MDET_SB2, 0x1); in rtw8852c_5m_mask()
1529 rtw89_phy_write32_mask(rtwdev, R_PATH1_5MDET, B_PATH1_5MDET_SB0, 0x0); in rtw8852c_5m_mask()
1531 rtw89_phy_write32_idx(rtwdev, R_ASSIGN_SBD_OPT, B_ASSIGN_SBD_OPT_EN, 0x1, phy_idx); in rtw8852c_5m_mask()
1535 static void rtw8852c_bb_reset_all(struct rtw89_dev *rtwdev, in rtw8852c_bb_reset_all() argument
1539 rtw89_phy_write32_mask(rtwdev, R_S0_HW_SI_DIS, B_S0_HW_SI_DIS_W_R_TRIG, in rtw8852c_bb_reset_all()
1541 rtw89_phy_write32_mask(rtwdev, R_S1_HW_SI_DIS, B_S1_HW_SI_DIS_W_R_TRIG, in rtw8852c_bb_reset_all()
1546 rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, 1, in rtw8852c_bb_reset_all()
1548 rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, 0, in rtw8852c_bb_reset_all()
1551 rtw89_phy_write32_mask(rtwdev, R_S0_HW_SI_DIS, B_S0_HW_SI_DIS_W_R_TRIG, in rtw8852c_bb_reset_all()
1553 rtw89_phy_write32_mask(rtwdev, R_S1_HW_SI_DIS, B_S1_HW_SI_DIS_W_R_TRIG, in rtw8852c_bb_reset_all()
1556 rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, 1, in rtw8852c_bb_reset_all()
1560 static void rtw8852c_bb_reset_en(struct rtw89_dev *rtwdev, enum rtw89_band band, in rtw8852c_bb_reset_en() argument
1564 rtw89_phy_write32_idx(rtwdev, R_S0_HW_SI_DIS, in rtw8852c_bb_reset_en()
1566 rtw89_phy_write32_idx(rtwdev, R_S1_HW_SI_DIS, in rtw8852c_bb_reset_en()
1568 rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, 1, in rtw8852c_bb_reset_en()
1571 rtw89_phy_write32_mask(rtwdev, R_RXCCA_V1, B_RXCCA_DIS_V1, 0x0); in rtw8852c_bb_reset_en()
1572 rtw89_phy_write32_mask(rtwdev, R_PD_CTRL, B_PD_HIT_DIS, 0x0); in rtw8852c_bb_reset_en()
1574 rtw89_phy_write32_mask(rtwdev, R_RXCCA_V1, B_RXCCA_DIS_V1, 0x1); in rtw8852c_bb_reset_en()
1575 rtw89_phy_write32_mask(rtwdev, R_PD_CTRL, B_PD_HIT_DIS, 0x1); in rtw8852c_bb_reset_en()
1576 rtw89_phy_write32_idx(rtwdev, R_S0_HW_SI_DIS, in rtw8852c_bb_reset_en()
1578 rtw89_phy_write32_idx(rtwdev, R_S1_HW_SI_DIS, in rtw8852c_bb_reset_en()
1581 rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, 0, in rtw8852c_bb_reset_en()
1586 static void rtw8852c_bb_reset(struct rtw89_dev *rtwdev, in rtw8852c_bb_reset() argument
1589 rtw8852c_bb_reset_all(rtwdev, phy_idx); in rtw8852c_bb_reset()
1593 void rtw8852c_bb_gpio_trsw(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, in rtw8852c_bb_gpio_trsw() argument
1610 rtw89_phy_write32_mask(rtwdev, cr, (B_P0_TRSW_A | B_P0_TRSW_B) << mask_ofst, val); in rtw8852c_bb_gpio_trsw()
1620 void rtw8852c_bb_gpio_rfm(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, in rtw8852c_bb_gpio_rfm() argument
1642 rtw89_phy_write32_mask(rtwdev, cr, mask, val); in rtw8852c_bb_gpio_rfm()
1645 static void rtw8852c_bb_gpio_init(struct rtw89_dev *rtwdev) in rtw8852c_bb_gpio_init() argument
1653 rtw89_phy_write32_set(rtwdev, (addr | 0x68), B_P0_TRSW_A); in rtw8852c_bb_gpio_init()
1654 rtw89_phy_write32_clr(rtwdev, (addr | 0x68), B_P0_TRSW_X); in rtw8852c_bb_gpio_init()
1655 rtw89_phy_write32_clr(rtwdev, (addr | 0x68), B_P0_TRSW_SO_A2); in rtw8852c_bb_gpio_init()
1656 rtw89_phy_write32(rtwdev, (addr | 0x80), 0x77777777); in rtw8852c_bb_gpio_init()
1657 rtw89_phy_write32(rtwdev, (addr | 0x84), 0x77777777); in rtw8852c_bb_gpio_init()
1660 rtw89_phy_write32(rtwdev, R_RFE_E_A2, 0xffffffff); in rtw8852c_bb_gpio_init()
1661 rtw89_phy_write32(rtwdev, R_RFE_O_SEL_A2, 0); in rtw8852c_bb_gpio_init()
1662 rtw89_phy_write32(rtwdev, R_RFE_SEL0_A2, 0); in rtw8852c_bb_gpio_init()
1663 rtw89_phy_write32(rtwdev, R_RFE_SEL32_A2, 0); in rtw8852c_bb_gpio_init()
1665 rtw8852c_bb_gpio_trsw(rtwdev, RF_PATH_A, 0, 0, 0, 0, 1); in rtw8852c_bb_gpio_init()
1666 rtw8852c_bb_gpio_trsw(rtwdev, RF_PATH_A, 0, 0, 1, 1, 0); in rtw8852c_bb_gpio_init()
1667 rtw8852c_bb_gpio_trsw(rtwdev, RF_PATH_A, 0, 1, 0, 1, 0); in rtw8852c_bb_gpio_init()
1668 rtw8852c_bb_gpio_trsw(rtwdev, RF_PATH_A, 0, 1, 1, 1, 0); in rtw8852c_bb_gpio_init()
1669 rtw8852c_bb_gpio_trsw(rtwdev, RF_PATH_A, 1, 0, 0, 0, 1); in rtw8852c_bb_gpio_init()
1670 rtw8852c_bb_gpio_trsw(rtwdev, RF_PATH_A, 1, 0, 1, 1, 0); in rtw8852c_bb_gpio_init()
1671 rtw8852c_bb_gpio_trsw(rtwdev, RF_PATH_A, 1, 1, 0, 1, 0); in rtw8852c_bb_gpio_init()
1672 rtw8852c_bb_gpio_trsw(rtwdev, RF_PATH_A, 1, 1, 1, 1, 0); in rtw8852c_bb_gpio_init()
1674 rtw8852c_bb_gpio_trsw(rtwdev, RF_PATH_B, 0, 0, 0, 0, 1); in rtw8852c_bb_gpio_init()
1675 rtw8852c_bb_gpio_trsw(rtwdev, RF_PATH_B, 0, 0, 1, 1, 0); in rtw8852c_bb_gpio_init()
1676 rtw8852c_bb_gpio_trsw(rtwdev, RF_PATH_B, 0, 1, 0, 1, 0); in rtw8852c_bb_gpio_init()
1677 rtw8852c_bb_gpio_trsw(rtwdev, RF_PATH_B, 0, 1, 1, 1, 0); in rtw8852c_bb_gpio_init()
1678 rtw8852c_bb_gpio_trsw(rtwdev, RF_PATH_B, 1, 0, 0, 0, 1); in rtw8852c_bb_gpio_init()
1679 rtw8852c_bb_gpio_trsw(rtwdev, RF_PATH_B, 1, 0, 1, 1, 0); in rtw8852c_bb_gpio_init()
1680 rtw8852c_bb_gpio_trsw(rtwdev, RF_PATH_B, 1, 1, 0, 1, 0); in rtw8852c_bb_gpio_init()
1681 rtw8852c_bb_gpio_trsw(rtwdev, RF_PATH_B, 1, 1, 1, 1, 0); in rtw8852c_bb_gpio_init()
1683 rtw8852c_bb_gpio_rfm(rtwdev, RF_PATH_A, PAPE_RFM, 0, 0, 0, 0x0); in rtw8852c_bb_gpio_init()
1684 rtw8852c_bb_gpio_rfm(rtwdev, RF_PATH_A, TRSW_RFM, 0, 0, 0, 0x4); in rtw8852c_bb_gpio_init()
1685 rtw8852c_bb_gpio_rfm(rtwdev, RF_PATH_A, LNAON_RFM, 0, 0, 0, 0x8); in rtw8852c_bb_gpio_init()
1687 rtw8852c_bb_gpio_rfm(rtwdev, RF_PATH_B, PAPE_RFM, 0, 0, 0, 0x0); in rtw8852c_bb_gpio_init()
1688 rtw8852c_bb_gpio_rfm(rtwdev, RF_PATH_B, TRSW_RFM, 0, 0, 0, 0x4); in rtw8852c_bb_gpio_init()
1689 rtw8852c_bb_gpio_rfm(rtwdev, RF_PATH_B, LNAON_RFM, 0, 0, 0, 0x8); in rtw8852c_bb_gpio_init()
1692 static void rtw8852c_bb_macid_ctrl_init(struct rtw89_dev *rtwdev, in rtw8852c_bb_macid_ctrl_init() argument
1699 rtw89_mac_txpwr_write32(rtwdev, phy_idx, addr, 0); in rtw8852c_bb_macid_ctrl_init()
1702 static void rtw8852c_bb_sethw(struct rtw89_dev *rtwdev) in rtw8852c_bb_sethw() argument
1704 struct rtw89_phy_efuse_gain *gain = &rtwdev->efuse_gain; in rtw8852c_bb_sethw()
1706 rtw89_phy_write32_set(rtwdev, R_DBCC_80P80_SEL_EVM_RPT, in rtw8852c_bb_sethw()
1708 rtw89_phy_write32_set(rtwdev, R_DBCC_80P80_SEL_EVM_RPT2, in rtw8852c_bb_sethw()
1711 rtw8852c_bb_macid_ctrl_init(rtwdev, RTW89_PHY_0); in rtw8852c_bb_sethw()
1712 rtw8852c_bb_gpio_init(rtwdev); in rtw8852c_bb_sethw()
1716 rtw89_phy_read32_mask(rtwdev, R_RPL_BIAS_COMP, B_RPL_BIAS_COMP_MASK); in rtw8852c_bb_sethw()
1718 rtw89_phy_read32_mask(rtwdev, R_RPL_BIAS_COMP1, B_RPL_BIAS_COMP1_MASK); in rtw8852c_bb_sethw()
1721 static void rtw8852c_set_channel_bb(struct rtw89_dev *rtwdev, in rtw8852c_set_channel_bb() argument
1725 struct rtw89_hal *hal = &rtwdev->hal; in rtw8852c_set_channel_bb()
1734 rtw8852c_ctrl_sco_cck(rtwdev, chan->channel, in rtw8852c_set_channel_bb()
1738 rtw8852c_ctrl_ch(rtwdev, chan, phy_idx); in rtw8852c_set_channel_bb()
1739 rtw8852c_ctrl_bw(rtwdev, pri_ch_idx, chan->band_width, phy_idx); in rtw8852c_set_channel_bb()
1741 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK_ADC, B_ENABLE_CCK, 1); in rtw8852c_set_channel_bb()
1742 rtw89_phy_write32_mask(rtwdev, R_RXCCA_V1, B_RXCCA_DIS_V1, 0); in rtw8852c_set_channel_bb()
1743 rtw89_phy_write32_idx(rtwdev, R_PD_ARBITER_OFF, in rtw8852c_set_channel_bb()
1746 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK_ADC, B_ENABLE_CCK, 0); in rtw8852c_set_channel_bb()
1747 rtw89_phy_write32_mask(rtwdev, R_RXCCA_V1, B_RXCCA_DIS_V1, 1); in rtw8852c_set_channel_bb()
1748 rtw89_phy_write32_idx(rtwdev, R_PD_ARBITER_OFF, in rtw8852c_set_channel_bb()
1752 rtw8852c_spur_elimination(rtwdev, chan, pri_ch_idx, phy_idx); in rtw8852c_set_channel_bb()
1753 rtw8852c_ctrl_btg(rtwdev, chan->band_type == RTW89_BAND_2G); in rtw8852c_set_channel_bb()
1754 rtw8852c_5m_mask(rtwdev, chan, phy_idx); in rtw8852c_set_channel_bb()
1757 rtwdev->hal.cv != CHIP_CAV) { in rtw8852c_set_channel_bb()
1758 rtw89_phy_write32_idx(rtwdev, R_P80_AT_HIGH_FREQ, in rtw8852c_set_channel_bb()
1763 rtw89_phy_write32_mask(rtwdev, in rtw8852c_set_channel_bb()
1766 rtw89_write32_mask(rtwdev, reg, in rtw8852c_set_channel_bb()
1769 rtw89_phy_write32_mask(rtwdev, in rtw8852c_set_channel_bb()
1772 rtw89_write32_mask(rtwdev, reg, in rtw8852c_set_channel_bb()
1779 rtw89_phy_write32_idx(rtwdev, R_CDD_EVM_CHK_EN, in rtw8852c_set_channel_bb()
1782 rtw89_phy_write32_idx(rtwdev, R_CDD_EVM_CHK_EN, in rtw8852c_set_channel_bb()
1785 if (!rtwdev->dbcc_en) { in rtw8852c_set_channel_bb()
1787 rtw89_phy_write32_mask(rtwdev, R_P0_TXPW_RSTB, mask, 0x1); in rtw8852c_set_channel_bb()
1788 rtw89_phy_write32_mask(rtwdev, R_P0_TXPW_RSTB, mask, 0x3); in rtw8852c_set_channel_bb()
1790 rtw89_phy_write32_mask(rtwdev, R_P1_TXPW_RSTB, mask, 0x1); in rtw8852c_set_channel_bb()
1791 rtw89_phy_write32_mask(rtwdev, R_P1_TXPW_RSTB, mask, 0x3); in rtw8852c_set_channel_bb()
1795 rtw89_phy_write32_mask(rtwdev, R_P0_TXPW_RSTB, mask, 0x1); in rtw8852c_set_channel_bb()
1796 rtw89_phy_write32_mask(rtwdev, R_P0_TXPW_RSTB, mask, 0x3); in rtw8852c_set_channel_bb()
1799 rtw89_phy_write32_mask(rtwdev, R_P1_TXPW_RSTB, mask, 0x1); in rtw8852c_set_channel_bb()
1800 rtw89_phy_write32_mask(rtwdev, R_P1_TXPW_RSTB, mask, 0x3); in rtw8852c_set_channel_bb()
1805 rtw89_phy_write32_set(rtwdev, R_MUIC, B_MUIC_EN); in rtw8852c_set_channel_bb()
1807 rtw89_phy_write32_clr(rtwdev, R_MUIC, B_MUIC_EN); in rtw8852c_set_channel_bb()
1814 rtw8852c_ctrl_tx_path_tmac(rtwdev, ntx_path, (enum rtw89_mac_idx)phy_idx); in rtw8852c_set_channel_bb()
1816 rtw8852c_bb_reset_all(rtwdev, phy_idx); in rtw8852c_set_channel_bb()
1819 static void rtw8852c_set_channel(struct rtw89_dev *rtwdev, in rtw8852c_set_channel() argument
1824 rtw8852c_set_channel_mac(rtwdev, chan, mac_idx); in rtw8852c_set_channel()
1825 rtw8852c_set_channel_bb(rtwdev, chan, phy_idx); in rtw8852c_set_channel()
1826 rtw8852c_set_channel_rf(rtwdev, chan, phy_idx); in rtw8852c_set_channel()
1829 static void rtw8852c_dfs_en(struct rtw89_dev *rtwdev, bool en) in rtw8852c_dfs_en() argument
1832 rtw89_phy_write32_mask(rtwdev, R_UPD_P0, B_UPD_P0_EN, 1); in rtw8852c_dfs_en()
1834 rtw89_phy_write32_mask(rtwdev, R_UPD_P0, B_UPD_P0_EN, 0); in rtw8852c_dfs_en()
1837 static void rtw8852c_adc_en(struct rtw89_dev *rtwdev, bool en) in rtw8852c_adc_en() argument
1840 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_RST, in rtw8852c_adc_en()
1843 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_RST, in rtw8852c_adc_en()
1847 static void rtw8852c_set_channel_help(struct rtw89_dev *rtwdev, bool enter, in rtw8852c_set_channel_help() argument
1854 rtw89_chip_stop_sch_tx(rtwdev, mac_idx, &p->tx_en, in rtw8852c_set_channel_help()
1856 rtw89_mac_cfg_ppdu_status(rtwdev, mac_idx, false); in rtw8852c_set_channel_help()
1857 rtw8852c_dfs_en(rtwdev, false); in rtw8852c_set_channel_help()
1858 rtw8852c_tssi_cont_en_phyidx(rtwdev, false, phy_idx); in rtw8852c_set_channel_help()
1859 rtw8852c_adc_en(rtwdev, false); in rtw8852c_set_channel_help()
1861 rtw8852c_bb_reset_en(rtwdev, chan->band_type, phy_idx, false); in rtw8852c_set_channel_help()
1863 rtw89_mac_cfg_ppdu_status(rtwdev, mac_idx, true); in rtw8852c_set_channel_help()
1864 rtw8852c_adc_en(rtwdev, true); in rtw8852c_set_channel_help()
1865 rtw8852c_dfs_en(rtwdev, true); in rtw8852c_set_channel_help()
1866 rtw8852c_tssi_cont_en_phyidx(rtwdev, true, phy_idx); in rtw8852c_set_channel_help()
1867 rtw8852c_bb_reset_en(rtwdev, chan->band_type, phy_idx, true); in rtw8852c_set_channel_help()
1868 rtw89_chip_resume_sch_tx(rtwdev, mac_idx, p->tx_en); in rtw8852c_set_channel_help()
1872 static void rtw8852c_rfk_init(struct rtw89_dev *rtwdev) in rtw8852c_rfk_init() argument
1874 struct rtw89_mcc_info *mcc_info = &rtwdev->mcc; in rtw8852c_rfk_init()
1876 rtwdev->is_tssi_mode[RF_PATH_A] = false; in rtw8852c_rfk_init()
1877 rtwdev->is_tssi_mode[RF_PATH_B] = false; in rtw8852c_rfk_init()
1879 rtw8852c_lck_init(rtwdev); in rtw8852c_rfk_init()
1881 rtw8852c_rck(rtwdev); in rtw8852c_rfk_init()
1882 rtw8852c_dack(rtwdev); in rtw8852c_rfk_init()
1883 rtw8852c_rx_dck(rtwdev, RTW89_PHY_0, false); in rtw8852c_rfk_init()
1886 static void rtw8852c_rfk_channel(struct rtw89_dev *rtwdev) in rtw8852c_rfk_channel() argument
1890 rtw8852c_mcc_get_ch_info(rtwdev, phy_idx); in rtw8852c_rfk_channel()
1891 rtw8852c_rx_dck(rtwdev, phy_idx, false); in rtw8852c_rfk_channel()
1892 rtw8852c_iqk(rtwdev, phy_idx); in rtw8852c_rfk_channel()
1893 rtw8852c_tssi(rtwdev, phy_idx); in rtw8852c_rfk_channel()
1894 rtw8852c_dpk(rtwdev, phy_idx); in rtw8852c_rfk_channel()
1895 rtw89_fw_h2c_rf_ntfy_mcc(rtwdev); in rtw8852c_rfk_channel()
1898 static void rtw8852c_rfk_band_changed(struct rtw89_dev *rtwdev, in rtw8852c_rfk_band_changed() argument
1901 rtw8852c_tssi_scan(rtwdev, phy_idx); in rtw8852c_rfk_band_changed()
1904 static void rtw8852c_rfk_scan(struct rtw89_dev *rtwdev, bool start) in rtw8852c_rfk_scan() argument
1906 rtw8852c_wifi_scan_notify(rtwdev, start, RTW89_PHY_0); in rtw8852c_rfk_scan()
1909 static void rtw8852c_rfk_track(struct rtw89_dev *rtwdev) in rtw8852c_rfk_track() argument
1911 rtw8852c_dpk_track(rtwdev); in rtw8852c_rfk_track()
1912 rtw8852c_lck_track(rtwdev); in rtw8852c_rfk_track()
1913 rtw8852c_rx_dck_track(rtwdev); in rtw8852c_rfk_track()
1916 static u32 rtw8852c_bb_cal_txpwr_ref(struct rtw89_dev *rtwdev, in rtw8852c_bb_cal_txpwr_ref() argument
1935 rtw89_debug(rtwdev, RTW89_DBG_TXPWR, in rtw8852c_bb_cal_txpwr_ref()
1943 void rtw8852c_set_txpwr_ul_tb_offset(struct rtw89_dev *rtwdev, in rtw8852c_set_txpwr_ul_tb_offset() argument
1953 rtw89_warn(rtwdev, "[ULTB] Err pwr_offset=%d\n", pw_ofst); in rtw8852c_set_txpwr_ul_tb_offset()
1960 rtw89_debug(rtwdev, RTW89_DBG_TXPWR, "[ULTB] val_1tx=0x%x\n", val_1t); in rtw8852c_set_txpwr_ul_tb_offset()
1961 rtw89_debug(rtwdev, RTW89_DBG_TXPWR, "[ULTB] val_2tx=0x%x\n", val_2t); in rtw8852c_set_txpwr_ul_tb_offset()
1966 rtw89_write32_mask(rtwdev, reg, in rtw8852c_set_txpwr_ul_tb_offset()
1971 rtw89_write32_mask(rtwdev, reg, in rtw8852c_set_txpwr_ul_tb_offset()
1977 static void rtw8852c_set_txpwr_ref(struct rtw89_dev *rtwdev, in rtw8852c_set_txpwr_ref() argument
1989 rtw89_debug(rtwdev, RTW89_DBG_TXPWR, "[TXPWR] set txpwr reference\n"); in rtw8852c_set_txpwr_ref()
1991 rtw89_mac_txpwr_write32_mask(rtwdev, phy_idx, R_AX_PWR_RATE_CTRL, in rtw8852c_set_txpwr_ref()
1994 rtw89_debug(rtwdev, RTW89_DBG_TXPWR, "[TXPWR] set bb ofdm txpwr ref\n"); in rtw8852c_set_txpwr_ref()
1995 val = rtw8852c_bb_cal_txpwr_ref(rtwdev, phy_idx, ref_ofdm); in rtw8852c_set_txpwr_ref()
1998 rtw89_phy_write32_idx(rtwdev, addr[i] + ofst_ofdm, mask, val, in rtw8852c_set_txpwr_ref()
2001 rtw89_debug(rtwdev, RTW89_DBG_TXPWR, "[TXPWR] set bb cck txpwr ref\n"); in rtw8852c_set_txpwr_ref()
2002 val = rtw8852c_bb_cal_txpwr_ref(rtwdev, phy_idx, ref_cck); in rtw8852c_set_txpwr_ref()
2005 rtw89_phy_write32_idx(rtwdev, addr[i] + ofst_cck, mask, val, in rtw8852c_set_txpwr_ref()
2009 static void rtw8852c_set_txpwr_byrate(struct rtw89_dev *rtwdev, in rtw8852c_set_txpwr_byrate() argument
2026 rtw89_debug(rtwdev, RTW89_DBG_TXPWR, in rtw8852c_set_txpwr_byrate()
2040 tmp = rtw89_phy_read_txpwr_byrate(rtwdev, band, in rtw8852c_set_txpwr_byrate()
2047 rtw89_mac_txpwr_write32(rtwdev, phy_idx, addr, val); in rtw8852c_set_txpwr_byrate()
2055 static void rtw8852c_set_txpwr_offset(struct rtw89_dev *rtwdev, in rtw8852c_set_txpwr_offset() argument
2067 rtw89_debug(rtwdev, RTW89_DBG_TXPWR, "[TXPWR] set txpwr offset\n"); in rtw8852c_set_txpwr_offset()
2070 v = rtw89_phy_read_txpwr_byrate(rtwdev, band, &desc); in rtw8852c_set_txpwr_offset()
2074 rtw89_mac_txpwr_write32_mask(rtwdev, phy_idx, R_AX_PWR_RATE_OFST_CTRL, in rtw8852c_set_txpwr_offset()
2078 static void rtw8852c_bb_set_tx_shape_dfir(struct rtw89_dev *rtwdev, in rtw8852c_bb_set_tx_shape_dfir() argument
2102 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); in rtw8852c_bb_set_tx_shape_dfir()
2108 rtw89_warn(rtwdev, in rtw8852c_bb_set_tx_shape_dfir()
2119 rtw89_debug(rtwdev, RTW89_DBG_TXPWR, in rtw8852c_bb_set_tx_shape_dfir()
2122 rtw89_phy_write32_idx(rtwdev, addr_filter[i], __DFIR_CFG_MASK, in rtw8852c_bb_set_tx_shape_dfir()
2133 static void rtw8852c_set_tx_shape(struct rtw89_dev *rtwdev, in rtw8852c_set_tx_shape() argument
2138 u8 regd = rtw89_regd_get(rtwdev, band); in rtw8852c_set_tx_shape()
2143 rtw8852c_bb_set_tx_shape_dfir(rtwdev, tx_shape_cck, phy_idx); in rtw8852c_set_tx_shape()
2145 rtw89_phy_tssi_ctrl_set_bandedge_cfg(rtwdev, in rtw8852c_set_tx_shape()
2150 static void rtw8852c_set_txpwr_limit(struct rtw89_dev *rtwdev, in rtw8852c_set_txpwr_limit() argument
2162 rtw89_debug(rtwdev, RTW89_DBG_TXPWR, in rtw8852c_set_txpwr_limit()
2166 rtw89_phy_fill_txpwr_limit(rtwdev, chan, &lmt[i], i); in rtw8852c_set_txpwr_limit()
2177 rtw89_mac_txpwr_write32(rtwdev, phy_idx, addr, val); in rtw8852c_set_txpwr_limit()
2183 static void rtw8852c_set_txpwr_limit_ru(struct rtw89_dev *rtwdev, in rtw8852c_set_txpwr_limit_ru() argument
2195 rtw89_debug(rtwdev, RTW89_DBG_TXPWR, in rtw8852c_set_txpwr_limit_ru()
2199 rtw89_phy_fill_txpwr_limit_ru(rtwdev, chan, &lmt_ru[i], i); in rtw8852c_set_txpwr_limit_ru()
2211 rtw89_mac_txpwr_write32(rtwdev, phy_idx, addr, val); in rtw8852c_set_txpwr_limit_ru()
2218 static void rtw8852c_set_txpwr(struct rtw89_dev *rtwdev, in rtw8852c_set_txpwr() argument
2222 rtw8852c_set_txpwr_byrate(rtwdev, chan, phy_idx); in rtw8852c_set_txpwr()
2223 rtw8852c_set_txpwr_offset(rtwdev, chan, phy_idx); in rtw8852c_set_txpwr()
2224 rtw8852c_set_tx_shape(rtwdev, chan, phy_idx); in rtw8852c_set_txpwr()
2225 rtw8852c_set_txpwr_limit(rtwdev, chan, phy_idx); in rtw8852c_set_txpwr()
2226 rtw8852c_set_txpwr_limit_ru(rtwdev, chan, phy_idx); in rtw8852c_set_txpwr()
2229 static void rtw8852c_set_txpwr_ctrl(struct rtw89_dev *rtwdev, in rtw8852c_set_txpwr_ctrl() argument
2232 rtw8852c_set_txpwr_ref(rtwdev, phy_idx); in rtw8852c_set_txpwr_ctrl()
2236 rtw8852c_init_tssi_ctrl(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) in rtw8852c_init_tssi_ctrl() argument
2250 rtw89_mac_txpwr_write32(rtwdev, phy_idx, addr, 0); in rtw8852c_init_tssi_ctrl()
2253 rtw89_mac_txpwr_write32(rtwdev, phy_idx, ctrl_ini[i].addr, in rtw8852c_init_tssi_ctrl()
2256 rtw89_phy_tssi_ctrl_set_bandedge_cfg(rtwdev, in rtw8852c_init_tssi_ctrl()
2262 rtw8852c_init_txpwr_unit(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) in rtw8852c_init_txpwr_unit() argument
2266 ret = rtw89_mac_txpwr_write32(rtwdev, phy_idx, R_AX_PWR_UL_CTRL2, 0x07763333); in rtw8852c_init_txpwr_unit()
2270 ret = rtw89_mac_txpwr_write32(rtwdev, phy_idx, R_AX_PWR_COEXT_CTRL, 0x01ebf000); in rtw8852c_init_txpwr_unit()
2274 ret = rtw89_mac_txpwr_write32(rtwdev, phy_idx, R_AX_PWR_UL_CTRL0, 0x0002f8ff); in rtw8852c_init_txpwr_unit()
2278 rtw8852c_set_txpwr_ul_tb_offset(rtwdev, 0, phy_idx == RTW89_PHY_1 ? in rtw8852c_init_txpwr_unit()
2281 rtw8852c_init_tssi_ctrl(rtwdev, phy_idx); in rtw8852c_init_txpwr_unit()
2286 static void rtw8852c_bb_cfg_rx_path(struct rtw89_dev *rtwdev, u8 rx_path) in rtw8852c_bb_cfg_rx_path() argument
2288 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); in rtw8852c_bb_cfg_rx_path()
2293 if (rtwdev->dbcc_en) { in rtw8852c_bb_cfg_rx_path()
2294 rtw89_phy_write32_mask(rtwdev, R_CHBW_MOD, B_ANT_RX_SEG0, 1); in rtw8852c_bb_cfg_rx_path()
2295 rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD, B_ANT_RX_SEG0, 2, in rtw8852c_bb_cfg_rx_path()
2298 rtw89_phy_write32_mask(rtwdev, R_FC0_BW, B_ANT_RX_1RCCA_SEG0, in rtw8852c_bb_cfg_rx_path()
2300 rtw89_phy_write32_mask(rtwdev, R_FC0_BW, B_ANT_RX_1RCCA_SEG1, in rtw8852c_bb_cfg_rx_path()
2302 rtw89_phy_write32_idx(rtwdev, R_FC0_BW, B_ANT_RX_1RCCA_SEG0, 2, in rtw8852c_bb_cfg_rx_path()
2304 rtw89_phy_write32_idx(rtwdev, R_FC0_BW, B_ANT_RX_1RCCA_SEG1, 2, in rtw8852c_bb_cfg_rx_path()
2307 rtw89_phy_write32_mask(rtwdev, R_RXHT_MCS_LIMIT, in rtw8852c_bb_cfg_rx_path()
2309 rtw89_phy_write32_mask(rtwdev, R_RXVHT_MCS_LIMIT, in rtw8852c_bb_cfg_rx_path()
2311 rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHE_USER_MAX, 8); in rtw8852c_bb_cfg_rx_path()
2312 rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHE_MAX_NSS, 0); in rtw8852c_bb_cfg_rx_path()
2313 rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHETB_MAX_NSS, 0); in rtw8852c_bb_cfg_rx_path()
2315 rtw89_phy_write32_idx(rtwdev, R_RXHT_MCS_LIMIT, in rtw8852c_bb_cfg_rx_path()
2317 rtw89_phy_write32_idx(rtwdev, R_RXVHT_MCS_LIMIT, in rtw8852c_bb_cfg_rx_path()
2319 rtw89_phy_write32_idx(rtwdev, R_RXHE, B_RXHE_USER_MAX, 1, in rtw8852c_bb_cfg_rx_path()
2321 rtw89_phy_write32_idx(rtwdev, R_RXHE, B_RXHE_MAX_NSS, 0, in rtw8852c_bb_cfg_rx_path()
2323 rtw89_phy_write32_idx(rtwdev, R_RXHE, B_RXHETB_MAX_NSS, 0, in rtw8852c_bb_cfg_rx_path()
2325 rtw89_phy_write32_mask(rtwdev, R_P0_TXPW_RSTB, rst_mask0, 1); in rtw8852c_bb_cfg_rx_path()
2326 rtw89_phy_write32_mask(rtwdev, R_P0_TXPW_RSTB, rst_mask0, 3); in rtw8852c_bb_cfg_rx_path()
2327 rtw89_phy_write32_mask(rtwdev, R_P1_TXPW_RSTB, rst_mask1, 1); in rtw8852c_bb_cfg_rx_path()
2328 rtw89_phy_write32_mask(rtwdev, R_P1_TXPW_RSTB, rst_mask1, 3); in rtw8852c_bb_cfg_rx_path()
2331 rtw89_phy_write32_mask(rtwdev, R_CHBW_MOD, in rtw8852c_bb_cfg_rx_path()
2333 rtw89_phy_write32_mask(rtwdev, R_FC0_BW, in rtw8852c_bb_cfg_rx_path()
2335 rtw89_phy_write32_mask(rtwdev, R_FC0_BW, in rtw8852c_bb_cfg_rx_path()
2337 rtw89_phy_write32_mask(rtwdev, R_RXHT_MCS_LIMIT, in rtw8852c_bb_cfg_rx_path()
2339 rtw89_phy_write32_mask(rtwdev, R_RXVHT_MCS_LIMIT, in rtw8852c_bb_cfg_rx_path()
2341 rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHE_MAX_NSS, in rtw8852c_bb_cfg_rx_path()
2343 rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHETB_MAX_NSS, in rtw8852c_bb_cfg_rx_path()
2345 rtw89_phy_write32_mask(rtwdev, R_P0_TXPW_RSTB, in rtw8852c_bb_cfg_rx_path()
2347 rtw89_phy_write32_mask(rtwdev, R_P0_TXPW_RSTB, in rtw8852c_bb_cfg_rx_path()
2350 rtw89_phy_write32_mask(rtwdev, R_CHBW_MOD, in rtw8852c_bb_cfg_rx_path()
2352 rtw89_phy_write32_mask(rtwdev, R_FC0_BW, in rtw8852c_bb_cfg_rx_path()
2354 rtw89_phy_write32_mask(rtwdev, R_FC0_BW, in rtw8852c_bb_cfg_rx_path()
2356 rtw89_phy_write32_mask(rtwdev, R_RXHT_MCS_LIMIT, in rtw8852c_bb_cfg_rx_path()
2358 rtw89_phy_write32_mask(rtwdev, R_RXVHT_MCS_LIMIT, in rtw8852c_bb_cfg_rx_path()
2360 rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHE_MAX_NSS, in rtw8852c_bb_cfg_rx_path()
2362 rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHETB_MAX_NSS, in rtw8852c_bb_cfg_rx_path()
2364 rtw89_phy_write32_mask(rtwdev, R_P1_TXPW_RSTB, in rtw8852c_bb_cfg_rx_path()
2366 rtw89_phy_write32_mask(rtwdev, R_P1_TXPW_RSTB, in rtw8852c_bb_cfg_rx_path()
2369 rtw89_phy_write32_mask(rtwdev, R_CHBW_MOD, in rtw8852c_bb_cfg_rx_path()
2371 rtw89_phy_write32_mask(rtwdev, R_FC0_BW, in rtw8852c_bb_cfg_rx_path()
2373 rtw89_phy_write32_mask(rtwdev, R_FC0_BW, in rtw8852c_bb_cfg_rx_path()
2375 rtw89_phy_write32_mask(rtwdev, R_RXHT_MCS_LIMIT, in rtw8852c_bb_cfg_rx_path()
2377 rtw89_phy_write32_mask(rtwdev, R_RXVHT_MCS_LIMIT, in rtw8852c_bb_cfg_rx_path()
2379 rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHE_MAX_NSS, in rtw8852c_bb_cfg_rx_path()
2381 rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHETB_MAX_NSS, in rtw8852c_bb_cfg_rx_path()
2383 rtw8852c_ctrl_btg(rtwdev, band == RTW89_BAND_2G); in rtw8852c_bb_cfg_rx_path()
2384 rtw89_phy_write32_mask(rtwdev, R_P0_TXPW_RSTB, in rtw8852c_bb_cfg_rx_path()
2386 rtw89_phy_write32_mask(rtwdev, R_P0_TXPW_RSTB, in rtw8852c_bb_cfg_rx_path()
2388 rtw89_phy_write32_mask(rtwdev, R_P1_TXPW_RSTB, in rtw8852c_bb_cfg_rx_path()
2390 rtw89_phy_write32_mask(rtwdev, R_P1_TXPW_RSTB, in rtw8852c_bb_cfg_rx_path()
2393 rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHE_USER_MAX, 8); in rtw8852c_bb_cfg_rx_path()
2397 static void rtw8852c_ctrl_tx_path_tmac(struct rtw89_dev *rtwdev, u8 tx_path, in rtw8852c_ctrl_tx_path_tmac() argument
2419 rtw89_phy_write32_idx(rtwdev, R_MAC_SEL, B_MAC_SEL_MOD, 0, RTW89_PHY_0); in rtw8852c_ctrl_tx_path_tmac()
2420 rtw89_phy_write32_idx(rtwdev, R_MAC_SEL, B_MAC_SEL_MOD, 0, RTW89_PHY_1); in rtw8852c_ctrl_tx_path_tmac()
2425 rtw89_write32(rtwdev, reg, 0); in rtw8852c_ctrl_tx_path_tmac()
2447 rtw89_warn(rtwdev, "[Invalid Tx Path]Tx Path: %d\n", tx_path); in rtw8852c_ctrl_tx_path_tmac()
2452 rtw89_debug(rtwdev, RTW89_DBG_TSSI, "0x%x = 0x%x\n", in rtw8852c_ctrl_tx_path_tmac()
2455 rtw89_write32(rtwdev, reg, path_com[i].data); in rtw8852c_ctrl_tx_path_tmac()
2459 static void rtw8852c_bb_ctrl_btc_preagc(struct rtw89_dev *rtwdev, bool bt_en) in rtw8852c_bb_ctrl_btc_preagc() argument
2462 rtw89_phy_write32_mask(rtwdev, R_PATH0_FRC_FIR_TYPE_V1, in rtw8852c_bb_ctrl_btc_preagc()
2464 rtw89_phy_write32_mask(rtwdev, R_PATH1_FRC_FIR_TYPE_V1, in rtw8852c_bb_ctrl_btc_preagc()
2466 rtw89_phy_write32_mask(rtwdev, R_PATH0_RXBB_V1, in rtw8852c_bb_ctrl_btc_preagc()
2468 rtw89_phy_write32_mask(rtwdev, R_PATH1_RXBB_V1, in rtw8852c_bb_ctrl_btc_preagc()
2470 rtw89_phy_write32_mask(rtwdev, R_PATH0_G_LNA6_OP1DB_V1, in rtw8852c_bb_ctrl_btc_preagc()
2472 rtw89_phy_write32_mask(rtwdev, R_PATH1_G_LNA6_OP1DB_V1, in rtw8852c_bb_ctrl_btc_preagc()
2474 rtw89_phy_write32_mask(rtwdev, R_PATH0_G_TIA0_LNA6_OP1DB_V1, in rtw8852c_bb_ctrl_btc_preagc()
2476 rtw89_phy_write32_mask(rtwdev, R_PATH0_G_TIA1_LNA6_OP1DB_V1, in rtw8852c_bb_ctrl_btc_preagc()
2478 rtw89_phy_write32_mask(rtwdev, R_PATH1_G_TIA0_LNA6_OP1DB_V1, in rtw8852c_bb_ctrl_btc_preagc()
2480 rtw89_phy_write32_mask(rtwdev, R_PATH1_G_TIA1_LNA6_OP1DB_V1, in rtw8852c_bb_ctrl_btc_preagc()
2482 rtw89_phy_write32_mask(rtwdev, R_PATH0_BT_BACKOFF_V1, in rtw8852c_bb_ctrl_btc_preagc()
2484 rtw89_phy_write32_mask(rtwdev, R_PATH1_BT_BACKOFF_V1, in rtw8852c_bb_ctrl_btc_preagc()
2486 rtw89_phy_write32_mask(rtwdev, R_P0_BACKOFF_IBADC_V1, in rtw8852c_bb_ctrl_btc_preagc()
2488 rtw89_phy_write32_mask(rtwdev, R_P1_BACKOFF_IBADC_V1, in rtw8852c_bb_ctrl_btc_preagc()
2491 rtw89_phy_write32_mask(rtwdev, R_PATH0_FRC_FIR_TYPE_V1, in rtw8852c_bb_ctrl_btc_preagc()
2493 rtw89_phy_write32_mask(rtwdev, R_PATH1_FRC_FIR_TYPE_V1, in rtw8852c_bb_ctrl_btc_preagc()
2495 rtw89_phy_write32_mask(rtwdev, R_PATH0_RXBB_V1, in rtw8852c_bb_ctrl_btc_preagc()
2497 rtw89_phy_write32_mask(rtwdev, R_PATH1_RXBB_V1, in rtw8852c_bb_ctrl_btc_preagc()
2499 rtw89_phy_write32_mask(rtwdev, R_PATH0_G_LNA6_OP1DB_V1, in rtw8852c_bb_ctrl_btc_preagc()
2501 rtw89_phy_write32_mask(rtwdev, R_PATH1_G_LNA6_OP1DB_V1, in rtw8852c_bb_ctrl_btc_preagc()
2503 rtw89_phy_write32_mask(rtwdev, R_PATH0_G_TIA0_LNA6_OP1DB_V1, in rtw8852c_bb_ctrl_btc_preagc()
2505 rtw89_phy_write32_mask(rtwdev, R_PATH0_G_TIA1_LNA6_OP1DB_V1, in rtw8852c_bb_ctrl_btc_preagc()
2507 rtw89_phy_write32_mask(rtwdev, R_PATH1_G_TIA0_LNA6_OP1DB_V1, in rtw8852c_bb_ctrl_btc_preagc()
2509 rtw89_phy_write32_mask(rtwdev, R_PATH1_G_TIA1_LNA6_OP1DB_V1, in rtw8852c_bb_ctrl_btc_preagc()
2511 rtw89_phy_write32_mask(rtwdev, R_PATH0_BT_BACKOFF_V1, in rtw8852c_bb_ctrl_btc_preagc()
2513 rtw89_phy_write32_mask(rtwdev, R_PATH1_BT_BACKOFF_V1, in rtw8852c_bb_ctrl_btc_preagc()
2515 rtw89_phy_write32_mask(rtwdev, R_P0_BACKOFF_IBADC_V1, in rtw8852c_bb_ctrl_btc_preagc()
2517 rtw89_phy_write32_mask(rtwdev, R_P1_BACKOFF_IBADC_V1, in rtw8852c_bb_ctrl_btc_preagc()
2522 static void rtw8852c_bb_cfg_txrx_path(struct rtw89_dev *rtwdev) in rtw8852c_bb_cfg_txrx_path() argument
2524 struct rtw89_hal *hal = &rtwdev->hal; in rtw8852c_bb_cfg_txrx_path()
2526 rtw8852c_bb_cfg_rx_path(rtwdev, RF_PATH_AB); in rtw8852c_bb_cfg_txrx_path()
2529 rtw89_phy_write32_mask(rtwdev, R_RXHT_MCS_LIMIT, B_RXHT_MCS_LIMIT, 0); in rtw8852c_bb_cfg_txrx_path()
2530 rtw89_phy_write32_mask(rtwdev, R_RXVHT_MCS_LIMIT, B_RXVHT_MCS_LIMIT, 0); in rtw8852c_bb_cfg_txrx_path()
2531 rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHE_MAX_NSS, 0); in rtw8852c_bb_cfg_txrx_path()
2532 rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHETB_MAX_NSS, 0); in rtw8852c_bb_cfg_txrx_path()
2534 rtw89_phy_write32_mask(rtwdev, R_RXHT_MCS_LIMIT, B_RXHT_MCS_LIMIT, 1); in rtw8852c_bb_cfg_txrx_path()
2535 rtw89_phy_write32_mask(rtwdev, R_RXVHT_MCS_LIMIT, B_RXVHT_MCS_LIMIT, 1); in rtw8852c_bb_cfg_txrx_path()
2536 rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHE_MAX_NSS, 1); in rtw8852c_bb_cfg_txrx_path()
2537 rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHETB_MAX_NSS, 1); in rtw8852c_bb_cfg_txrx_path()
2541 static u8 rtw8852c_get_thermal(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path) in rtw8852c_get_thermal() argument
2543 rtw89_write_rf(rtwdev, rf_path, RR_TM, RR_TM_TRI, 0x1); in rtw8852c_get_thermal()
2544 rtw89_write_rf(rtwdev, rf_path, RR_TM, RR_TM_TRI, 0x0); in rtw8852c_get_thermal()
2545 rtw89_write_rf(rtwdev, rf_path, RR_TM, RR_TM_TRI, 0x1); in rtw8852c_get_thermal()
2549 return rtw89_read_rf(rtwdev, rf_path, RR_TM, RR_TM_VAL); in rtw8852c_get_thermal()
2552 static void rtw8852c_btc_set_rfe(struct rtw89_dev *rtwdev) in rtw8852c_btc_set_rfe() argument
2554 struct rtw89_btc *btc = &rtwdev->btc; in rtw8852c_btc_set_rfe()
2557 module->rfe_type = rtwdev->efuse.rfe_type; in rtw8852c_btc_set_rfe()
2558 module->cv = rtwdev->hal.cv; in rtw8852c_btc_set_rfe()
2579 static void rtw8852c_ctrl_btg(struct rtw89_dev *rtwdev, bool btg) in rtw8852c_ctrl_btg() argument
2582 rtw89_phy_write32_mask(rtwdev, R_PATH0_BT_SHARE_V1, in rtw8852c_ctrl_btg()
2584 rtw89_phy_write32_mask(rtwdev, R_PATH0_BTG_PATH_V1, in rtw8852c_ctrl_btg()
2586 rtw89_phy_write32_mask(rtwdev, R_PATH1_G_LNA6_OP1DB_V1, in rtw8852c_ctrl_btg()
2588 rtw89_phy_write32_mask(rtwdev, R_PATH1_G_TIA0_LNA6_OP1DB_V1, in rtw8852c_ctrl_btg()
2590 rtw89_phy_write32_mask(rtwdev, R_PATH1_BT_SHARE_V1, in rtw8852c_ctrl_btg()
2592 rtw89_phy_write32_mask(rtwdev, R_PATH1_BTG_PATH_V1, in rtw8852c_ctrl_btg()
2594 rtw89_phy_write32_mask(rtwdev, R_PMAC_GNT, B_PMAC_GNT_P1, 0x0); in rtw8852c_ctrl_btg()
2595 rtw89_phy_write32_mask(rtwdev, R_CHBW_MOD, B_BT_SHARE, 0x1); in rtw8852c_ctrl_btg()
2596 rtw89_phy_write32_mask(rtwdev, R_FC0_BW, B_ANT_RX_BT_SEG0, 0x2); in rtw8852c_ctrl_btg()
2597 rtw89_phy_write32_mask(rtwdev, R_BT_DYN_DC_EST_EN, in rtw8852c_ctrl_btg()
2599 rtw89_phy_write32_mask(rtwdev, R_GNT_BT_WGT_EN, B_GNT_BT_WGT_EN, in rtw8852c_ctrl_btg()
2602 rtw89_phy_write32_mask(rtwdev, R_PATH0_BT_SHARE_V1, in rtw8852c_ctrl_btg()
2604 rtw89_phy_write32_mask(rtwdev, R_PATH0_BTG_PATH_V1, in rtw8852c_ctrl_btg()
2606 rtw89_phy_write32_mask(rtwdev, R_PATH1_G_LNA6_OP1DB_V1, in rtw8852c_ctrl_btg()
2608 rtw89_phy_write32_mask(rtwdev, R_PATH1_G_TIA0_LNA6_OP1DB_V1, in rtw8852c_ctrl_btg()
2610 rtw89_phy_write32_mask(rtwdev, R_PATH1_BT_SHARE_V1, in rtw8852c_ctrl_btg()
2612 rtw89_phy_write32_mask(rtwdev, R_PATH1_BTG_PATH_V1, in rtw8852c_ctrl_btg()
2614 rtw89_phy_write32_mask(rtwdev, R_PMAC_GNT, B_PMAC_GNT_P1, 0xf); in rtw8852c_ctrl_btg()
2615 rtw89_phy_write32_mask(rtwdev, R_PMAC_GNT, B_PMAC_GNT_P2, 0x4); in rtw8852c_ctrl_btg()
2616 rtw89_phy_write32_mask(rtwdev, R_CHBW_MOD, B_BT_SHARE, 0x0); in rtw8852c_ctrl_btg()
2617 rtw89_phy_write32_mask(rtwdev, R_FC0_BW, B_ANT_RX_BT_SEG0, 0x0); in rtw8852c_ctrl_btg()
2618 rtw89_phy_write32_mask(rtwdev, R_BT_DYN_DC_EST_EN, in rtw8852c_ctrl_btg()
2620 rtw89_phy_write32_mask(rtwdev, R_GNT_BT_WGT_EN, B_GNT_BT_WGT_EN, in rtw8852c_ctrl_btg()
2626 void rtw8852c_set_trx_mask(struct rtw89_dev *rtwdev, u8 path, u8 group, u32 val) in rtw8852c_set_trx_mask() argument
2628 rtw89_write_rf(rtwdev, path, RR_LUTWE, RFREG_MASK, 0x20000); in rtw8852c_set_trx_mask()
2629 rtw89_write_rf(rtwdev, path, RR_LUTWA, RFREG_MASK, group); in rtw8852c_set_trx_mask()
2630 rtw89_write_rf(rtwdev, path, RR_LUTWD0, RFREG_MASK, val); in rtw8852c_set_trx_mask()
2631 rtw89_write_rf(rtwdev, path, RR_LUTWE, RFREG_MASK, 0x0); in rtw8852c_set_trx_mask()
2634 static void rtw8852c_btc_init_cfg(struct rtw89_dev *rtwdev) in rtw8852c_btc_init_cfg() argument
2636 struct rtw89_btc *btc = &rtwdev->btc; in rtw8852c_btc_init_cfg()
2638 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw8852c_btc_init_cfg()
2645 rtw89_mac_coex_init_v1(rtwdev, &coex_params); in rtw8852c_btc_init_cfg()
2648 chip->ops->btc_set_wl_pri(rtwdev, BTC_PRI_MASK_TX_RESP, true); in rtw8852c_btc_init_cfg()
2649 chip->ops->btc_set_wl_pri(rtwdev, BTC_PRI_MASK_BEACON, true); in rtw8852c_btc_init_cfg()
2652 rtw89_write_rf(rtwdev, RF_PATH_A, RR_WLSEL, RFREG_MASK, 0x0); in rtw8852c_btc_init_cfg()
2653 rtw89_write_rf(rtwdev, RF_PATH_B, RR_WLSEL, RFREG_MASK, 0x0); in rtw8852c_btc_init_cfg()
2657 rtw8852c_set_trx_mask(rtwdev, in rtw8852c_btc_init_cfg()
2659 rtw8852c_set_trx_mask(rtwdev, in rtw8852c_btc_init_cfg()
2662 rtw8852c_set_trx_mask(rtwdev, in rtw8852c_btc_init_cfg()
2665 rtw8852c_set_trx_mask(rtwdev, in rtw8852c_btc_init_cfg()
2667 rtw8852c_set_trx_mask(rtwdev, in rtw8852c_btc_init_cfg()
2672 rtw89_write32(rtwdev, R_AX_BT_BREAK_TABLE, BTC_BREAK_PARAM); in rtw8852c_btc_init_cfg()
2675 rtw89_write32_set(rtwdev, in rtw8852c_btc_init_cfg()
2682 void rtw8852c_btc_set_wl_pri(struct rtw89_dev *rtwdev, u8 map, bool state) in rtw8852c_btc_set_wl_pri() argument
2701 rtw89_write32_set(rtwdev, reg, bitmap); in rtw8852c_btc_set_wl_pri()
2703 rtw89_write32_clr(rtwdev, reg, bitmap); in rtw8852c_btc_set_wl_pri()
2728 rtw8852c_btc_set_wl_txpwr_ctrl(struct rtw89_dev *rtwdev, u32 txpwr_val) in rtw8852c_btc_set_wl_txpwr_ctrl() argument
2741 rtw89_mac_txpwr_write32_mask(rtwdev, RTW89_PHY_0, _reg, \ in rtw8852c_btc_set_wl_txpwr_ctrl()
2774 s8 rtw8852c_btc_get_bt_rssi(struct rtw89_dev *rtwdev, s8 val) in rtw8852c_btc_get_bt_rssi() argument
2822 void rtw8852c_btc_bt_aci_imp(struct rtw89_dev *rtwdev) in rtw8852c_btc_bt_aci_imp() argument
2824 struct rtw89_btc *btc = &rtwdev->btc; in rtw8852c_btc_bt_aci_imp()
2835 void rtw8852c_btc_update_bt_cnt(struct rtw89_dev *rtwdev) in rtw8852c_btc_update_bt_cnt() argument
2841 void rtw8852c_btc_wl_s1_standby(struct rtw89_dev *rtwdev, bool state) in rtw8852c_btc_wl_s1_standby() argument
2843 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWE, RFREG_MASK, 0x80000); in rtw8852c_btc_wl_s1_standby()
2844 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWA, RFREG_MASK, 0x1); in rtw8852c_btc_wl_s1_standby()
2845 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD1, RFREG_MASK, 0x620); in rtw8852c_btc_wl_s1_standby()
2849 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, in rtw8852c_btc_wl_s1_standby()
2852 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, in rtw8852c_btc_wl_s1_standby()
2855 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWE, RFREG_MASK, 0x0); in rtw8852c_btc_wl_s1_standby()
2858 static void rtw8852c_set_wl_lna2(struct rtw89_dev *rtwdev, u8 level) in rtw8852c_set_wl_lna2() argument
2867 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWE, RFREG_MASK, 0x1000); in rtw8852c_set_wl_lna2()
2868 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWA, RFREG_MASK, 0x0); in rtw8852c_set_wl_lna2()
2869 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, RFREG_MASK, 0x15); in rtw8852c_set_wl_lna2()
2870 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWA, RFREG_MASK, 0x1); in rtw8852c_set_wl_lna2()
2871 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, RFREG_MASK, 0x17); in rtw8852c_set_wl_lna2()
2872 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWA, RFREG_MASK, 0x2); in rtw8852c_set_wl_lna2()
2873 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, RFREG_MASK, 0x15); in rtw8852c_set_wl_lna2()
2874 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWA, RFREG_MASK, 0x3); in rtw8852c_set_wl_lna2()
2875 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, RFREG_MASK, 0x17); in rtw8852c_set_wl_lna2()
2876 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWE, RFREG_MASK, 0x0); in rtw8852c_set_wl_lna2()
2879 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWE, RFREG_MASK, 0x1000); in rtw8852c_set_wl_lna2()
2880 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWA, RFREG_MASK, 0x0); in rtw8852c_set_wl_lna2()
2881 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, RFREG_MASK, 0x15); in rtw8852c_set_wl_lna2()
2882 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWA, RFREG_MASK, 0x1); in rtw8852c_set_wl_lna2()
2883 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, RFREG_MASK, 0x5); in rtw8852c_set_wl_lna2()
2884 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWA, RFREG_MASK, 0x2); in rtw8852c_set_wl_lna2()
2885 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, RFREG_MASK, 0x15); in rtw8852c_set_wl_lna2()
2886 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWA, RFREG_MASK, 0x3); in rtw8852c_set_wl_lna2()
2887 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, RFREG_MASK, 0x5); in rtw8852c_set_wl_lna2()
2888 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWE, RFREG_MASK, 0x0); in rtw8852c_set_wl_lna2()
2893 static void rtw8852c_btc_set_wl_rx_gain(struct rtw89_dev *rtwdev, u32 level) in rtw8852c_btc_set_wl_rx_gain() argument
2897 rtw8852c_bb_ctrl_btc_preagc(rtwdev, false); in rtw8852c_btc_set_wl_rx_gain()
2898 rtw8852c_set_wl_lna2(rtwdev, 0); in rtw8852c_btc_set_wl_rx_gain()
2901 rtw8852c_bb_ctrl_btc_preagc(rtwdev, true); in rtw8852c_btc_set_wl_rx_gain()
2902 rtw8852c_set_wl_lna2(rtwdev, 0); in rtw8852c_btc_set_wl_rx_gain()
2905 rtw8852c_bb_ctrl_btc_preagc(rtwdev, false); in rtw8852c_btc_set_wl_rx_gain()
2906 rtw8852c_set_wl_lna2(rtwdev, 1); in rtw8852c_btc_set_wl_rx_gain()
2911 static void rtw8852c_fill_freq_with_ppdu(struct rtw89_dev *rtwdev, in rtw8852c_fill_freq_with_ppdu() argument
2922 rtw8852c_decode_chan_idx(rtwdev, chan_idx, &ch, &band); in rtw8852c_fill_freq_with_ppdu()
2927 static void rtw8852c_query_ppdu(struct rtw89_dev *rtwdev, in rtw8852c_query_ppdu() argument
2935 for (path = 0; path < rtwdev->chip->rf_path_num; path++) { in rtw8852c_query_ppdu()
2940 rtw8852c_fill_freq_with_ppdu(rtwdev, phy_ppdu, status); in rtw8852c_query_ppdu()
2943 static int rtw8852c_mac_enable_bb_rf(struct rtw89_dev *rtwdev) in rtw8852c_mac_enable_bb_rf() argument
2947 rtw89_write8_set(rtwdev, R_AX_SYS_FUNC_EN, in rtw8852c_mac_enable_bb_rf()
2950 rtw89_write32_set(rtwdev, R_AX_WLRF_CTRL, B_AX_AFC_AFEDIG); in rtw8852c_mac_enable_bb_rf()
2951 rtw89_write32_clr(rtwdev, R_AX_WLRF_CTRL, B_AX_AFC_AFEDIG); in rtw8852c_mac_enable_bb_rf()
2952 rtw89_write32_set(rtwdev, R_AX_WLRF_CTRL, B_AX_AFC_AFEDIG); in rtw8852c_mac_enable_bb_rf()
2954 rtw89_write32_mask(rtwdev, R_AX_AFE_OFF_CTRL1, B_AX_S0_LDO_VSEL_F_MASK, 0x1); in rtw8852c_mac_enable_bb_rf()
2955 rtw89_write32_mask(rtwdev, R_AX_AFE_OFF_CTRL1, B_AX_S1_LDO_VSEL_F_MASK, 0x1); in rtw8852c_mac_enable_bb_rf()
2957 ret = rtw89_mac_write_xtal_si(rtwdev, XTAL0, 0x7, FULL_BIT_MASK); in rtw8852c_mac_enable_bb_rf()
2961 ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0x6c, FULL_BIT_MASK); in rtw8852c_mac_enable_bb_rf()
2965 ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_WL_RFC_S0, 0xc7, FULL_BIT_MASK); in rtw8852c_mac_enable_bb_rf()
2969 ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_WL_RFC_S1, 0xc7, FULL_BIT_MASK); in rtw8852c_mac_enable_bb_rf()
2973 ret = rtw89_mac_write_xtal_si(rtwdev, XTAL3, 0xd, FULL_BIT_MASK); in rtw8852c_mac_enable_bb_rf()
2980 static int rtw8852c_mac_disable_bb_rf(struct rtw89_dev *rtwdev) in rtw8852c_mac_disable_bb_rf() argument
2982 rtw89_write8_clr(rtwdev, R_AX_SYS_FUNC_EN, in rtw8852c_mac_disable_bb_rf()