Lines Matching refs:rtwdev
15 static u8 _kpath(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) in _kpath() argument
17 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RFK]dbcc_en: %x, PHY%d\n", in _kpath()
18 rtwdev->dbcc_en, phy_idx); in _kpath()
20 if (!rtwdev->dbcc_en) in _kpath()
34 static void _rfk_backup_bb_reg(struct rtw89_dev *rtwdev, u32 backup_bb_reg_val[]) in _rfk_backup_bb_reg() argument
40 rtw89_phy_read32_mask(rtwdev, rtw8852a_backup_bb_regs[i], in _rfk_backup_bb_reg()
42 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _rfk_backup_bb_reg()
48 static void _rfk_backup_rf_reg(struct rtw89_dev *rtwdev, u32 backup_rf_reg_val[], in _rfk_backup_rf_reg() argument
55 rtw89_read_rf(rtwdev, rf_path, in _rfk_backup_rf_reg()
57 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _rfk_backup_rf_reg()
63 static void _rfk_restore_bb_reg(struct rtw89_dev *rtwdev, in _rfk_restore_bb_reg() argument
69 rtw89_phy_write32_mask(rtwdev, rtw8852a_backup_bb_regs[i], in _rfk_restore_bb_reg()
71 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _rfk_restore_bb_reg()
77 static void _rfk_restore_rf_reg(struct rtw89_dev *rtwdev, in _rfk_restore_rf_reg() argument
83 rtw89_write_rf(rtwdev, rf_path, rtw8852a_backup_rf_regs[i], in _rfk_restore_rf_reg()
86 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _rfk_restore_rf_reg()
92 static void _wait_rx_mode(struct rtw89_dev *rtwdev, u8 kpath) in _wait_rx_mode() argument
103 2, 5000, false, rtwdev, path, 0x00, in _wait_rx_mode()
105 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _wait_rx_mode()
111 static void _dack_dump(struct rtw89_dev *rtwdev) in _dack_dump() argument
113 struct rtw89_dack_info *dack = &rtwdev->dack; in _dack_dump()
117 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _dack_dump()
120 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _dack_dump()
123 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _dack_dump()
126 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _dack_dump()
130 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _dack_dump()
133 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _dack_dump()
137 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S0 MSBK ic:\n"); in _dack_dump()
140 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0x%x\n", t); in _dack_dump()
142 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S0 MSBK qc:\n"); in _dack_dump()
145 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0x%x\n", t); in _dack_dump()
147 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S1 MSBK ic:\n"); in _dack_dump()
150 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0x%x\n", t); in _dack_dump()
152 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S1 MSBK qc:\n"); in _dack_dump()
155 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0x%x\n", t); in _dack_dump()
159 static void _afe_init(struct rtw89_dev *rtwdev) in _afe_init() argument
161 rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_afe_init_defs_tbl); in _afe_init()
164 static void _addck_backup(struct rtw89_dev *rtwdev) in _addck_backup() argument
166 struct rtw89_dack_info *dack = &rtwdev->dack; in _addck_backup()
168 rtw89_phy_write32_clr(rtwdev, R_S0_RXDC2, B_S0_RXDC2_SEL); in _addck_backup()
169 dack->addck_d[0][0] = (u16)rtw89_phy_read32_mask(rtwdev, R_S0_ADDCK, in _addck_backup()
171 dack->addck_d[0][1] = (u16)rtw89_phy_read32_mask(rtwdev, R_S0_ADDCK, in _addck_backup()
174 rtw89_phy_write32_clr(rtwdev, R_S1_RXDC2, B_S1_RXDC2_SEL); in _addck_backup()
175 dack->addck_d[1][0] = (u16)rtw89_phy_read32_mask(rtwdev, R_S1_ADDCK, in _addck_backup()
177 dack->addck_d[1][1] = (u16)rtw89_phy_read32_mask(rtwdev, R_S1_ADDCK, in _addck_backup()
181 static void _addck_reload(struct rtw89_dev *rtwdev) in _addck_reload() argument
183 struct rtw89_dack_info *dack = &rtwdev->dack; in _addck_reload()
185 rtw89_phy_write32_mask(rtwdev, R_S0_RXDC, B_S0_RXDC_I, dack->addck_d[0][0]); in _addck_reload()
186 rtw89_phy_write32_mask(rtwdev, R_S0_RXDC2, B_S0_RXDC2_Q2, in _addck_reload()
188 rtw89_phy_write32_mask(rtwdev, R_S0_RXDC, B_S0_RXDC_Q, in _addck_reload()
190 rtw89_phy_write32_set(rtwdev, R_S0_RXDC2, B_S0_RXDC2_MEN); in _addck_reload()
191 rtw89_phy_write32_mask(rtwdev, R_S1_RXDC, B_S1_RXDC_I, dack->addck_d[1][0]); in _addck_reload()
192 rtw89_phy_write32_mask(rtwdev, R_S1_RXDC2, B_S1_RXDC2_Q2, in _addck_reload()
194 rtw89_phy_write32_mask(rtwdev, R_S1_RXDC, B_S1_RXDC_Q, in _addck_reload()
196 rtw89_phy_write32_set(rtwdev, R_S1_RXDC2, B_S1_RXDC2_EN); in _addck_reload()
199 static void _dack_backup_s0(struct rtw89_dev *rtwdev) in _dack_backup_s0() argument
201 struct rtw89_dack_info *dack = &rtwdev->dack; in _dack_backup_s0()
204 rtw89_phy_write32_set(rtwdev, R_S0_DACKI, B_S0_DACKI_EN); in _dack_backup_s0()
205 rtw89_phy_write32_set(rtwdev, R_S0_DACKQ, B_S0_DACKQ_EN); in _dack_backup_s0()
206 rtw89_phy_write32_set(rtwdev, R_P0_NRBW, B_P0_NRBW_DBG); in _dack_backup_s0()
209 rtw89_phy_write32_mask(rtwdev, R_S0_DACKI, B_S0_DACKI_AR, i); in _dack_backup_s0()
211 (u8)rtw89_phy_read32_mask(rtwdev, R_S0_DACKI7, B_S0_DACKI7_K); in _dack_backup_s0()
212 rtw89_phy_write32_mask(rtwdev, R_S0_DACKQ, B_S0_DACKQ_AR, i); in _dack_backup_s0()
214 (u8)rtw89_phy_read32_mask(rtwdev, R_S0_DACKQ7, B_S0_DACKQ7_K); in _dack_backup_s0()
216 dack->biask_d[0][0] = (u16)rtw89_phy_read32_mask(rtwdev, R_S0_DACKI2, in _dack_backup_s0()
218 dack->biask_d[0][1] = (u16)rtw89_phy_read32_mask(rtwdev, R_S0_DACKQ2, in _dack_backup_s0()
220 dack->dadck_d[0][0] = (u8)rtw89_phy_read32_mask(rtwdev, R_S0_DACKI8, in _dack_backup_s0()
222 dack->dadck_d[0][1] = (u8)rtw89_phy_read32_mask(rtwdev, R_S0_DACKQ8, in _dack_backup_s0()
226 static void _dack_backup_s1(struct rtw89_dev *rtwdev) in _dack_backup_s1() argument
228 struct rtw89_dack_info *dack = &rtwdev->dack; in _dack_backup_s1()
231 rtw89_phy_write32_set(rtwdev, R_S1_DACKI, B_S1_DACKI_EN); in _dack_backup_s1()
232 rtw89_phy_write32_set(rtwdev, R_S1_DACKQ, B_S1_DACKQ_EN); in _dack_backup_s1()
233 rtw89_phy_write32_set(rtwdev, R_P1_DBGMOD, B_P1_DBGMOD_ON); in _dack_backup_s1()
236 rtw89_phy_write32_mask(rtwdev, R_S1_DACKI, B_S1_DACKI_AR, i); in _dack_backup_s1()
238 (u8)rtw89_phy_read32_mask(rtwdev, R_S1_DACKI7, B_S1_DACKI_K); in _dack_backup_s1()
239 rtw89_phy_write32_mask(rtwdev, R_S1_DACKQ, B_S1_DACKQ_AR, i); in _dack_backup_s1()
241 (u8)rtw89_phy_read32_mask(rtwdev, R_S1_DACKQ7, B_S1_DACKQ7_K); in _dack_backup_s1()
244 (u16)rtw89_phy_read32_mask(rtwdev, R_S1_DACKI2, B_S1_DACKI2_K); in _dack_backup_s1()
246 (u16)rtw89_phy_read32_mask(rtwdev, R_S1_DACKQ2, B_S1_DACKQ2_K); in _dack_backup_s1()
248 (u8)rtw89_phy_read32_mask(rtwdev, R_S1_DACKI8, B_S1_DACKI8_K) - 8; in _dack_backup_s1()
250 (u8)rtw89_phy_read32_mask(rtwdev, R_S1_DACKQ8, B_S1_DACKQ8_K) - 8; in _dack_backup_s1()
253 static void _dack_reload_by_path(struct rtw89_dev *rtwdev, in _dack_reload_by_path() argument
256 struct rtw89_dack_info *dack = &rtwdev->dack; in _dack_reload_by_path()
277 rtw89_phy_write32(rtwdev, tmp_reg, tmp); in _dack_reload_by_path()
278 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0x%x=0x%x\n", tmp_reg, in _dack_reload_by_path()
279 rtw89_phy_read32_mask(rtwdev, tmp_reg, MASKDWORD)); in _dack_reload_by_path()
285 rtw89_phy_write32(rtwdev, tmp_reg, tmp); in _dack_reload_by_path()
286 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0x%x=0x%x\n", tmp_reg, in _dack_reload_by_path()
287 rtw89_phy_read32_mask(rtwdev, tmp_reg, MASKDWORD)); in _dack_reload_by_path()
293 rtw89_phy_write32(rtwdev, tmp_reg, tmp); in _dack_reload_by_path()
294 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0x%x=0x%x\n", tmp_reg, in _dack_reload_by_path()
295 rtw89_phy_read32_mask(rtwdev, tmp_reg, MASKDWORD)); in _dack_reload_by_path()
301 rtw89_phy_write32(rtwdev, tmp_reg, tmp); in _dack_reload_by_path()
302 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0x%x=0x%x\n", tmp_reg, in _dack_reload_by_path()
303 rtw89_phy_read32_mask(rtwdev, tmp_reg, MASKDWORD)); in _dack_reload_by_path()
309 rtw89_phy_write32(rtwdev, tmp_reg, tmp); in _dack_reload_by_path()
312 static void _dack_reload(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) in _dack_reload() argument
317 _dack_reload_by_path(rtwdev, path, i); in _dack_reload()
319 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _dack_reload()
325 static void _check_addc(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) in _check_addc() argument
331 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _check_addc()
336 tmp = rtw89_phy_read32_mask(rtwdev, R_DBG32_D, MASKDWORD); in _check_addc()
344 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _check_addc()
348 static void _addck(struct rtw89_dev *rtwdev) in _addck() argument
350 struct rtw89_dack_info *dack = &rtwdev->dack; in _addck()
355 rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_addck_reset_defs_a_tbl); in _addck()
357 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]before S0 ADDCK\n"); in _addck()
358 _check_addc(rtwdev, RF_PATH_A); in _addck()
360 rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_addck_trigger_defs_a_tbl); in _addck()
363 false, rtwdev, 0x1e00, BIT(0)); in _addck()
365 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S0 ADDCK timeout\n"); in _addck()
368 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]ADDCK ret = %d\n", ret); in _addck()
369 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]after S0 ADDCK\n"); in _addck()
370 _check_addc(rtwdev, RF_PATH_A); in _addck()
372 rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_addck_restore_defs_a_tbl); in _addck()
375 rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_addck_reset_defs_b_tbl); in _addck()
377 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]before S1 ADDCK\n"); in _addck()
378 _check_addc(rtwdev, RF_PATH_B); in _addck()
380 rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_addck_trigger_defs_b_tbl); in _addck()
383 false, rtwdev, 0x3e00, BIT(0)); in _addck()
385 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S1 ADDCK timeout\n"); in _addck()
388 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]ADDCK ret = %d\n", ret); in _addck()
389 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]after S1 ADDCK\n"); in _addck()
390 _check_addc(rtwdev, RF_PATH_B); in _addck()
392 rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_addck_restore_defs_b_tbl); in _addck()
395 static void _check_dadc(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) in _check_dadc() argument
397 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _check_dadc()
401 _check_addc(rtwdev, path); in _check_dadc()
403 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _check_dadc()
408 static void _dack_s0(struct rtw89_dev *rtwdev) in _dack_s0() argument
410 struct rtw89_dack_info *dack = &rtwdev->dack; in _dack_s0()
414 rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_dack_defs_f_a_tbl); in _dack_s0()
417 false, rtwdev, 0x5e28, BIT(15)); in _dack_s0()
419 false, rtwdev, 0x5e78, BIT(15)); in _dack_s0()
421 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S0 MSBK timeout\n"); in _dack_s0()
424 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK ret = %d\n", ret); in _dack_s0()
426 rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_dack_defs_m_a_tbl); in _dack_s0()
429 false, rtwdev, 0x5e48, BIT(17)); in _dack_s0()
431 false, rtwdev, 0x5e98, BIT(17)); in _dack_s0()
433 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S0 DADACK timeout\n"); in _dack_s0()
436 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK ret = %d\n", ret); in _dack_s0()
438 rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_dack_defs_r_a_tbl); in _dack_s0()
440 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]after S0 DADCK\n"); in _dack_s0()
441 _check_dadc(rtwdev, RF_PATH_A); in _dack_s0()
443 _dack_backup_s0(rtwdev); in _dack_s0()
444 _dack_reload(rtwdev, RF_PATH_A); in _dack_s0()
446 rtw89_phy_write32_clr(rtwdev, R_P0_NRBW, B_P0_NRBW_DBG); in _dack_s0()
449 static void _dack_s1(struct rtw89_dev *rtwdev) in _dack_s1() argument
451 struct rtw89_dack_info *dack = &rtwdev->dack; in _dack_s1()
455 rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_dack_defs_f_b_tbl); in _dack_s1()
458 false, rtwdev, 0x7e28, BIT(15)); in _dack_s1()
460 false, rtwdev, 0x7e78, BIT(15)); in _dack_s1()
462 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S1 MSBK timeout\n"); in _dack_s1()
465 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK ret = %d\n", ret); in _dack_s1()
467 rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_dack_defs_m_b_tbl); in _dack_s1()
470 false, rtwdev, 0x7e48, BIT(17)); in _dack_s1()
472 false, rtwdev, 0x7e98, BIT(17)); in _dack_s1()
474 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S1 DADCK timeout\n"); in _dack_s1()
477 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK ret = %d\n", ret); in _dack_s1()
479 rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_dack_defs_r_b_tbl); in _dack_s1()
481 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]after S1 DADCK\n"); in _dack_s1()
482 _check_dadc(rtwdev, RF_PATH_B); in _dack_s1()
484 _dack_backup_s1(rtwdev); in _dack_s1()
485 _dack_reload(rtwdev, RF_PATH_B); in _dack_s1()
487 rtw89_phy_write32_clr(rtwdev, R_P1_DBGMOD, B_P1_DBGMOD_ON); in _dack_s1()
490 static void _dack(struct rtw89_dev *rtwdev) in _dack() argument
492 _dack_s0(rtwdev); in _dack()
493 _dack_s1(rtwdev); in _dack()
496 static void _dac_cal(struct rtw89_dev *rtwdev, bool force) in _dac_cal() argument
498 struct rtw89_dack_info *dack = &rtwdev->dack; in _dac_cal()
500 u8 phy_map = rtw89_btc_phymap(rtwdev, RTW89_PHY_0, RF_AB); in _dac_cal()
503 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK b\n"); in _dac_cal()
504 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK start!!!\n"); in _dac_cal()
505 rf0_0 = rtw89_read_rf(rtwdev, RF_PATH_A, RR_MOD, RFREG_MASK); in _dac_cal()
506 rf1_0 = rtw89_read_rf(rtwdev, RF_PATH_B, RR_MOD, RFREG_MASK); in _dac_cal()
507 _afe_init(rtwdev); in _dac_cal()
508 rtw89_write_rf(rtwdev, RF_PATH_A, RR_RSV1, RR_RSV1_RST, 0x0); in _dac_cal()
509 rtw89_write_rf(rtwdev, RF_PATH_B, RR_RSV1, RR_RSV1_RST, 0x0); in _dac_cal()
510 rtw89_write_rf(rtwdev, RF_PATH_A, RR_MOD, RFREG_MASK, 0x30001); in _dac_cal()
511 rtw89_write_rf(rtwdev, RF_PATH_B, RR_MOD, RFREG_MASK, 0x30001); in _dac_cal()
512 rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DACK, BTC_WRFK_ONESHOT_START); in _dac_cal()
513 _addck(rtwdev); in _dac_cal()
514 rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DACK, BTC_WRFK_ONESHOT_STOP); in _dac_cal()
515 _addck_backup(rtwdev); in _dac_cal()
516 _addck_reload(rtwdev); in _dac_cal()
517 rtw89_write_rf(rtwdev, RF_PATH_A, RR_MOD, RFREG_MASK, 0x40001); in _dac_cal()
518 rtw89_write_rf(rtwdev, RF_PATH_B, RR_MOD, RFREG_MASK, 0x40001); in _dac_cal()
519 rtw89_write_rf(rtwdev, RF_PATH_A, RR_MODOPT, RFREG_MASK, 0x0); in _dac_cal()
520 rtw89_write_rf(rtwdev, RF_PATH_B, RR_MODOPT, RFREG_MASK, 0x0); in _dac_cal()
521 rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DACK, BTC_WRFK_ONESHOT_START); in _dac_cal()
522 _dack(rtwdev); in _dac_cal()
523 rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DACK, BTC_WRFK_ONESHOT_STOP); in _dac_cal()
524 _dack_dump(rtwdev); in _dac_cal()
526 rtw89_write_rf(rtwdev, RF_PATH_A, RR_MOD, RFREG_MASK, rf0_0); in _dac_cal()
527 rtw89_write_rf(rtwdev, RF_PATH_B, RR_MOD, RFREG_MASK, rf1_0); in _dac_cal()
528 rtw89_write_rf(rtwdev, RF_PATH_A, RR_RSV1, RR_RSV1_RST, 0x1); in _dac_cal()
529 rtw89_write_rf(rtwdev, RF_PATH_B, RR_RSV1, RR_RSV1_RST, 0x1); in _dac_cal()
531 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK finish!!!\n"); in _dac_cal()
551 static void _iqk_read_fft_dbcc0(struct rtw89_dev *rtwdev, u8 path) in _iqk_read_fft_dbcc0() argument
556 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__); in _iqk_read_fft_dbcc0()
557 rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, MASKDWORD, 0x00160000); in _iqk_read_fft_dbcc0()
558 fft[0] = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKDWORD); in _iqk_read_fft_dbcc0()
559 rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, MASKDWORD, 0x00170000); in _iqk_read_fft_dbcc0()
560 fft[1] = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKDWORD); in _iqk_read_fft_dbcc0()
561 rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, MASKDWORD, 0x00180000); in _iqk_read_fft_dbcc0()
562 fft[2] = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKDWORD); in _iqk_read_fft_dbcc0()
563 rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, MASKDWORD, 0x00190000); in _iqk_read_fft_dbcc0()
564 fft[3] = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKDWORD); in _iqk_read_fft_dbcc0()
565 rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, MASKDWORD, 0x001a0000); in _iqk_read_fft_dbcc0()
566 fft[4] = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKDWORD); in _iqk_read_fft_dbcc0()
567 rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, MASKDWORD, 0x001b0000); in _iqk_read_fft_dbcc0()
568 fft[5] = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKDWORD); in _iqk_read_fft_dbcc0()
570 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x,fft[%x]= %x\n", in _iqk_read_fft_dbcc0()
574 static void _iqk_read_xym_dbcc0(struct rtw89_dev *rtwdev, u8 path) in _iqk_read_xym_dbcc0() argument
579 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__); in _iqk_read_xym_dbcc0()
580 rtw89_phy_write32_mask(rtwdev, R_NCTL_CFG, B_NCTL_CFG_SPAGE, path); in _iqk_read_xym_dbcc0()
581 rtw89_phy_write32_mask(rtwdev, R_IQK_DIF, B_IQK_DIF_TRX, 0x1); in _iqk_read_xym_dbcc0()
584 rtw89_phy_write32_mask(rtwdev, R_NCTL_N2, MASKDWORD, 0x000000c0 + i); in _iqk_read_xym_dbcc0()
585 rtw89_phy_write32_clr(rtwdev, R_NCTL_N2, MASKDWORD); in _iqk_read_xym_dbcc0()
586 tmp = rtw89_phy_read32_mask(rtwdev, R_TXIQC + (path << 8), MASKDWORD); in _iqk_read_xym_dbcc0()
587 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, 0x8%lx38 = %x\n", in _iqk_read_xym_dbcc0()
591 rtw89_phy_write32_clr(rtwdev, R_IQK_DIF, B_IQK_DIF_TRX); in _iqk_read_xym_dbcc0()
592 rtw89_phy_write32_mask(rtwdev, R_TXIQC + (path << 8), MASKDWORD, 0x40000000); in _iqk_read_xym_dbcc0()
593 rtw89_phy_write32_mask(rtwdev, R_NCTL_N2, MASKDWORD, 0x80010100); in _iqk_read_xym_dbcc0()
597 static void _iqk_read_txcfir_dbcc0(struct rtw89_dev *rtwdev, u8 path, in _iqk_read_txcfir_dbcc0() argument
609 rtw89_warn(rtwdev, "cfir path %d out of range\n", path); in _iqk_read_txcfir_dbcc0()
613 rtw89_warn(rtwdev, "cfir group %d out of range\n", group); in _iqk_read_txcfir_dbcc0()
617 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__); in _iqk_read_txcfir_dbcc0()
618 rtw89_phy_write32_mask(rtwdev, R_W_COEF + (path << 8), MASKDWORD, 0x00000001); in _iqk_read_txcfir_dbcc0()
623 tmp = rtw89_phy_read32_mask(rtwdev, base_addr + (idx << 2), MASKDWORD); in _iqk_read_txcfir_dbcc0()
624 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _iqk_read_txcfir_dbcc0()
630 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]\n"); in _iqk_read_txcfir_dbcc0()
631 tmp = rtw89_phy_read32_mask(rtwdev, R_TXCFIR_P0C0, MASKDWORD); in _iqk_read_txcfir_dbcc0()
632 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] 0x8f50 = %x\n", tmp); in _iqk_read_txcfir_dbcc0()
633 tmp = rtw89_phy_read32_mask(rtwdev, R_TXCFIR_P0C1, MASKDWORD); in _iqk_read_txcfir_dbcc0()
634 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] 0x8f84 = %x\n", tmp); in _iqk_read_txcfir_dbcc0()
635 tmp = rtw89_phy_read32_mask(rtwdev, R_TXCFIR_P0C2, MASKDWORD); in _iqk_read_txcfir_dbcc0()
636 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] 0x8fb8 = %x\n", tmp); in _iqk_read_txcfir_dbcc0()
637 tmp = rtw89_phy_read32_mask(rtwdev, R_TXCFIR_P0C3, MASKDWORD); in _iqk_read_txcfir_dbcc0()
638 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] 0x8fec = %x\n", tmp); in _iqk_read_txcfir_dbcc0()
640 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]\n"); in _iqk_read_txcfir_dbcc0()
641 tmp = rtw89_phy_read32_mask(rtwdev, R_TXCFIR_P1C0, MASKDWORD); in _iqk_read_txcfir_dbcc0()
642 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] 0x9350 = %x\n", tmp); in _iqk_read_txcfir_dbcc0()
643 tmp = rtw89_phy_read32_mask(rtwdev, R_TXCFIR_P1C1, MASKDWORD); in _iqk_read_txcfir_dbcc0()
644 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] 0x9384 = %x\n", tmp); in _iqk_read_txcfir_dbcc0()
645 tmp = rtw89_phy_read32_mask(rtwdev, R_TXCFIR_P1C2, MASKDWORD); in _iqk_read_txcfir_dbcc0()
646 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] 0x93b8 = %x\n", tmp); in _iqk_read_txcfir_dbcc0()
647 tmp = rtw89_phy_read32_mask(rtwdev, R_TXCFIR_P1C3, MASKDWORD); in _iqk_read_txcfir_dbcc0()
648 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] 0x93ec = %x\n", tmp); in _iqk_read_txcfir_dbcc0()
650 rtw89_phy_write32_clr(rtwdev, R_W_COEF + (path << 8), MASKDWORD); in _iqk_read_txcfir_dbcc0()
651 rtw89_phy_write32_mask(rtwdev, R_KIP_RPT + (path << 8), B_KIP_RPT_SEL, 0xc); in _iqk_read_txcfir_dbcc0()
653 tmp = rtw89_phy_read32_mask(rtwdev, R_RPT_PER + (path << 8), MASKDWORD); in _iqk_read_txcfir_dbcc0()
654 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, 0x8%lxfc = %x\n", path, in _iqk_read_txcfir_dbcc0()
658 static void _iqk_read_rxcfir_dbcc0(struct rtw89_dev *rtwdev, u8 path, in _iqk_read_rxcfir_dbcc0() argument
670 rtw89_warn(rtwdev, "cfir path %d out of range\n", path); in _iqk_read_rxcfir_dbcc0()
674 rtw89_warn(rtwdev, "cfir group %d out of range\n", group); in _iqk_read_rxcfir_dbcc0()
678 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__); in _iqk_read_rxcfir_dbcc0()
679 rtw89_phy_write32_mask(rtwdev, R_W_COEF + (path << 8), MASKDWORD, 0x00000001); in _iqk_read_rxcfir_dbcc0()
683 tmp = rtw89_phy_read32_mask(rtwdev, base_addr + (idx << 2), MASKDWORD); in _iqk_read_rxcfir_dbcc0()
684 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _iqk_read_rxcfir_dbcc0()
690 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]\n"); in _iqk_read_rxcfir_dbcc0()
691 tmp = rtw89_phy_read32_mask(rtwdev, R_RXCFIR_P0C0, MASKDWORD); in _iqk_read_rxcfir_dbcc0()
692 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] 0x8d40 = %x\n", tmp); in _iqk_read_rxcfir_dbcc0()
693 tmp = rtw89_phy_read32_mask(rtwdev, R_RXCFIR_P0C1, MASKDWORD); in _iqk_read_rxcfir_dbcc0()
694 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] 0x8d84 = %x\n", tmp); in _iqk_read_rxcfir_dbcc0()
695 tmp = rtw89_phy_read32_mask(rtwdev, R_RXCFIR_P0C2, MASKDWORD); in _iqk_read_rxcfir_dbcc0()
696 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] 0x8dc8 = %x\n", tmp); in _iqk_read_rxcfir_dbcc0()
697 tmp = rtw89_phy_read32_mask(rtwdev, R_RXCFIR_P0C3, MASKDWORD); in _iqk_read_rxcfir_dbcc0()
698 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] 0x8e0c = %x\n", tmp); in _iqk_read_rxcfir_dbcc0()
700 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]\n"); in _iqk_read_rxcfir_dbcc0()
701 tmp = rtw89_phy_read32_mask(rtwdev, R_RXCFIR_P1C0, MASKDWORD); in _iqk_read_rxcfir_dbcc0()
702 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] 0x9140 = %x\n", tmp); in _iqk_read_rxcfir_dbcc0()
703 tmp = rtw89_phy_read32_mask(rtwdev, R_RXCFIR_P1C1, MASKDWORD); in _iqk_read_rxcfir_dbcc0()
704 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] 0x9184 = %x\n", tmp); in _iqk_read_rxcfir_dbcc0()
705 tmp = rtw89_phy_read32_mask(rtwdev, R_RXCFIR_P1C2, MASKDWORD); in _iqk_read_rxcfir_dbcc0()
706 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] 0x91c8 = %x\n", tmp); in _iqk_read_rxcfir_dbcc0()
707 tmp = rtw89_phy_read32_mask(rtwdev, R_RXCFIR_P1C3, MASKDWORD); in _iqk_read_rxcfir_dbcc0()
708 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] 0x920c = %x\n", tmp); in _iqk_read_rxcfir_dbcc0()
710 rtw89_phy_write32_clr(rtwdev, R_W_COEF + (path << 8), MASKDWORD); in _iqk_read_rxcfir_dbcc0()
711 rtw89_phy_write32_mask(rtwdev, R_KIP_RPT + (path << 8), B_KIP_RPT_SEL, 0xd); in _iqk_read_rxcfir_dbcc0()
712 tmp = rtw89_phy_read32_mask(rtwdev, R_RPT_PER + (path << 8), MASKDWORD); in _iqk_read_rxcfir_dbcc0()
713 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, 0x8%lxfc = %x\n", path, in _iqk_read_rxcfir_dbcc0()
717 static void _iqk_sram(struct rtw89_dev *rtwdev, u8 path) in _iqk_sram() argument
722 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__); in _iqk_sram()
723 rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, MASKDWORD, 0x00020000); in _iqk_sram()
724 rtw89_phy_write32_mask(rtwdev, R_SRAM_IQRX2, MASKDWORD, 0x00000080); in _iqk_sram()
725 rtw89_phy_write32_mask(rtwdev, R_SRAM_IQRX, MASKDWORD, 0x00010000); in _iqk_sram()
726 rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_TXT, 0x009); in _iqk_sram()
729 rtw89_phy_write32_mask(rtwdev, R_SRAM_IQRX, MASKDWORD, 0x00010000 + i); in _iqk_sram()
730 tmp = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_DCI); in _iqk_sram()
731 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]0x%x\n", tmp); in _iqk_sram()
735 rtw89_phy_write32_mask(rtwdev, R_SRAM_IQRX, MASKDWORD, 0x00010000 + i); in _iqk_sram()
736 tmp = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_DCQ); in _iqk_sram()
737 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]0x%x\n", tmp); in _iqk_sram()
739 rtw89_phy_write32_clr(rtwdev, R_SRAM_IQRX2, MASKDWORD); in _iqk_sram()
740 rtw89_phy_write32_clr(rtwdev, R_SRAM_IQRX, MASKDWORD); in _iqk_sram()
743 static void _iqk_rxk_setting(struct rtw89_dev *rtwdev, u8 path) in _iqk_rxk_setting() argument
745 struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; in _iqk_rxk_setting()
748 rtw89_phy_write32_set(rtwdev, R_P0_NRBW + (path << 13), B_P0_NRBW_DBG); in _iqk_rxk_setting()
749 rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15, 0x3); in _iqk_rxk_setting()
750 rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_15, 0xa041); in _iqk_rxk_setting()
752 rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15_H2, 0x3); in _iqk_rxk_setting()
753 rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_FLTRST, 0x0); in _iqk_rxk_setting()
755 rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_FLTRST, 0x1); in _iqk_rxk_setting()
756 rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15_H2, 0x0); in _iqk_rxk_setting()
758 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_RST, 0x0303); in _iqk_rxk_setting()
759 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_RST, 0x0000); in _iqk_rxk_setting()
763 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RR_MOD_V_RXK2); in _iqk_rxk_setting()
764 rtw89_write_rf(rtwdev, path, RR_RXK, RR_RXK_SEL2G, 0x1); in _iqk_rxk_setting()
767 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RR_MOD_V_RXK2); in _iqk_rxk_setting()
768 rtw89_write_rf(rtwdev, path, RR_WLSEL, RR_WLSEL_AG, 0x5); in _iqk_rxk_setting()
769 rtw89_write_rf(rtwdev, path, RR_RXK, RR_RXK_SEL5G, 0x1); in _iqk_rxk_setting()
774 tmp = rtw89_read_rf(rtwdev, path, RR_CFGCH, RFREG_MASK); in _iqk_rxk_setting()
775 rtw89_write_rf(rtwdev, path, RR_RSV4, RFREG_MASK, tmp); in _iqk_rxk_setting()
776 rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_OFF, 0x13); in _iqk_rxk_setting()
777 rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_POW, 0x0); in _iqk_rxk_setting()
778 rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_POW, 0x1); in _iqk_rxk_setting()
782 static bool _iqk_check_cal(struct rtw89_dev *rtwdev, u8 path, u8 ktype) in _iqk_check_cal() argument
789 false, rtwdev, 0xbff8, MASKBYTE0); in _iqk_check_cal()
791 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]IQK timeout!!!\n"); in _iqk_check_cal()
792 rtw89_phy_write32_clr(rtwdev, R_NCTL_N1, MASKBYTE0); in _iqk_check_cal()
793 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, ret=%d\n", path, ret); in _iqk_check_cal()
794 tmp = rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, MASKDWORD); in _iqk_check_cal()
795 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _iqk_check_cal()
801 static bool _iqk_one_shot(struct rtw89_dev *rtwdev, in _iqk_one_shot() argument
804 struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; in _iqk_one_shot()
807 u8 phy_map = rtw89_btc_path_phymap(rtwdev, phy_idx, path); in _iqk_one_shot()
815 rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_ONESHOT_START); in _iqk_one_shot()
821 rtw89_phy_write32_set(rtwdev, addr_rfc_ctl, 0x20000000); in _iqk_one_shot()
822 rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_TXT, 0x009); in _iqk_one_shot()
826 rtw89_phy_write32_set(rtwdev, addr_rfc_ctl, 0x20000000); in _iqk_one_shot()
827 rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_TXT, 0x009); in _iqk_one_shot()
831 rtw89_phy_write32_clr(rtwdev, addr_rfc_ctl, 0x20000000); in _iqk_one_shot()
832 rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_TXT, 0x025); in _iqk_one_shot()
840 rtw89_phy_write32_set(rtwdev, addr_rfc_ctl, 0x20000000); in _iqk_one_shot()
841 rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_RXT, 0x011); in _iqk_one_shot()
846 rtw89_phy_write32_clr(rtwdev, addr_rfc_ctl, 0x20000000); in _iqk_one_shot()
847 rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_TXT, 0x025); in _iqk_one_shot()
851 rtw89_phy_write32_set(rtwdev, addr_rfc_ctl, 0x20000000); in _iqk_one_shot()
852 rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_RXT, 0x011); in _iqk_one_shot()
859 rtw89_phy_write32_mask(rtwdev, R_NCTL_CFG, MASKDWORD, iqk_cmd + 1); in _iqk_one_shot()
860 rtw89_phy_write32_set(rtwdev, R_DPK_CTL, B_DPK_CTL_EN); in _iqk_one_shot()
862 fail = _iqk_check_cal(rtwdev, path, ktype); in _iqk_one_shot()
864 _iqk_read_xym_dbcc0(rtwdev, path); in _iqk_one_shot()
866 _iqk_read_fft_dbcc0(rtwdev, path); in _iqk_one_shot()
868 _iqk_sram(rtwdev, path); in _iqk_one_shot()
871 _iqk_read_txcfir_dbcc0(rtwdev, path, 0x0); in _iqk_one_shot()
872 _iqk_read_txcfir_dbcc0(rtwdev, path, 0x1); in _iqk_one_shot()
873 _iqk_read_txcfir_dbcc0(rtwdev, path, 0x2); in _iqk_one_shot()
874 _iqk_read_txcfir_dbcc0(rtwdev, path, 0x3); in _iqk_one_shot()
876 _iqk_read_rxcfir_dbcc0(rtwdev, path, 0x0); in _iqk_one_shot()
877 _iqk_read_rxcfir_dbcc0(rtwdev, path, 0x1); in _iqk_one_shot()
878 _iqk_read_rxcfir_dbcc0(rtwdev, path, 0x2); in _iqk_one_shot()
879 _iqk_read_rxcfir_dbcc0(rtwdev, path, 0x3); in _iqk_one_shot()
883 rtw89_phy_write32_clr(rtwdev, addr_rfc_ctl, 0x20000000); in _iqk_one_shot()
885 rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_ONESHOT_STOP); in _iqk_one_shot()
890 static bool _rxk_group_sel(struct rtw89_dev *rtwdev, in _rxk_group_sel() argument
893 struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; in _rxk_group_sel()
907 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXG, rxgn_g[gp]); in _rxk_group_sel()
908 rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_C2G, attc2_g[gp]); in _rxk_group_sel()
909 rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_C1G, attc1_g[gp]); in _rxk_group_sel()
912 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXG, rxgn_a[gp]); in _rxk_group_sel()
913 rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RXA2_C2, attc2_a[gp]); in _rxk_group_sel()
914 rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RXA2_C1, attc1_a[gp]); in _rxk_group_sel()
919 rtw89_phy_write32_set(rtwdev, R_IQK_CFG, B_IQK_CFG_SET); in _rxk_group_sel()
920 rf0 = rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK); in _rxk_group_sel()
921 rtw89_phy_write32_mask(rtwdev, R_IQK_DIF2, B_IQK_DIF2_RXPI, in _rxk_group_sel()
923 rtw89_phy_write32_mask(rtwdev, R_IQK_COM, MASKDWORD, 0x40010100); in _rxk_group_sel()
924 rtw89_phy_write32_clr(rtwdev, R_IQK_RES + (path << 8), B_IQK_RES_RXCFIR); in _rxk_group_sel()
925 rtw89_phy_write32_set(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_SEL); in _rxk_group_sel()
926 rtw89_phy_write32_clr(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_G3); in _rxk_group_sel()
927 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_GP, gp); in _rxk_group_sel()
928 rtw89_phy_write32_mask(rtwdev, R_IOQ_IQK_DPK, B_IOQ_IQK_DPK_EN, 0x1); in _rxk_group_sel()
929 rtw89_phy_write32_clr(rtwdev, R_NCTL_N1, B_NCTL_N1_CIP); in _rxk_group_sel()
930 fail = _iqk_one_shot(rtwdev, phy_idx, path, ID_RXK); in _rxk_group_sel()
931 rtw89_phy_write32_mask(rtwdev, R_IQKINF, BIT(16 + gp + path * 4), fail); in _rxk_group_sel()
936 rtw89_write_rf(rtwdev, path, RR_RXK, RR_RXK_SEL2G, 0x0); in _rxk_group_sel()
937 rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_POW, 0x0); in _rxk_group_sel()
940 rtw89_write_rf(rtwdev, path, RR_RXK, RR_RXK_SEL5G, 0x0); in _rxk_group_sel()
941 rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_POW, 0x0); in _rxk_group_sel()
942 rtw89_write_rf(rtwdev, path, RR_WLSEL, RR_WLSEL_AG, 0x0); in _rxk_group_sel()
948 rtw89_phy_write32_mask(rtwdev, R_IQK_RES + (path << 8), in _rxk_group_sel()
954 static bool _iqk_nbrxk(struct rtw89_dev *rtwdev, in _iqk_nbrxk() argument
957 struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; in _iqk_nbrxk()
970 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXG, idxrxgain_g); in _iqk_nbrxk()
971 rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_C2G, idxattc2_g); in _iqk_nbrxk()
972 rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_C1G, idxattc1_g); in _iqk_nbrxk()
975 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXG, idxrxgain_a); in _iqk_nbrxk()
976 rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RXA2_C2, idxattc2_a); in _iqk_nbrxk()
977 rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RXA2_C1, idxattc1_a); in _iqk_nbrxk()
982 rtw89_phy_write32_set(rtwdev, R_IQK_CFG, B_IQK_CFG_SET); in _iqk_nbrxk()
983 rf0 = rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK); in _iqk_nbrxk()
984 rtw89_phy_write32_mask(rtwdev, R_IQK_DIF2, B_IQK_DIF2_RXPI, in _iqk_nbrxk()
986 rtw89_phy_write32_mask(rtwdev, R_IQK_COM, MASKDWORD, 0x40010100); in _iqk_nbrxk()
987 rtw89_phy_write32_clr(rtwdev, R_IQK_RES + (path << 8), B_IQK_RES_RXCFIR); in _iqk_nbrxk()
988 rtw89_phy_write32_set(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_SEL); in _iqk_nbrxk()
989 rtw89_phy_write32_clr(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_G3); in _iqk_nbrxk()
990 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), in _iqk_nbrxk()
992 rtw89_phy_write32_set(rtwdev, R_IOQ_IQK_DPK, B_IOQ_IQK_DPK_EN); in _iqk_nbrxk()
993 rtw89_phy_write32_clr(rtwdev, R_NCTL_N1, B_NCTL_N1_CIP); in _iqk_nbrxk()
994 fail = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBRXK); in _iqk_nbrxk()
998 rtw89_write_rf(rtwdev, path, RR_RXK, RR_RXK_SEL2G, 0x0); in _iqk_nbrxk()
999 rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_POW, 0x0); in _iqk_nbrxk()
1002 rtw89_write_rf(rtwdev, path, RR_RXK, RR_RXK_SEL5G, 0x0); in _iqk_nbrxk()
1003 rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_POW, 0x0); in _iqk_nbrxk()
1004 rtw89_write_rf(rtwdev, path, RR_WLSEL, RR_WLSEL_AG, 0x0); in _iqk_nbrxk()
1010 tmp = rtw89_phy_read32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD); in _iqk_nbrxk()
1018 static void _iqk_rxclk_setting(struct rtw89_dev *rtwdev, u8 path) in _iqk_rxclk_setting() argument
1020 struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; in _iqk_rxclk_setting()
1023 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__); in _iqk_rxclk_setting()
1024 rtw89_phy_write32_mask(rtwdev, R_CFIR_SYS + (path << 8), in _iqk_rxclk_setting()
1026 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK + (path << 13), in _iqk_rxclk_setting()
1028 rtw89_phy_write32_set(rtwdev, R_P0_RXCK + (path << 13), B_P0_RXCK_ON); in _iqk_rxclk_setting()
1029 rtw89_phy_write32_set(rtwdev, R_UPD_CLK_ADC, B_UPD_CLK_ADC_ON); in _iqk_rxclk_setting()
1030 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK_ADC, B_UPD_CLK_ADC_VAL, 0x1); in _iqk_rxclk_setting()
1032 rtw89_phy_write32_mask(rtwdev, R_CFIR_SYS + (path << 8), in _iqk_rxclk_setting()
1034 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK + (path << 13), in _iqk_rxclk_setting()
1036 rtw89_phy_write32_set(rtwdev, R_P0_RXCK + (path << 13), B_P0_RXCK_ON); in _iqk_rxclk_setting()
1037 rtw89_phy_write32_set(rtwdev, R_UPD_CLK_ADC, B_UPD_CLK_ADC_ON); in _iqk_rxclk_setting()
1038 rtw89_phy_write32_clr(rtwdev, R_UPD_CLK_ADC, B_UPD_CLK_ADC_VAL); in _iqk_rxclk_setting()
1042 static bool _txk_group_sel(struct rtw89_dev *rtwdev, in _txk_group_sel() argument
1050 struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; in _txk_group_sel()
1058 rtw89_phy_write32_mask(rtwdev, R_RFGAIN_BND + (path << 8), in _txk_group_sel()
1060 rtw89_write_rf(rtwdev, path, RR_GAINTX, RR_GAINTX_ALL, in _txk_group_sel()
1062 rtw89_write_rf(rtwdev, path, RR_TXG1, RR_TXG1_ATT1, in _txk_group_sel()
1064 rtw89_write_rf(rtwdev, path, RR_TXG2, RR_TXG2_ATT0, in _txk_group_sel()
1066 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _txk_group_sel()
1070 rtw89_phy_write32_mask(rtwdev, R_RFGAIN_BND + (path << 8), in _txk_group_sel()
1072 rtw89_write_rf(rtwdev, path, RR_GAINTX, RR_GAINTX_ALL, in _txk_group_sel()
1074 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _txk_group_sel()
1080 rtw89_phy_write32_clr(rtwdev, R_IQK_RES + (path << 8), B_IQK_RES_TXCFIR); in _txk_group_sel()
1081 rtw89_phy_write32_set(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_SEL); in _txk_group_sel()
1082 rtw89_phy_write32_set(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_G3); in _txk_group_sel()
1083 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), in _txk_group_sel()
1085 rtw89_phy_write32_clr(rtwdev, R_NCTL_N1, B_NCTL_N1_CIP); in _txk_group_sel()
1086 fail = _iqk_one_shot(rtwdev, phy_idx, path, ID_TXK); in _txk_group_sel()
1087 rtw89_phy_write32_mask(rtwdev, R_IQKINF, BIT(8 + gp + path * 4), fail); in _txk_group_sel()
1091 rtw89_phy_write32_mask(rtwdev, R_IQK_RES + (path << 8), in _txk_group_sel()
1094 tmp = rtw89_phy_read32_mask(rtwdev, R_TXIQC + (path << 8), MASKDWORD); in _txk_group_sel()
1095 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, 0x8%lx38 = 0x%x\n", path, in _txk_group_sel()
1100 static bool _iqk_nbtxk(struct rtw89_dev *rtwdev, in _iqk_nbtxk() argument
1103 struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; in _iqk_nbtxk()
1114 rtw89_phy_write32_mask(rtwdev, R_RFGAIN_BND + (path << 8), in _iqk_nbtxk()
1116 rtw89_write_rf(rtwdev, path, RR_GAINTX, RR_GAINTX_ALL, g_mode_txgain); in _iqk_nbtxk()
1117 rtw89_write_rf(rtwdev, path, RR_TXG1, RR_TXG1_ATT1, attsmxr); in _iqk_nbtxk()
1118 rtw89_write_rf(rtwdev, path, RR_TXG2, RR_TXG2_ATT0, attsmxr); in _iqk_nbtxk()
1121 rtw89_phy_write32_mask(rtwdev, R_RFGAIN_BND + (path << 8), in _iqk_nbtxk()
1123 rtw89_write_rf(rtwdev, path, RR_GAINTX, RR_GAINTX_ALL, a_mode_txgain); in _iqk_nbtxk()
1128 rtw89_phy_write32_clr(rtwdev, R_IQK_RES + (path << 8), B_IQK_RES_TXCFIR); in _iqk_nbtxk()
1129 rtw89_phy_write32_set(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_SEL); in _iqk_nbtxk()
1130 rtw89_phy_write32_set(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_G3); in _iqk_nbtxk()
1131 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_GP, group); in _iqk_nbtxk()
1132 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), MASKDWORD, itqt); in _iqk_nbtxk()
1133 rtw89_phy_write32_clr(rtwdev, R_NCTL_N1, B_NCTL_N1_CIP); in _iqk_nbtxk()
1134 fail = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBTXK); in _iqk_nbtxk()
1136 tmp = rtw89_phy_read32_mask(rtwdev, R_TXIQC + (path << 8), MASKDWORD); in _iqk_nbtxk()
1141 tmp = rtw89_phy_read32_mask(rtwdev, R_TXIQC + (path << 8), MASKDWORD); in _iqk_nbtxk()
1142 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, 0x8%lx38 = 0x%x\n", path, in _iqk_nbtxk()
1147 static void _lok_res_table(struct rtw89_dev *rtwdev, u8 path, u8 ibias) in _lok_res_table() argument
1149 struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; in _lok_res_table()
1151 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, ibias = %x\n", path, ibias); in _lok_res_table()
1152 rtw89_write_rf(rtwdev, path, RR_LUTWE, RFREG_MASK, 0x2); in _lok_res_table()
1154 rtw89_write_rf(rtwdev, path, RR_LUTWA, RFREG_MASK, 0x0); in _lok_res_table()
1156 rtw89_write_rf(rtwdev, path, RR_LUTWA, RFREG_MASK, 0x1); in _lok_res_table()
1157 rtw89_write_rf(rtwdev, path, RR_LUTWD0, RFREG_MASK, ibias); in _lok_res_table()
1158 rtw89_write_rf(rtwdev, path, RR_LUTWE, RFREG_MASK, 0x0); in _lok_res_table()
1161 static bool _lok_finetune_check(struct rtw89_dev *rtwdev, u8 path) in _lok_finetune_check() argument
1168 tmp = rtw89_read_rf(rtwdev, path, RR_TXMO, RFREG_MASK); in _lok_finetune_check()
1169 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK][FineLOK] S%x, 0x58 = 0x%x\n", in _lok_finetune_check()
1173 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, i = 0x%x\n", path, core_i); in _lok_finetune_check()
1174 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, q = 0x%x\n", path, core_q); in _lok_finetune_check()
1181 static bool _iqk_lok(struct rtw89_dev *rtwdev, in _iqk_lok() argument
1184 struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; in _iqk_lok()
1192 rtw89_write_rf(rtwdev, path, RR_GAINTX, RR_GAINTX_ALL, 0xe5e0); in _iqk_lok()
1196 rtw89_write_rf(rtwdev, path, RR_GAINTX, RR_GAINTX_ALL, 0xe4e0); in _iqk_lok()
1202 rtw89_phy_write32_set(rtwdev, R_IQK_CFG, B_IQK_CFG_SET); in _iqk_lok()
1203 rf0 = rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK); in _iqk_lok()
1204 rtw89_phy_write32_mask(rtwdev, R_IQK_DIF1, B_IQK_DIF1_TXPI, in _iqk_lok()
1206 rtw89_phy_write32_clr(rtwdev, R_IQK_RES + (path << 8), B_IQK_RES_TXCFIR); in _iqk_lok()
1207 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_SEL, 0x1); in _iqk_lok()
1208 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_G3, 0x1); in _iqk_lok()
1209 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_GP, 0x0); in _iqk_lok()
1210 rtw89_phy_write32_set(rtwdev, R_IOQ_IQK_DPK, B_IOQ_IQK_DPK_EN); in _iqk_lok()
1211 rtw89_phy_write32_clr(rtwdev, R_NCTL_N1, B_NCTL_N1_CIP); in _iqk_lok()
1212 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), MASKDWORD, itqt); in _iqk_lok()
1213 tmp = _iqk_one_shot(rtwdev, phy_idx, path, ID_FLOK_COARSE); in _iqk_lok()
1216 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), MASKDWORD, itqt); in _iqk_lok()
1217 tmp = _iqk_one_shot(rtwdev, phy_idx, path, ID_FLOK_FINE); in _iqk_lok()
1219 fail = _lok_finetune_check(rtwdev, path); in _iqk_lok()
1223 static void _iqk_txk_setting(struct rtw89_dev *rtwdev, u8 path) in _iqk_txk_setting() argument
1225 struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; in _iqk_txk_setting()
1227 rtw89_phy_write32_set(rtwdev, R_P0_NRBW + (path << 13), B_P0_NRBW_DBG); in _iqk_txk_setting()
1228 rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15, 0x1f); in _iqk_txk_setting()
1230 rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15, 0x13); in _iqk_txk_setting()
1231 rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_15, 0x0001); in _iqk_txk_setting()
1233 rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_15, 0x0041); in _iqk_txk_setting()
1235 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_RST, 0x0303); in _iqk_txk_setting()
1236 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_RST, 0x0000); in _iqk_txk_setting()
1239 rtw89_write_rf(rtwdev, path, RR_XALNA2, RR_XALNA2_SW, 0x00); in _iqk_txk_setting()
1240 rtw89_write_rf(rtwdev, path, RR_RCKD, RR_RCKD_POW, 0x3f); in _iqk_txk_setting()
1241 rtw89_write_rf(rtwdev, path, RR_TXG1, RR_TXG1_ATT2, 0x0); in _iqk_txk_setting()
1242 rtw89_write_rf(rtwdev, path, RR_TXG1, RR_TXG1_ATT1, 0x1); in _iqk_txk_setting()
1243 rtw89_write_rf(rtwdev, path, RR_TXG2, RR_TXG2_ATT0, 0x1); in _iqk_txk_setting()
1244 rtw89_write_rf(rtwdev, path, RR_TXGA, RR_TXGA_LOK_EN, 0x0); in _iqk_txk_setting()
1245 rtw89_write_rf(rtwdev, path, RR_LUTWE, RR_LUTWE_LOK, 0x1); in _iqk_txk_setting()
1246 rtw89_write_rf(rtwdev, path, RR_LUTDBG, RR_LUTDBG_LOK, 0x0); in _iqk_txk_setting()
1247 rtw89_write_rf(rtwdev, path, RR_LUTWA, RR_LUTWA_MASK, 0x000); in _iqk_txk_setting()
1248 rtw89_write_rf(rtwdev, path, RR_RSV2, RFREG_MASK, 0x80200); in _iqk_txk_setting()
1249 rtw89_write_rf(rtwdev, path, RR_DTXLOK, RFREG_MASK, 0x80200); in _iqk_txk_setting()
1250 rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASK, in _iqk_txk_setting()
1255 rtw89_write_rf(rtwdev, path, RR_XGLNA2, RR_XGLNA2_SW, 0x00); in _iqk_txk_setting()
1256 rtw89_write_rf(rtwdev, path, RR_RCKD, RR_RCKD_POW, 0x3f); in _iqk_txk_setting()
1257 rtw89_write_rf(rtwdev, path, RR_BIASA, RR_BIASA_A, 0x7); in _iqk_txk_setting()
1258 rtw89_write_rf(rtwdev, path, RR_TXGA, RR_TXGA_LOK_EN, 0x0); in _iqk_txk_setting()
1259 rtw89_write_rf(rtwdev, path, RR_LUTWE, RR_LUTWE_LOK, 0x1); in _iqk_txk_setting()
1260 rtw89_write_rf(rtwdev, path, RR_LUTDBG, RR_LUTDBG_LOK, 0x0); in _iqk_txk_setting()
1261 rtw89_write_rf(rtwdev, path, RR_LUTWA, RR_LUTWA_MASK, 0x100); in _iqk_txk_setting()
1262 rtw89_write_rf(rtwdev, path, RR_RSV2, RFREG_MASK, 0x80200); in _iqk_txk_setting()
1263 rtw89_write_rf(rtwdev, path, RR_DTXLOK, RFREG_MASK, 0x80200); in _iqk_txk_setting()
1264 rtw89_write_rf(rtwdev, path, RR_LUTWD0, RFREG_MASK, 0x1); in _iqk_txk_setting()
1265 rtw89_write_rf(rtwdev, path, RR_LUTWD0, RFREG_MASK, 0x0); in _iqk_txk_setting()
1266 rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASK, in _iqk_txk_setting()
1275 static void _iqk_txclk_setting(struct rtw89_dev *rtwdev, u8 path) in _iqk_txclk_setting() argument
1277 rtw89_phy_write32_mask(rtwdev, R_CFIR_SYS + (path << 8), MASKDWORD, 0xce000a08); in _iqk_txclk_setting()
1280 static void _iqk_info_iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, in _iqk_info_iqk() argument
1283 struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; in _iqk_info_iqk()
1288 ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]); in _iqk_info_iqk()
1290 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%d_thermal = %d\n", path, in _iqk_info_iqk()
1292 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%d_LOK_COR_fail= %d\n", path, in _iqk_info_iqk()
1294 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%d_LOK_FIN_fail= %d\n", path, in _iqk_info_iqk()
1296 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%d_TXIQK_fail = %d\n", path, in _iqk_info_iqk()
1298 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%d_RXIQK_fail= %d,\n", path, in _iqk_info_iqk()
1301 rtw89_phy_write32_mask(rtwdev, R_IQKINF, BIT(0) << (path * 4), flag); in _iqk_info_iqk()
1303 rtw89_phy_write32_mask(rtwdev, R_IQKINF, BIT(1) << (path * 4), flag); in _iqk_info_iqk()
1305 rtw89_phy_write32_mask(rtwdev, R_IQKINF, BIT(2) << (path * 4), flag); in _iqk_info_iqk()
1307 rtw89_phy_write32_mask(rtwdev, R_IQKINF, BIT(3) << (path * 4), flag); in _iqk_info_iqk()
1309 tmp = rtw89_phy_read32_mask(rtwdev, R_IQK_RES + (path << 8), MASKDWORD); in _iqk_info_iqk()
1311 tmp = rtw89_phy_read32_mask(rtwdev, R_TXIQC + (path << 8), MASKDWORD); in _iqk_info_iqk()
1313 tmp = rtw89_phy_read32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD); in _iqk_info_iqk()
1316 rtw89_phy_write32_mask(rtwdev, R_IQKINF2, B_IQKINF2_KCNT, in _iqk_info_iqk()
1319 tmp = rtw89_phy_read32_mask(rtwdev, R_IQKINF, 0x0000000f << (path * 4)); in _iqk_info_iqk()
1322 rtw89_phy_write32_mask(rtwdev, R_IQKINF2, 0x00ff0000 << (path * 4), in _iqk_info_iqk()
1327 void _iqk_by_path(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, u8 path) in _iqk_by_path() argument
1329 struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; in _iqk_by_path()
1334 _iqk_txclk_setting(rtwdev, path); in _iqk_by_path()
1337 _lok_res_table(rtwdev, path, ibias++); in _iqk_by_path()
1338 _iqk_txk_setting(rtwdev, path); in _iqk_by_path()
1339 lok_is_fail = _iqk_lok(rtwdev, phy_idx, path); in _iqk_by_path()
1344 iqk_info->iqk_tx_fail[0][path] = _iqk_nbtxk(rtwdev, phy_idx, path); in _iqk_by_path()
1346 iqk_info->iqk_tx_fail[0][path] = _txk_group_sel(rtwdev, phy_idx, path); in _iqk_by_path()
1348 _iqk_rxclk_setting(rtwdev, path); in _iqk_by_path()
1349 _iqk_rxk_setting(rtwdev, path); in _iqk_by_path()
1350 if (iqk_info->is_nbiqk || rtwdev->dbcc_en || iqk_info->iqk_band[path] == RTW89_BAND_2G) in _iqk_by_path()
1351 iqk_info->iqk_rx_fail[0][path] = _iqk_nbrxk(rtwdev, phy_idx, path); in _iqk_by_path()
1353 iqk_info->iqk_rx_fail[0][path] = _rxk_group_sel(rtwdev, phy_idx, path); in _iqk_by_path()
1355 _iqk_info_iqk(rtwdev, phy_idx, path); in _iqk_by_path()
1358 static void _iqk_get_ch_info(struct rtw89_dev *rtwdev, in _iqk_get_ch_info() argument
1361 struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; in _iqk_get_ch_info()
1362 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); in _iqk_get_ch_info()
1367 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__); in _iqk_get_ch_info()
1379 reg_rf18 = rtw89_read_rf(rtwdev, path, RR_CFGCH, RFREG_MASK); in _iqk_get_ch_info()
1380 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]cfg ch = %d\n", reg_rf18); in _iqk_get_ch_info()
1381 reg_35c = rtw89_phy_read32_mask(rtwdev, 0x35c, 0x00000c00); in _iqk_get_ch_info()
1387 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _iqk_get_ch_info()
1390 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]iqk_info->iqk_bw[%x] = 0x%x\n", in _iqk_get_ch_info()
1392 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]iqk_info->iqk_ch[%x] = 0x%x\n", in _iqk_get_ch_info()
1394 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _iqk_get_ch_info()
1396 rtwdev->dbcc_en ? "on" : "off", in _iqk_get_ch_info()
1407 rtw89_phy_write32_mask(rtwdev, R_IQKINF, B_IQKINF_VER, RTW8852A_IQK_VER); in _iqk_get_ch_info()
1408 rtw89_phy_write32_mask(rtwdev, R_IQKCH, 0x000f << (path * 16), in _iqk_get_ch_info()
1410 rtw89_phy_write32_mask(rtwdev, R_IQKCH, 0x00f0 << (path * 16), in _iqk_get_ch_info()
1412 rtw89_phy_write32_mask(rtwdev, R_IQKCH, 0xff00 << (path * 16), in _iqk_get_ch_info()
1415 rtw89_phy_write32_mask(rtwdev, R_IQKINF2, 0x000000ff, RTW8852A_NCTL_VER); in _iqk_get_ch_info()
1418 static void _iqk_start_iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, in _iqk_start_iqk() argument
1421 _iqk_by_path(rtwdev, phy_idx, path); in _iqk_start_iqk()
1424 static void _iqk_restore(struct rtw89_dev *rtwdev, u8 path) in _iqk_restore() argument
1426 struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; in _iqk_restore()
1428 rtw89_phy_write32_mask(rtwdev, R_TXIQC + (path << 8), MASKDWORD, in _iqk_restore()
1430 rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD, in _iqk_restore()
1432 rtw89_phy_write32_clr(rtwdev, R_NCTL_RPT, MASKDWORD); in _iqk_restore()
1433 rtw89_phy_write32_clr(rtwdev, R_MDPK_RX_DCK, MASKDWORD); in _iqk_restore()
1434 rtw89_phy_write32_mask(rtwdev, R_KIP_SYSCFG, MASKDWORD, 0x80000000); in _iqk_restore()
1435 rtw89_phy_write32_clr(rtwdev, R_KPATH_CFG, MASKDWORD); in _iqk_restore()
1436 rtw89_phy_write32_clr(rtwdev, R_GAPK, B_GAPK_ADR); in _iqk_restore()
1437 rtw89_phy_write32_mask(rtwdev, R_CFIR_SYS + (path << 8), MASKDWORD, 0x10010000); in _iqk_restore()
1438 rtw89_phy_write32_clr(rtwdev, R_KIP + (path << 8), B_KIP_RFGAIN); in _iqk_restore()
1439 rtw89_phy_write32_mask(rtwdev, R_CFIR_MAP + (path << 8), MASKDWORD, 0xe4e4e4e4); in _iqk_restore()
1440 rtw89_phy_write32_clr(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_SEL); in _iqk_restore()
1441 rtw89_phy_write32_clr(rtwdev, R_KIP_IQP + (path << 8), B_KIP_IQP_IQSW); in _iqk_restore()
1442 rtw89_phy_write32_mask(rtwdev, R_LOAD_COEF + (path << 8), MASKDWORD, 0x00000002); in _iqk_restore()
1443 rtw89_write_rf(rtwdev, path, RR_LUTWE, RR_LUTWE_LOK, 0x0); in _iqk_restore()
1444 rtw89_write_rf(rtwdev, path, RR_RCKD, RR_RCKD_POW, 0x0); in _iqk_restore()
1445 rtw89_write_rf(rtwdev, path, RR_LUTWE, RR_LUTWE_LOK, 0x0); in _iqk_restore()
1446 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RR_MOD_V_RX); in _iqk_restore()
1447 rtw89_write_rf(rtwdev, path, RR_TXRSV, RR_TXRSV_GAPK, 0x0); in _iqk_restore()
1448 rtw89_write_rf(rtwdev, path, RR_BIAS, RR_BIAS_GAPK, 0x0); in _iqk_restore()
1449 rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x1); in _iqk_restore()
1452 static void _iqk_afebb_restore(struct rtw89_dev *rtwdev, in _iqk_afebb_restore() argument
1457 switch (_kpath(rtwdev, phy_idx)) { in _iqk_afebb_restore()
1469 rtw89_rfk_parser(rtwdev, tbl); in _iqk_afebb_restore()
1472 static void _iqk_preset(struct rtw89_dev *rtwdev, u8 path) in _iqk_preset() argument
1474 struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; in _iqk_preset()
1477 if (rtwdev->dbcc_en) { in _iqk_preset()
1478 rtw89_phy_write32_mask(rtwdev, R_COEF_SEL + (path << 8), in _iqk_preset()
1480 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), in _iqk_preset()
1483 rtw89_phy_write32_mask(rtwdev, R_COEF_SEL + (path << 8), in _iqk_preset()
1485 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), in _iqk_preset()
1488 rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); in _iqk_preset()
1489 rtw89_phy_write32_mask(rtwdev, R_NCTL_RPT, MASKDWORD, 0x00000080); in _iqk_preset()
1490 rtw89_phy_write32_clr(rtwdev, R_NCTL_RW, MASKDWORD); in _iqk_preset()
1491 rtw89_phy_write32_mask(rtwdev, R_KIP_SYSCFG, MASKDWORD, 0x81ff010a); in _iqk_preset()
1492 rtw89_phy_write32_mask(rtwdev, R_KPATH_CFG, MASKDWORD, 0x00200000); in _iqk_preset()
1493 rtw89_phy_write32_mask(rtwdev, R_MDPK_RX_DCK, MASKDWORD, 0x80000000); in _iqk_preset()
1494 rtw89_phy_write32_clr(rtwdev, R_LOAD_COEF + (path << 8), MASKDWORD); in _iqk_preset()
1497 static void _iqk_macbb_setting(struct rtw89_dev *rtwdev, in _iqk_macbb_setting() argument
1502 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===> %s\n", __func__); in _iqk_macbb_setting()
1504 switch (_kpath(rtwdev, phy_idx)) { in _iqk_macbb_setting()
1516 rtw89_rfk_parser(rtwdev, tbl); in _iqk_macbb_setting()
1519 static void _iqk_dbcc(struct rtw89_dev *rtwdev, u8 path) in _iqk_dbcc() argument
1521 struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; in _iqk_dbcc()
1531 _iqk_get_ch_info(rtwdev, phy_idx, path); in _iqk_dbcc()
1532 _iqk_macbb_setting(rtwdev, phy_idx, path); in _iqk_dbcc()
1533 _iqk_preset(rtwdev, path); in _iqk_dbcc()
1534 _iqk_start_iqk(rtwdev, phy_idx, path); in _iqk_dbcc()
1535 _iqk_restore(rtwdev, path); in _iqk_dbcc()
1536 _iqk_afebb_restore(rtwdev, phy_idx, path); in _iqk_dbcc()
1539 static void _iqk_track(struct rtw89_dev *rtwdev) in _iqk_track() argument
1541 struct rtw89_iqk_info *iqk = &rtwdev->iqk; in _iqk_track()
1552 cur_ther = ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]); in _iqk_track()
1561 static void _rck(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) in _rck() argument
1567 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RCK] ====== S%d RCK ======\n", path); in _rck()
1569 rf_reg5 = rtw89_read_rf(rtwdev, path, RR_RSV1, RFREG_MASK); in _rck()
1571 rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); in _rck()
1572 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RR_MOD_V_RX); in _rck()
1574 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RCK] RF0x00 = 0x%x\n", in _rck()
1575 rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK)); in _rck()
1578 rtw89_write_rf(rtwdev, path, RR_RCKC, RFREG_MASK, 0x00240); in _rck()
1581 false, rtwdev, path, 0x1c, BIT(3)); in _rck()
1583 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RCK] RCK timeout\n"); in _rck()
1585 rck_val = rtw89_read_rf(rtwdev, path, RR_RCKC, RR_RCKC_CA); in _rck()
1586 rtw89_write_rf(rtwdev, path, RR_RCKC, RFREG_MASK, rck_val); in _rck()
1589 rtw89_write_rf(rtwdev, path, RR_RCKO, RR_RCKO_OFF, 0x4); in _rck()
1591 rtw89_write_rf(rtwdev, path, RR_RFC, RR_RFC_CKEN, 0x1); in _rck()
1592 rtw89_write_rf(rtwdev, path, RR_RFC, RR_RFC_CKEN, 0x0); in _rck()
1594 rtw89_write_rf(rtwdev, path, RR_RSV1, RFREG_MASK, rf_reg5); in _rck()
1596 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _rck()
1598 rtw89_read_rf(rtwdev, path, RR_RCKC, RFREG_MASK), in _rck()
1599 rtw89_read_rf(rtwdev, path, RR_RCKS, RFREG_MASK), in _rck()
1600 rtw89_read_rf(rtwdev, path, RR_RCKO, RFREG_MASK)); in _rck()
1603 static void _iqk_init(struct rtw89_dev *rtwdev) in _iqk_init() argument
1605 struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; in _iqk_init()
1608 rtw89_phy_write32_clr(rtwdev, R_IQKINF, MASKDWORD); in _iqk_init()
1612 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__); in _iqk_init()
1635 static void _doiqk(struct rtw89_dev *rtwdev, bool force, in _doiqk() argument
1638 struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; in _doiqk()
1641 u8 phy_map = rtw89_btc_phymap(rtwdev, phy_idx, RF_AB); in _doiqk()
1643 rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_ONESHOT_START); in _doiqk()
1645 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _doiqk()
1651 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]Test Ver 0x%x\n", iqk_info->version); in _doiqk()
1652 _iqk_get_ch_info(rtwdev, phy_idx, path); in _doiqk()
1653 _rfk_backup_bb_reg(rtwdev, &backup_bb_val[0]); in _doiqk()
1654 _rfk_backup_rf_reg(rtwdev, &backup_rf_val[path][0], path); in _doiqk()
1655 _iqk_macbb_setting(rtwdev, phy_idx, path); in _doiqk()
1656 _iqk_preset(rtwdev, path); in _doiqk()
1657 _iqk_start_iqk(rtwdev, phy_idx, path); in _doiqk()
1658 _iqk_restore(rtwdev, path); in _doiqk()
1659 _iqk_afebb_restore(rtwdev, phy_idx, path); in _doiqk()
1660 _rfk_restore_bb_reg(rtwdev, &backup_bb_val[0]); in _doiqk()
1661 _rfk_restore_rf_reg(rtwdev, &backup_rf_val[path][0], path); in _doiqk()
1662 rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_ONESHOT_STOP); in _doiqk()
1665 static void _iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, bool force) in _iqk() argument
1667 switch (_kpath(rtwdev, phy_idx)) { in _iqk()
1669 _doiqk(rtwdev, force, phy_idx, RF_PATH_A); in _iqk()
1672 _doiqk(rtwdev, force, phy_idx, RF_PATH_B); in _iqk()
1675 _doiqk(rtwdev, force, phy_idx, RF_PATH_A); in _iqk()
1676 _doiqk(rtwdev, force, phy_idx, RF_PATH_B); in _iqk()
1685 static void _set_rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, in _set_rx_dck() argument
1688 u8 phy_map = rtw89_btc_path_phymap(rtwdev, phy, path); in _set_rx_dck()
1691 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _set_rx_dck()
1695 ori_val = rtw89_phy_read32_mask(rtwdev, R_P0_RXCK + (path << 13), MASKDWORD); in _set_rx_dck()
1698 rtw89_phy_write32_set(rtwdev, R_P0_NRBW + (path << 13), B_P0_NRBW_DBG); in _set_rx_dck()
1699 rtw89_phy_write32_set(rtwdev, R_P0_RXCK + (path << 13), B_P0_RXCK_ON); in _set_rx_dck()
1700 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK + (path << 13), in _set_rx_dck()
1702 rtw89_phy_write32_set(rtwdev, R_S0_RXDC2 + (path << 13), B_S0_RXDC2_MEN); in _set_rx_dck()
1703 rtw89_phy_write32_mask(rtwdev, R_S0_RXDC2 + (path << 13), in _set_rx_dck()
1705 rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15_H, 0x3); in _set_rx_dck()
1706 rtw89_phy_write32_clr(rtwdev, R_ANAPAR, B_ANAPAR_ADCCLK); in _set_rx_dck()
1707 rtw89_phy_write32_clr(rtwdev, R_ANAPAR, B_ANAPAR_FLTRST); in _set_rx_dck()
1708 rtw89_phy_write32_set(rtwdev, R_ANAPAR, B_ANAPAR_FLTRST); in _set_rx_dck()
1709 rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_CRXBB, 0x1); in _set_rx_dck()
1712 rtw89_write_rf(rtwdev, path, RR_DCK2, RR_DCK2_CYCLE, 0x3f); in _set_rx_dck()
1713 rtw89_write_rf(rtwdev, path, RR_DCK1, RR_DCK1_SEL, is_afe); in _set_rx_dck()
1715 rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_RXDCK, BTC_WRFK_ONESHOT_START); in _set_rx_dck()
1717 rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_LV, 0x0); in _set_rx_dck()
1718 rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_LV, 0x1); in _set_rx_dck()
1722 rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_RXDCK, BTC_WRFK_ONESHOT_STOP); in _set_rx_dck()
1724 rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_LV, 0x0); in _set_rx_dck()
1727 rtw89_phy_write32_clr(rtwdev, R_P0_NRBW + (path << 13), B_P0_NRBW_DBG); in _set_rx_dck()
1728 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK + (path << 13), in _set_rx_dck()
1733 static void _rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, in _rx_dck() argument
1740 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _rx_dck()
1742 RXDCK_VER_8852A, rtwdev->hal.cv); in _rx_dck()
1744 kpath = _kpath(rtwdev, phy); in _rx_dck()
1750 rf_reg5 = rtw89_read_rf(rtwdev, path, RR_RSV1, RFREG_MASK); in _rx_dck()
1751 dck_tune = (u8)rtw89_read_rf(rtwdev, path, RR_DCK, RR_DCK_FINE); in _rx_dck()
1753 if (rtwdev->is_tssi_mode[path]) { in _rx_dck()
1756 rtw89_phy_write32_set(rtwdev, addr, BIT(30)); in _rx_dck()
1759 rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); in _rx_dck()
1760 rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_FINE, 0x0); in _rx_dck()
1761 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RR_MOD_V_RX); in _rx_dck()
1762 _set_rx_dck(rtwdev, phy, path, is_afe); in _rx_dck()
1763 rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_FINE, dck_tune); in _rx_dck()
1764 rtw89_write_rf(rtwdev, path, RR_RSV1, RFREG_MASK, rf_reg5); in _rx_dck()
1766 if (rtwdev->is_tssi_mode[path]) { in _rx_dck()
1769 rtw89_phy_write32_clr(rtwdev, addr, BIT(30)); in _rx_dck()
1789 static void _rf_direct_cntrl(struct rtw89_dev *rtwdev, in _rf_direct_cntrl() argument
1793 rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x1); in _rf_direct_cntrl()
1795 rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); in _rf_direct_cntrl()
1798 static void _dpk_onoff(struct rtw89_dev *rtwdev,
1801 static void _dpk_bkup_kip(struct rtw89_dev *rtwdev, u32 *reg, in _dpk_bkup_kip() argument
1808 reg_bkup[path][i] = rtw89_phy_read32_mask(rtwdev, in _dpk_bkup_kip()
1811 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] Backup 0x%x = %x\n", in _dpk_bkup_kip()
1816 static void _dpk_reload_kip(struct rtw89_dev *rtwdev, u32 *reg, in _dpk_reload_kip() argument
1822 rtw89_phy_write32_mask(rtwdev, reg[i] + (path << 8), in _dpk_reload_kip()
1824 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] Reload 0x%x = %x\n", in _dpk_reload_kip()
1829 static u8 _dpk_one_shot(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, in _dpk_one_shot() argument
1832 u8 phy_map = rtw89_btc_path_phymap(rtwdev, phy, path); in _dpk_one_shot()
1839 rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DPK, BTC_WRFK_ONESHOT_START); in _dpk_one_shot()
1841 rtw89_phy_write32_mask(rtwdev, R_NCTL_CFG, MASKDWORD, dpk_cmd); in _dpk_one_shot()
1842 rtw89_phy_write32_set(rtwdev, R_DPK_CTL, B_DPK_CTL_EN); in _dpk_one_shot()
1845 10, 20000, false, rtwdev, 0xbff8, MASKBYTE0); in _dpk_one_shot()
1847 rtw89_phy_write32_clr(rtwdev, R_NCTL_N1, MASKBYTE0); in _dpk_one_shot()
1849 rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DPK, BTC_WRFK_ONESHOT_STOP); in _dpk_one_shot()
1851 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _dpk_one_shot()
1861 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _dpk_one_shot()
1869 static void _dpk_rx_dck(struct rtw89_dev *rtwdev, in _dpk_rx_dck() argument
1873 rtw89_write_rf(rtwdev, path, RR_RXBB2, RR_EN_TIA_IDA, 0x3); in _dpk_rx_dck()
1874 _set_rx_dck(rtwdev, phy, path, false); in _dpk_rx_dck()
1877 static void _dpk_information(struct rtw89_dev *rtwdev, in _dpk_information() argument
1881 struct rtw89_dpk_info *dpk = &rtwdev->dpk; in _dpk_information()
1882 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); in _dpk_information()
1889 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _dpk_information()
1892 rtwdev->is_tssi_mode[path] ? "on" : "off", in _dpk_information()
1893 rtwdev->dbcc_en ? "on" : "off", in _dpk_information()
1901 static void _dpk_bb_afe_setting(struct rtw89_dev *rtwdev, in _dpk_bb_afe_setting() argument
1907 rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_dpk_bb_afe_sf_defs_a_tbl); in _dpk_bb_afe_setting()
1909 if (rtw89_phy_read32_mask(rtwdev, R_2P4G_BAND, B_2P4G_BAND_SEL) == 0x0) in _dpk_bb_afe_setting()
1910 rtw89_phy_write32_set(rtwdev, R_RXCCA, B_RXCCA_DIS); in _dpk_bb_afe_setting()
1912 rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_dpk_bb_afe_sr_defs_a_tbl); in _dpk_bb_afe_setting()
1915 rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_dpk_bb_afe_sf_defs_b_tbl); in _dpk_bb_afe_setting()
1917 if (rtw89_phy_read32_mask(rtwdev, R_2P4G_BAND, B_2P4G_BAND_SEL) == 0x1) in _dpk_bb_afe_setting()
1918 rtw89_phy_write32_set(rtwdev, R_RXCCA, B_RXCCA_DIS); in _dpk_bb_afe_setting()
1920 rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_dpk_bb_afe_sr_defs_b_tbl); in _dpk_bb_afe_setting()
1923 rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_dpk_bb_afe_s_defs_ab_tbl); in _dpk_bb_afe_setting()
1928 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _dpk_bb_afe_setting()
1932 static void _dpk_bb_afe_restore(struct rtw89_dev *rtwdev, in _dpk_bb_afe_restore() argument
1938 rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_dpk_bb_afe_r_defs_a_tbl); in _dpk_bb_afe_restore()
1941 rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_dpk_bb_afe_r_defs_b_tbl); in _dpk_bb_afe_restore()
1944 rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_dpk_bb_afe_r_defs_ab_tbl); in _dpk_bb_afe_restore()
1949 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _dpk_bb_afe_restore()
1953 static void _dpk_tssi_pause(struct rtw89_dev *rtwdev, in _dpk_tssi_pause() argument
1956 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK + (path << 13), in _dpk_tssi_pause()
1959 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d TSSI %s\n", path, in _dpk_tssi_pause()
1963 static void _dpk_kip_setting(struct rtw89_dev *rtwdev, in _dpk_kip_setting() argument
1966 rtw89_phy_write32_mask(rtwdev, R_NCTL_RPT, MASKDWORD, 0x00000080); in _dpk_kip_setting()
1967 rtw89_phy_write32_mask(rtwdev, R_KIP_CLK, MASKDWORD, 0x00093f3f); in _dpk_kip_setting()
1968 rtw89_phy_write32_mask(rtwdev, R_KIP_SYSCFG, MASKDWORD, 0x807f030a); in _dpk_kip_setting()
1969 rtw89_phy_write32_mask(rtwdev, R_CFIR_SYS + (path << 8), MASKDWORD, 0xce000a08); in _dpk_kip_setting()
1970 rtw89_phy_write32_mask(rtwdev, R_DPK_CFG, B_DPK_CFG_IDX, 0x2); in _dpk_kip_setting()
1971 rtw89_phy_write32_mask(rtwdev, R_NCTL_CFG, B_NCTL_CFG_SPAGE, path); /*subpage_id*/ in _dpk_kip_setting()
1972 rtw89_phy_write32_mask(rtwdev, R_DPD_CH0 + (path << 8) + (kidx << 2), in _dpk_kip_setting()
1974 rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2), in _dpk_kip_setting()
1977 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] KIP setting for S%d[%d]!!\n", in _dpk_kip_setting()
1981 static void _dpk_kip_restore(struct rtw89_dev *rtwdev, in _dpk_kip_restore() argument
1984 rtw89_phy_write32_clr(rtwdev, R_NCTL_RPT, MASKDWORD); in _dpk_kip_restore()
1985 rtw89_phy_write32_mask(rtwdev, R_KIP_SYSCFG, MASKDWORD, 0x80000000); in _dpk_kip_restore()
1986 rtw89_phy_write32_mask(rtwdev, R_CFIR_SYS + (path << 8), MASKDWORD, 0x10010000); in _dpk_kip_restore()
1987 rtw89_phy_write32_clr(rtwdev, R_KIP_CLK, MASKDWORD); in _dpk_kip_restore()
1989 if (rtwdev->hal.cv > CHIP_CBV) in _dpk_kip_restore()
1990 rtw89_phy_write32_mask(rtwdev, R_DPD_COM + (path << 8), BIT(15), 0x1); in _dpk_kip_restore()
1992 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d restore KIP\n", path); in _dpk_kip_restore()
1995 static void _dpk_lbk_rxiqk(struct rtw89_dev *rtwdev, in _dpk_lbk_rxiqk() argument
2001 cur_rxbb = (u8)rtw89_read_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXBB); in _dpk_lbk_rxiqk()
2003 rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_dpk_lbk_rxiqk_defs_f_tbl); in _dpk_lbk_rxiqk()
2005 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, 0xc); in _dpk_lbk_rxiqk()
2006 rtw89_write_rf(rtwdev, path, RR_RXK, RR_RXK_PLLEN, 0x1); in _dpk_lbk_rxiqk()
2007 rtw89_write_rf(rtwdev, path, RR_RXPOW, RR_RXPOW_IQK, 0x2); in _dpk_lbk_rxiqk()
2008 rtw89_write_rf(rtwdev, path, RR_RSV4, RFREG_MASK, in _dpk_lbk_rxiqk()
2009 rtw89_read_rf(rtwdev, path, RR_CFGCH, RFREG_MASK)); in _dpk_lbk_rxiqk()
2010 rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_OFF, 0x13); in _dpk_lbk_rxiqk()
2011 rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_POW, 0x0); in _dpk_lbk_rxiqk()
2012 rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_POW, 0x1); in _dpk_lbk_rxiqk()
2016 rtw89_write_rf(rtwdev, path, RR_RXIQGEN, RR_RXIQGEN_ATTL, 0x1f); in _dpk_lbk_rxiqk()
2019 rtw89_write_rf(rtwdev, path, RR_RXIQGEN, RR_RXIQGEN_ATTH, 0x3); in _dpk_lbk_rxiqk()
2021 rtw89_write_rf(rtwdev, path, RR_RXIQGEN, RR_RXIQGEN_ATTH, 0x1); in _dpk_lbk_rxiqk()
2023 rtw89_write_rf(rtwdev, path, RR_RXIQGEN, RR_RXIQGEN_ATTH, 0x0); in _dpk_lbk_rxiqk()
2025 rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_RXT, 0x11); in _dpk_lbk_rxiqk()
2027 _dpk_one_shot(rtwdev, phy, path, LBK_RXIQK); in _dpk_lbk_rxiqk()
2029 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d LBK RXIQC = 0x%x\n", path, in _dpk_lbk_rxiqk()
2030 rtw89_phy_read32_mask(rtwdev, R_RXIQC, MASKDWORD)); in _dpk_lbk_rxiqk()
2032 rtw89_write_rf(rtwdev, path, RR_RXK, RR_RXK_PLLEN, 0x0); in _dpk_lbk_rxiqk()
2033 rtw89_write_rf(rtwdev, path, RR_RXPOW, RR_RXPOW_IQK, 0x0); in _dpk_lbk_rxiqk()
2034 rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_POW, 0x0); /*POW IQKPLL*/ in _dpk_lbk_rxiqk()
2035 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RR_MOD_V_DPK); in _dpk_lbk_rxiqk()
2037 rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_dpk_lbk_rxiqk_defs_r_tbl); in _dpk_lbk_rxiqk()
2040 static void _dpk_get_thermal(struct rtw89_dev *rtwdev, u8 kidx, in _dpk_get_thermal() argument
2043 struct rtw89_dpk_info *dpk = &rtwdev->dpk; in _dpk_get_thermal()
2046 ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]); in _dpk_get_thermal()
2048 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] thermal@DPK = 0x%x\n", in _dpk_get_thermal()
2052 static u8 _dpk_set_tx_pwr(struct rtw89_dev *rtwdev, u8 gain, in _dpk_set_tx_pwr() argument
2057 rtw89_write_rf(rtwdev, path, RR_MODOPT, RFREG_MASK, txagc_ori); in _dpk_set_tx_pwr()
2062 static void _dpk_rf_setting(struct rtw89_dev *rtwdev, u8 gain, in _dpk_rf_setting() argument
2065 struct rtw89_dpk_info *dpk = &rtwdev->dpk; in _dpk_rf_setting()
2068 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_DPK, 0x280b); in _dpk_rf_setting()
2069 rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_ATTC, 0x0); in _dpk_rf_setting()
2070 rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_ATTR, 0x4); in _dpk_rf_setting()
2071 rtw89_write_rf(rtwdev, path, RR_MIXER, RR_MIXER_GN, 0x0); in _dpk_rf_setting()
2073 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_DPK, 0x282e); in _dpk_rf_setting()
2074 rtw89_write_rf(rtwdev, path, RR_BIASA2, RR_BIASA2_LB, 0x7); in _dpk_rf_setting()
2075 rtw89_write_rf(rtwdev, path, RR_TXATANK, RR_TXATANK_LBSW, 0x3); in _dpk_rf_setting()
2076 rtw89_write_rf(rtwdev, path, RR_RXA, RR_RXA_DPK, 0x3); in _dpk_rf_setting()
2078 rtw89_write_rf(rtwdev, path, RR_RCKD, RR_RCKD_BW, 0x1); in _dpk_rf_setting()
2079 rtw89_write_rf(rtwdev, path, RR_BTC, RR_BTC_TXBB, dpk->bp[path][kidx].bw + 1); in _dpk_rf_setting()
2080 rtw89_write_rf(rtwdev, path, RR_BTC, RR_BTC_RXBB, 0x0); in _dpk_rf_setting()
2082 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _dpk_rf_setting()
2084 rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK), in _dpk_rf_setting()
2085 rtw89_read_rf(rtwdev, path, RR_MODOPT, RFREG_MASK), in _dpk_rf_setting()
2086 rtw89_read_rf(rtwdev, path, RR_BTC, RFREG_MASK)); in _dpk_rf_setting()
2089 static void _dpk_manual_txcfir(struct rtw89_dev *rtwdev, in _dpk_manual_txcfir() argument
2095 rtw89_phy_write32_mask(rtwdev, R_KIP + (path << 8), B_KIP_RFGAIN, 0x1); in _dpk_manual_txcfir()
2096 tmp_pad = (u8)rtw89_read_rf(rtwdev, path, RR_GAINTX, RR_GAINTX_PAD); in _dpk_manual_txcfir()
2097 rtw89_phy_write32_mask(rtwdev, R_RFGAIN + (path << 8), in _dpk_manual_txcfir()
2100 tmp_txbb = (u8)rtw89_read_rf(rtwdev, path, RR_GAINTX, RR_GAINTX_BB); in _dpk_manual_txcfir()
2101 rtw89_phy_write32_mask(rtwdev, R_RFGAIN + (path << 8), in _dpk_manual_txcfir()
2104 rtw89_phy_write32_mask(rtwdev, R_LOAD_COEF + (path << 8), in _dpk_manual_txcfir()
2106 rtw89_phy_write32_clr(rtwdev, R_LOAD_COEF + (path << 8), in _dpk_manual_txcfir()
2109 rtw89_phy_write32_mask(rtwdev, R_LOAD_COEF + (path << 8), BIT(1), 0x1); in _dpk_manual_txcfir()
2111 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _dpk_manual_txcfir()
2115 rtw89_phy_write32_clr(rtwdev, R_KIP + (path << 8), B_KIP_RFGAIN); in _dpk_manual_txcfir()
2116 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _dpk_manual_txcfir()
2121 static void _dpk_bypass_rxcfir(struct rtw89_dev *rtwdev, in _dpk_bypass_rxcfir() argument
2125 rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), in _dpk_bypass_rxcfir()
2127 rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), in _dpk_bypass_rxcfir()
2129 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _dpk_bypass_rxcfir()
2131 rtw89_phy_read32_mask(rtwdev, R_RXIQC + (path << 8), in _dpk_bypass_rxcfir()
2134 rtw89_phy_write32_clr(rtwdev, R_RXIQC + (path << 8), B_RXIQC_BYPASS2); in _dpk_bypass_rxcfir()
2135 rtw89_phy_write32_clr(rtwdev, R_RXIQC + (path << 8), B_RXIQC_BYPASS); in _dpk_bypass_rxcfir()
2136 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _dpk_bypass_rxcfir()
2138 rtw89_phy_read32_mask(rtwdev, R_RXIQC + (path << 8), in _dpk_bypass_rxcfir()
2144 void _dpk_tpg_sel(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 kidx) in _dpk_tpg_sel() argument
2146 struct rtw89_dpk_info *dpk = &rtwdev->dpk; in _dpk_tpg_sel()
2149 rtw89_phy_write32_clr(rtwdev, R_TPG_MOD, B_TPG_MOD_F); in _dpk_tpg_sel()
2151 rtw89_phy_write32_mask(rtwdev, R_TPG_MOD, B_TPG_MOD_F, 0x2); in _dpk_tpg_sel()
2153 rtw89_phy_write32_mask(rtwdev, R_TPG_MOD, B_TPG_MOD_F, 0x1); in _dpk_tpg_sel()
2155 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] TPG_Select for %s\n", in _dpk_tpg_sel()
2160 static void _dpk_table_select(struct rtw89_dev *rtwdev, in _dpk_table_select() argument
2166 rtw89_phy_write32_mask(rtwdev, R_DPD_CH0 + (path << 8), MASKBYTE3, val); in _dpk_table_select()
2167 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _dpk_table_select()
2172 static bool _dpk_sync_check(struct rtw89_dev *rtwdev, in _dpk_sync_check() argument
2178 struct rtw89_dpk_info *dpk = &rtwdev->dpk; in _dpk_sync_check()
2182 rtw89_phy_write32_clr(rtwdev, R_KIP_RPT1, B_KIP_RPT1_SEL); in _dpk_sync_check()
2184 corr_idx = (u8)rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_CORI); in _dpk_sync_check()
2185 corr_val = (u8)rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_CORV); in _dpk_sync_check()
2187 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _dpk_sync_check()
2194 rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, B_KIP_RPT1_SEL, 0x9); in _dpk_sync_check()
2196 dc_i = (u16)rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_DCI); in _dpk_sync_check()
2197 dc_q = (u16)rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_DCQ); in _dpk_sync_check()
2202 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d DC I/Q, = %d / %d\n", in _dpk_sync_check()
2215 static bool _dpk_sync(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, in _dpk_sync() argument
2218 _dpk_tpg_sel(rtwdev, path, kidx); in _dpk_sync()
2219 _dpk_one_shot(rtwdev, phy, path, SYNC); in _dpk_sync()
2220 return _dpk_sync_check(rtwdev, path); /*1= fail*/ in _dpk_sync()
2223 static u16 _dpk_dgain_read(struct rtw89_dev *rtwdev) in _dpk_dgain_read() argument
2227 rtw89_phy_write32_clr(rtwdev, R_KIP_RPT1, B_KIP_RPT1_SEL); in _dpk_dgain_read()
2229 rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_SYNERR); in _dpk_dgain_read()
2231 dgain = (u16)rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_DCI); in _dpk_dgain_read()
2233 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] DGain = 0x%x (%d)\n", dgain, in _dpk_dgain_read()
2239 static s8 _dpk_dgain_mapping(struct rtw89_dev *rtwdev, u16 dgain) in _dpk_dgain_mapping() argument
2263 static u8 _dpk_gainloss_read(struct rtw89_dev *rtwdev) in _dpk_gainloss_read() argument
2265 rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, B_KIP_RPT1_SEL, 0x6); in _dpk_gainloss_read()
2266 rtw89_phy_write32_mask(rtwdev, R_DPK_CFG2, B_DPK_CFG2_ST, 0x1); in _dpk_gainloss_read()
2267 return rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_GL); in _dpk_gainloss_read()
2270 static void _dpk_gainloss(struct rtw89_dev *rtwdev, in _dpk_gainloss() argument
2274 _dpk_table_select(rtwdev, path, kidx, 1); in _dpk_gainloss()
2275 _dpk_one_shot(rtwdev, phy, path, GAIN_LOSS); in _dpk_gainloss()
2282 static u8 _dpk_set_offset(struct rtw89_dev *rtwdev, in _dpk_set_offset() argument
2287 txagc = (u8)rtw89_read_rf(rtwdev, path, RR_MODOPT, RFREG_MASK); in _dpk_set_offset()
2296 rtw89_write_rf(rtwdev, path, RR_MODOPT, RFREG_MASK, txagc); in _dpk_set_offset()
2298 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] tmp_txagc (GL=%d) = 0x%x\n", in _dpk_set_offset()
2312 static u8 _dpk_pas_read(struct rtw89_dev *rtwdev, bool is_check) in _dpk_pas_read() argument
2317 rtw89_rfk_parser(rtwdev, &rtw8852a_rfk_dpk_pas_read_defs_tbl); in _dpk_pas_read()
2320 rtw89_phy_write32_mask(rtwdev, R_DPK_CFG3, MASKBYTE3, 0x00); in _dpk_pas_read()
2321 val1_i = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKHWORD); in _dpk_pas_read()
2323 val1_q = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKLWORD); in _dpk_pas_read()
2325 rtw89_phy_write32_mask(rtwdev, R_DPK_CFG3, MASKBYTE3, 0x1f); in _dpk_pas_read()
2326 val2_i = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKHWORD); in _dpk_pas_read()
2328 val2_q = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKLWORD); in _dpk_pas_read()
2331 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] PAS_delta = 0x%x\n", in _dpk_pas_read()
2337 rtw89_phy_write32_mask(rtwdev, R_DPK_CFG3, MASKBYTE3, i); in _dpk_pas_read()
2338 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _dpk_pas_read()
2340 rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKDWORD)); in _dpk_pas_read()
2350 static u8 _dpk_agc(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, in _dpk_agc() argument
2360 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); in _dpk_agc()
2374 if (_dpk_sync(rtwdev, phy, path, kidx)) { in _dpk_agc()
2380 dgain = _dpk_dgain_read(rtwdev); in _dpk_agc()
2389 tmp_rxbb = (u8)rtw89_read_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXBB); in _dpk_agc()
2390 offset = _dpk_dgain_mapping(rtwdev, dgain); in _dpk_agc()
2402 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXBB, tmp_rxbb); in _dpk_agc()
2403 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _dpk_agc()
2408 _dpk_bypass_rxcfir(rtwdev, path, true); in _dpk_agc()
2410 _dpk_lbk_rxiqk(rtwdev, phy, path); in _dpk_agc()
2421 _dpk_gainloss(rtwdev, phy, path, kidx); in _dpk_agc()
2422 tmp_gl_idx = _dpk_gainloss_read(rtwdev); in _dpk_agc()
2424 if ((tmp_gl_idx == 0 && _dpk_pas_read(rtwdev, true)) || in _dpk_agc()
2436 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _dpk_agc()
2439 tmp_txagc = _dpk_set_offset(rtwdev, path, 3); in _dpk_agc()
2448 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _dpk_agc()
2451 tmp_txagc = _dpk_set_offset(rtwdev, path, -2); in _dpk_agc()
2458 tmp_txagc = _dpk_set_offset(rtwdev, path, tmp_gl_idx); in _dpk_agc()
2469 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _dpk_agc()
2476 static void _dpk_set_mdpd_para(struct rtw89_dev *rtwdev, u8 order) in _dpk_set_mdpd_para() argument
2480 rtw89_phy_write32_mask(rtwdev, R_LDL_NORM, B_LDL_NORM_OP, order); in _dpk_set_mdpd_para()
2481 rtw89_phy_write32_mask(rtwdev, R_LDL_NORM, B_LDL_NORM_PN, 0x3); in _dpk_set_mdpd_para()
2482 rtw89_phy_write32_mask(rtwdev, R_MDPK_SYNC, B_MDPK_SYNC_MAN, 0x1); in _dpk_set_mdpd_para()
2485 rtw89_phy_write32_mask(rtwdev, R_LDL_NORM, B_LDL_NORM_OP, order); in _dpk_set_mdpd_para()
2486 rtw89_phy_write32_clr(rtwdev, R_LDL_NORM, B_LDL_NORM_PN); in _dpk_set_mdpd_para()
2487 rtw89_phy_write32_clr(rtwdev, R_MDPK_SYNC, B_MDPK_SYNC_MAN); in _dpk_set_mdpd_para()
2490 rtw89_phy_write32_mask(rtwdev, R_LDL_NORM, B_LDL_NORM_OP, order); in _dpk_set_mdpd_para()
2491 rtw89_phy_write32_clr(rtwdev, R_LDL_NORM, B_LDL_NORM_PN); in _dpk_set_mdpd_para()
2492 rtw89_phy_write32_clr(rtwdev, R_MDPK_SYNC, B_MDPK_SYNC_MAN); in _dpk_set_mdpd_para()
2495 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _dpk_set_mdpd_para()
2500 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _dpk_set_mdpd_para()
2504 static void _dpk_idl_mpa(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, in _dpk_idl_mpa() argument
2507 _dpk_set_mdpd_para(rtwdev, 0x0); in _dpk_idl_mpa()
2508 _dpk_table_select(rtwdev, path, kidx, 1); in _dpk_idl_mpa()
2509 _dpk_one_shot(rtwdev, phy, path, MDPK_IDL); in _dpk_idl_mpa()
2512 static void _dpk_fill_result(struct rtw89_dev *rtwdev, in _dpk_fill_result() argument
2516 struct rtw89_dpk_info *dpk = &rtwdev->dpk; in _dpk_fill_result()
2521 rtw89_phy_write32_mask(rtwdev, R_COEF_SEL + (path << 8), B_COEF_SEL_MDPD, kidx); in _dpk_fill_result()
2523 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _dpk_fill_result()
2528 rtw89_phy_write32_mask(rtwdev, R_TXAGC_RFK + (path << 8), in _dpk_fill_result()
2532 rtw89_phy_write32_mask(rtwdev, R_DPD_BND + (path << 8) + (kidx << 2), in _dpk_fill_result()
2535 rtw89_phy_write32_mask(rtwdev, R_LOAD_COEF + (path << 8), B_LOAD_COEF_MDPD, 0x1); in _dpk_fill_result()
2536 rtw89_phy_write32_clr(rtwdev, R_LOAD_COEF + (path << 8), B_LOAD_COEF_MDPD); in _dpk_fill_result()
2539 rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2), in _dpk_fill_result()
2542 rtw89_phy_write32_clr(rtwdev, R_DPD_V1 + (path << 8), MASKDWORD); in _dpk_fill_result()
2544 rtw89_phy_write32_clr(rtwdev, R_MDPK_SYNC, B_MDPK_SYNC_SEL); in _dpk_fill_result()
2547 static bool _dpk_reload_check(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, in _dpk_reload_check() argument
2550 struct rtw89_dpk_info *dpk = &rtwdev->dpk; in _dpk_reload_check()
2551 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); in _dpk_reload_check()
2563 rtw89_phy_write32_mask(rtwdev, R_COEF_SEL + (path << 8), in _dpk_reload_check()
2567 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _dpk_reload_check()
2574 static bool _dpk_main(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, in _dpk_main() argument
2577 struct rtw89_dpk_info *dpk = &rtwdev->dpk; in _dpk_main()
2581 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _dpk_main()
2585 _rf_direct_cntrl(rtwdev, path, false); in _dpk_main()
2586 txagc = _dpk_set_tx_pwr(rtwdev, gain, path); in _dpk_main()
2587 _dpk_rf_setting(rtwdev, gain, path, kidx); in _dpk_main()
2588 _dpk_rx_dck(rtwdev, phy, path); in _dpk_main()
2590 _dpk_kip_setting(rtwdev, path, kidx); in _dpk_main()
2591 _dpk_manual_txcfir(rtwdev, path, true); in _dpk_main()
2592 txagc = _dpk_agc(rtwdev, phy, path, kidx, txagc, false); in _dpk_main()
2595 _dpk_get_thermal(rtwdev, kidx, path); in _dpk_main()
2597 _dpk_idl_mpa(rtwdev, phy, path, kidx, gain); in _dpk_main()
2598 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RR_MOD_V_RX); in _dpk_main()
2599 _dpk_fill_result(rtwdev, path, kidx, gain, txagc); in _dpk_main()
2600 _dpk_manual_txcfir(rtwdev, path, false); in _dpk_main()
2607 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d[%d] DPK %s\n", path, kidx, in _dpk_main()
2613 static void _dpk_cal_select(struct rtw89_dev *rtwdev, bool force, in _dpk_cal_select() argument
2616 struct rtw89_dpk_info *dpk = &rtwdev->dpk; in _dpk_cal_select()
2629 reloaded[path] = _dpk_reload_check(rtwdev, phy, path); in _dpk_cal_select()
2633 _dpk_onoff(rtwdev, path, false); in _dpk_cal_select()
2645 _rfk_backup_bb_reg(rtwdev, &backup_bb_val[0]); in _dpk_cal_select()
2650 if (rtwdev->is_tssi_mode[path]) in _dpk_cal_select()
2651 _dpk_tssi_pause(rtwdev, path, true); in _dpk_cal_select()
2652 _dpk_bkup_kip(rtwdev, kip_reg, kip_bkup, path); in _dpk_cal_select()
2653 _rfk_backup_rf_reg(rtwdev, &backup_rf_val[path][0], path); in _dpk_cal_select()
2654 _dpk_information(rtwdev, phy, path); in _dpk_cal_select()
2657 _dpk_bb_afe_setting(rtwdev, phy, path, kpath); in _dpk_cal_select()
2663 is_fail = _dpk_main(rtwdev, phy, path, 1); in _dpk_cal_select()
2664 _dpk_onoff(rtwdev, path, is_fail); in _dpk_cal_select()
2667 _dpk_bb_afe_restore(rtwdev, phy, path, kpath); in _dpk_cal_select()
2668 _rfk_restore_bb_reg(rtwdev, &backup_bb_val[0]); in _dpk_cal_select()
2674 _dpk_kip_restore(rtwdev, path); in _dpk_cal_select()
2675 _dpk_reload_kip(rtwdev, kip_reg, kip_bkup, path); in _dpk_cal_select()
2676 _rfk_restore_rf_reg(rtwdev, &backup_rf_val[path][0], path); in _dpk_cal_select()
2677 if (rtwdev->is_tssi_mode[path]) in _dpk_cal_select()
2678 _dpk_tssi_pause(rtwdev, path, false); in _dpk_cal_select()
2682 static bool _dpk_bypass_check(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) in _dpk_bypass_check() argument
2684 struct rtw89_fem_info *fem = &rtwdev->fem; in _dpk_bypass_check()
2685 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); in _dpk_bypass_check()
2688 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _dpk_bypass_check()
2692 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _dpk_bypass_check()
2700 static void _dpk_force_bypass(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) in _dpk_force_bypass() argument
2704 kpath = _kpath(rtwdev, phy); in _dpk_force_bypass()
2708 _dpk_onoff(rtwdev, path, true); in _dpk_force_bypass()
2712 static void _dpk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, bool force) in _dpk() argument
2714 rtw89_debug(rtwdev, RTW89_DBG_RFK, in _dpk()
2716 RTW8852A_DPK_VER, rtwdev->hal.cv, in _dpk()
2719 if (_dpk_bypass_check(rtwdev, phy)) in _dpk()
2720 _dpk_force_bypass(rtwdev, phy); in _dpk()
2722 _dpk_cal_select(rtwdev, force, phy, _kpath(rtwdev, phy)); in _dpk()
2725 static void _dpk_onoff(struct rtw89_dev *rtwdev, in _dpk_onoff() argument
2728 struct rtw89_dpk_info *dpk = &rtwdev->dpk; in _dpk_onoff()
2733 rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2), in _dpk_onoff()
2736 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d[%d] DPK %s !!!\n", path, in _dpk_onoff()
2740 static void _dpk_track(struct rtw89_dev *rtwdev) in _dpk_track() argument
2742 struct rtw89_dpk_info *dpk = &rtwdev->dpk; in _dpk_track()
2743 struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; in _dpk_track()
2754 rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK, in _dpk_track()
2758 cur_ther = ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]); in _dpk_track()
2760 rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK, in _dpk_track()
2771 txagc_rf = (u8)rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB + (path << 13), in _dpk_track()
2774 if (rtwdev->is_tssi_mode[path]) { in _dpk_track()
2775 trk_idx = (u8)rtw89_read_rf(rtwdev, path, RR_TXA, RR_TXA_TRK); in _dpk_track()
2777 rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK, in _dpk_track()
2782 (s8)rtw89_phy_read32_mask(rtwdev, in _dpk_track()
2786 (u8)rtw89_phy_read32_mask(rtwdev, in _dpk_track()
2790 rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK, in _dpk_track()
2795 (s8)rtw89_phy_read32_mask(rtwdev, in _dpk_track()
2799 rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK, in _dpk_track()
2803 if (rtw89_phy_read32_mask(rtwdev, R_DPD_COM + (path << 8), in _dpk_track()
2810 if (rtw89_phy_read32_mask(rtwdev, R_P0_TXDPD + (path << 13), in _dpk_track()
2830 if (rtw89_phy_read32_mask(rtwdev, R_DPK_TRK, B_DPK_TRK_DIS) == 0x0 && in _dpk_track()
2832 rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK, in _dpk_track()
2836 rtw89_phy_write32_mask(rtwdev, R_DPD_BND + (path << 8) + (kidx << 2), in _dpk_track()
2838 rtw89_phy_write32_mask(rtwdev, R_DPD_BND + (path << 8) + (kidx << 2), in _dpk_track()
2844 static void _tssi_rf_setting(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, in _tssi_rf_setting() argument
2847 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); in _tssi_rf_setting()
2851 rtw89_write_rf(rtwdev, path, RR_TXPOW, RR_TXPOW_TXG, 0x1); in _tssi_rf_setting()
2853 rtw89_write_rf(rtwdev, path, RR_TXPOW, RR_TXPOW_TXA, 0x1); in _tssi_rf_setting()
2856 static void _tssi_set_sys(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) in _tssi_set_sys() argument
2858 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); in _tssi_set_sys()
2861 rtw89_rfk_parser(rtwdev, &rtw8852a_tssi_sys_defs_tbl); in _tssi_set_sys()
2862 rtw89_rfk_parser_by_cond(rtwdev, band == RTW89_BAND_2G, in _tssi_set_sys()
2867 static void _tssi_ini_txpwr_ctrl_bb(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, in _tssi_ini_txpwr_ctrl_bb() argument
2870 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); in _tssi_ini_txpwr_ctrl_bb()
2873 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _tssi_ini_txpwr_ctrl_bb()
2876 rtw89_rfk_parser_by_cond(rtwdev, band == RTW89_BAND_2G, in _tssi_ini_txpwr_ctrl_bb()
2881 static void _tssi_ini_txpwr_ctrl_bb_he_tb(struct rtw89_dev *rtwdev, in _tssi_ini_txpwr_ctrl_bb_he_tb() argument
2885 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _tssi_ini_txpwr_ctrl_bb_he_tb()
2890 static void _tssi_set_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, in _tssi_set_dck() argument
2893 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _tssi_set_dck()
2898 static void _tssi_set_tmeter_tbl(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, in _tssi_set_tmeter_tbl() argument
2912 struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; in _tssi_set_tmeter_tbl()
2913 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); in _tssi_set_tmeter_tbl()
2956 rtw89_debug(rtwdev, RTW89_DBG_TSSI, in _tssi_set_tmeter_tbl()
2959 rtw89_phy_write32_mask(rtwdev, R_P0_TMETER, B_P0_TMETER_DIS, 0x0); in _tssi_set_tmeter_tbl()
2960 rtw89_phy_write32_mask(rtwdev, R_P0_TMETER, B_P0_TMETER_TRK, 0x1); in _tssi_set_tmeter_tbl()
2963 rtw89_phy_write32_mask(rtwdev, R_P0_TMETER, B_P0_TMETER, 32); in _tssi_set_tmeter_tbl()
2964 rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_VAL, 32); in _tssi_set_tmeter_tbl()
2967 rtw89_phy_write32(rtwdev, R_P0_TSSI_BASE + i, 0x0); in _tssi_set_tmeter_tbl()
2969 rtw89_debug(rtwdev, RTW89_DBG_TSSI, in _tssi_set_tmeter_tbl()
2975 rtw89_phy_write32_mask(rtwdev, R_P0_TMETER, B_P0_TMETER, thermal); in _tssi_set_tmeter_tbl()
2976 rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_VAL, in _tssi_set_tmeter_tbl()
2993 rtw89_phy_write32(rtwdev, R_P0_TSSI_BASE + i, tmp); in _tssi_set_tmeter_tbl()
2995 rtw89_debug(rtwdev, RTW89_DBG_TSSI, in _tssi_set_tmeter_tbl()
3000 rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, R_P0_RFCTM_RDY, 0x1); in _tssi_set_tmeter_tbl()
3001 rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, R_P0_RFCTM_RDY, 0x0); in _tssi_set_tmeter_tbl()
3006 rtw89_debug(rtwdev, RTW89_DBG_TSSI, in _tssi_set_tmeter_tbl()
3009 rtw89_phy_write32_mask(rtwdev, R_P1_TMETER, B_P1_TMETER_DIS, 0x0); in _tssi_set_tmeter_tbl()
3010 rtw89_phy_write32_mask(rtwdev, R_P1_TMETER, B_P1_TMETER_TRK, 0x1); in _tssi_set_tmeter_tbl()
3013 rtw89_phy_write32_mask(rtwdev, R_P1_TMETER, B_P1_TMETER, 32); in _tssi_set_tmeter_tbl()
3014 rtw89_phy_write32_mask(rtwdev, R_P1_RFCTM, B_P1_RFCTM_VAL, 32); in _tssi_set_tmeter_tbl()
3017 rtw89_phy_write32(rtwdev, R_TSSI_THOF + i, 0x0); in _tssi_set_tmeter_tbl()
3019 rtw89_debug(rtwdev, RTW89_DBG_TSSI, in _tssi_set_tmeter_tbl()
3025 rtw89_phy_write32_mask(rtwdev, R_P1_TMETER, B_P1_TMETER, thermal); in _tssi_set_tmeter_tbl()
3026 rtw89_phy_write32_mask(rtwdev, R_P1_RFCTM, B_P1_RFCTM_VAL, in _tssi_set_tmeter_tbl()
3043 rtw89_phy_write32(rtwdev, R_TSSI_THOF + i, tmp); in _tssi_set_tmeter_tbl()
3045 rtw89_debug(rtwdev, RTW89_DBG_TSSI, in _tssi_set_tmeter_tbl()
3050 rtw89_phy_write32_mask(rtwdev, R_P1_RFCTM, R_P1_RFCTM_RDY, 0x1); in _tssi_set_tmeter_tbl()
3051 rtw89_phy_write32_mask(rtwdev, R_P1_RFCTM, R_P1_RFCTM_RDY, 0x0); in _tssi_set_tmeter_tbl()
3056 static void _tssi_set_dac_gain_tbl(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, in _tssi_set_dac_gain_tbl() argument
3059 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _tssi_set_dac_gain_tbl()
3064 static void _tssi_slope_cal_org(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, in _tssi_slope_cal_org() argument
3067 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _tssi_slope_cal_org()
3072 static void _tssi_set_rf_gap_tbl(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, in _tssi_set_rf_gap_tbl() argument
3075 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _tssi_set_rf_gap_tbl()
3080 static void _tssi_set_slope(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, in _tssi_set_slope() argument
3083 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _tssi_set_slope()
3088 static void _tssi_set_track(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, in _tssi_set_track() argument
3091 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _tssi_set_track()
3096 static void _tssi_set_txagc_offset_mv_avg(struct rtw89_dev *rtwdev, in _tssi_set_txagc_offset_mv_avg() argument
3100 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _tssi_set_txagc_offset_mv_avg()
3105 static void _tssi_pak(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, in _tssi_pak() argument
3108 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); in _tssi_pak()
3114 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _tssi_pak()
3119 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _tssi_pak()
3124 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _tssi_pak()
3129 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _tssi_pak()
3136 static void _tssi_enable(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) in _tssi_enable() argument
3138 struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; in _tssi_enable()
3142 _tssi_set_track(rtwdev, phy, i); in _tssi_enable()
3143 _tssi_set_txagc_offset_mv_avg(rtwdev, phy, i); in _tssi_enable()
3145 rtw89_rfk_parser_by_cond(rtwdev, i == RF_PATH_A, in _tssi_enable()
3150 ewma_thermal_read(&rtwdev->phystat.avg_thermal[i]); in _tssi_enable()
3151 rtwdev->is_tssi_mode[i] = true; in _tssi_enable()
3155 static void _tssi_disable(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) in _tssi_disable() argument
3157 rtw89_rfk_parser(rtwdev, &rtw8852a_tssi_disable_defs_tbl); in _tssi_disable()
3159 rtwdev->is_tssi_mode[RF_PATH_A] = false; in _tssi_disable()
3160 rtwdev->is_tssi_mode[RF_PATH_B] = false; in _tssi_disable()
3163 static u32 _tssi_get_cck_group(struct rtw89_dev *rtwdev, u8 ch) in _tssi_get_cck_group() argument
3189 static u32 _tssi_get_ofdm_group(struct rtw89_dev *rtwdev, u8 ch) in _tssi_get_ofdm_group() argument
3257 static u32 _tssi_get_trim_group(struct rtw89_dev *rtwdev, u8 ch) in _tssi_get_trim_group() argument
3281 static s8 _tssi_get_ofdm_de(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, in _tssi_get_ofdm_de() argument
3284 struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; in _tssi_get_ofdm_de()
3285 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); in _tssi_get_ofdm_de()
3292 gidx = _tssi_get_ofdm_group(rtwdev, ch); in _tssi_get_ofdm_de()
3294 rtw89_debug(rtwdev, RTW89_DBG_TSSI, in _tssi_get_ofdm_de()
3305 rtw89_debug(rtwdev, RTW89_DBG_TSSI, in _tssi_get_ofdm_de()
3311 rtw89_debug(rtwdev, RTW89_DBG_TSSI, in _tssi_get_ofdm_de()
3318 static s8 _tssi_get_ofdm_trim_de(struct rtw89_dev *rtwdev, in _tssi_get_ofdm_trim_de() argument
3322 struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; in _tssi_get_ofdm_trim_de()
3323 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); in _tssi_get_ofdm_trim_de()
3330 tgidx = _tssi_get_trim_group(rtwdev, ch); in _tssi_get_ofdm_trim_de()
3332 rtw89_debug(rtwdev, RTW89_DBG_TSSI, in _tssi_get_ofdm_trim_de()
3343 rtw89_debug(rtwdev, RTW89_DBG_TSSI, in _tssi_get_ofdm_trim_de()
3349 rtw89_debug(rtwdev, RTW89_DBG_TSSI, in _tssi_get_ofdm_trim_de()
3357 static void _tssi_set_efuse_to_de(struct rtw89_dev *rtwdev, in _tssi_set_efuse_to_de() argument
3361 struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; in _tssi_set_efuse_to_de()
3362 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); in _tssi_set_efuse_to_de()
3377 rtw89_debug(rtwdev, RTW89_DBG_TSSI, "[TSSI][TRIM]: phy=%d ch=%d\n", in _tssi_set_efuse_to_de()
3381 gidx = _tssi_get_cck_group(rtwdev, ch); in _tssi_set_efuse_to_de()
3382 trim_de = _tssi_get_ofdm_trim_de(rtwdev, phy, i); in _tssi_set_efuse_to_de()
3385 rtw89_debug(rtwdev, RTW89_DBG_TSSI, in _tssi_set_efuse_to_de()
3389 rtw89_phy_write32_mask(rtwdev, r_cck_long[i], __DE_MASK, val); in _tssi_set_efuse_to_de()
3390 rtw89_phy_write32_mask(rtwdev, r_cck_short[i], __DE_MASK, val); in _tssi_set_efuse_to_de()
3392 rtw89_debug(rtwdev, RTW89_DBG_TSSI, in _tssi_set_efuse_to_de()
3395 rtw89_phy_read32_mask(rtwdev, r_cck_long[i], in _tssi_set_efuse_to_de()
3398 ofdm_de = _tssi_get_ofdm_de(rtwdev, phy, i); in _tssi_set_efuse_to_de()
3399 trim_de = _tssi_get_ofdm_trim_de(rtwdev, phy, i); in _tssi_set_efuse_to_de()
3402 rtw89_debug(rtwdev, RTW89_DBG_TSSI, in _tssi_set_efuse_to_de()
3406 rtw89_phy_write32_mask(rtwdev, r_mcs_20m[i], __DE_MASK, val); in _tssi_set_efuse_to_de()
3407 rtw89_phy_write32_mask(rtwdev, r_mcs_40m[i], __DE_MASK, val); in _tssi_set_efuse_to_de()
3408 rtw89_phy_write32_mask(rtwdev, r_mcs_80m[i], __DE_MASK, val); in _tssi_set_efuse_to_de()
3409 rtw89_phy_write32_mask(rtwdev, r_mcs_80m_80m[i], __DE_MASK, val); in _tssi_set_efuse_to_de()
3410 rtw89_phy_write32_mask(rtwdev, r_mcs_5m[i], __DE_MASK, val); in _tssi_set_efuse_to_de()
3411 rtw89_phy_write32_mask(rtwdev, r_mcs_10m[i], __DE_MASK, val); in _tssi_set_efuse_to_de()
3413 rtw89_debug(rtwdev, RTW89_DBG_TSSI, in _tssi_set_efuse_to_de()
3416 rtw89_phy_read32_mask(rtwdev, r_mcs_20m[i], in _tssi_set_efuse_to_de()
3422 static void _tssi_track(struct rtw89_dev *rtwdev) in _tssi_track() argument
3428 struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; in _tssi_track()
3434 rtw89_debug(rtwdev, RTW89_DBG_TSSI, "[TSSI][TRK] %s:\n", in _tssi_track()
3437 if (!rtwdev->is_tssi_mode[RF_PATH_A]) in _tssi_track()
3439 if (!rtwdev->is_tssi_mode[RF_PATH_B]) in _tssi_track()
3444 rtw89_debug(rtwdev, RTW89_DBG_TSSI, "[TSSI][TRK] return!!!\n"); in _tssi_track()
3448 cur_ther = (u8)rtw89_phy_read32_mask(rtwdev, in _tssi_track()
3461 rtw89_debug(rtwdev, RTW89_DBG_TSSI, in _tssi_track()
3473 rtw89_phy_write32_mask(rtwdev, R_DPD_OFT_EN + (path << 13), in _tssi_track()
3476 rtw89_phy_write32_mask(rtwdev, R_TXGAIN_SCALE + (path << 13), in _tssi_track()
3479 rtw89_phy_write32_mask(rtwdev, R_DPD_OFT_ADDR + (path << 13), in _tssi_track()
3482 rtw89_phy_write32_mask(rtwdev, R_TXGAIN_SCALE + (path << 13), in _tssi_track()
3488 static void _tssi_high_power(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) in _tssi_high_power() argument
3490 struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; in _tssi_high_power()
3491 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); in _tssi_high_power()
3506 power = rtw89_phy_read_txpwr_limit(rtwdev, band, bw, RTW89_1TX, in _tssi_high_power()
3511 rtw89_debug(rtwdev, RTW89_DBG_TSSI, "[TSSI] %s: phy=%d xdbm=%d\n", in _tssi_high_power()
3518 rtw89_rfk_parser(rtwdev, &rtw8852a_tssi_tracking_defs_tbl); in _tssi_high_power()
3526 static void _tssi_hw_tx(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, in _tssi_hw_tx() argument
3529 rtw8852a_bb_set_plcp_tx(rtwdev); in _tssi_hw_tx()
3530 rtw8852a_bb_cfg_tx_path(rtwdev, path); in _tssi_hw_tx()
3531 rtw8852a_bb_set_power(rtwdev, pwr_dbm, phy); in _tssi_hw_tx()
3532 rtw8852a_bb_set_pmac_pkt_tx(rtwdev, enable, 20, 5000, 0, phy); in _tssi_hw_tx()
3535 static void _tssi_pre_tx(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) in _tssi_pre_tx() argument
3537 struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; in _tssi_pre_tx()
3538 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); in _tssi_pre_tx()
3539 const struct rtw89_chip_info *mac_reg = rtwdev->chip; in _tssi_pre_tx()
3544 u8 phy_map = rtw89_btc_phymap(rtwdev, phy, 0); in _tssi_pre_tx()
3556 power = rtw89_phy_read_txpwr_limit(rtwdev, band, RTW89_CHANNEL_WIDTH_20, in _tssi_pre_tx()
3567 rtw89_debug(rtwdev, RTW89_DBG_TSSI, in _tssi_pre_tx()
3571 rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DPK, BTC_WRFK_START); in _tssi_pre_tx()
3572 rtw89_chip_stop_sch_tx(rtwdev, phy, &tx_en, RTW89_SCH_TX_SEL_ALL); in _tssi_pre_tx()
3573 _wait_rx_mode(rtwdev, _kpath(rtwdev, phy)); in _tssi_pre_tx()
3574 tx_counter = rtw89_phy_read32_mask(rtwdev, R_TX_COUNTER, MASKLWORD); in _tssi_pre_tx()
3576 _tssi_hw_tx(rtwdev, phy, RF_PATH_AB, xdbm, true); in _tssi_pre_tx()
3578 _tssi_hw_tx(rtwdev, phy, RF_PATH_AB, xdbm, false); in _tssi_pre_tx()
3580 tx_counter = rtw89_phy_read32_mask(rtwdev, R_TX_COUNTER, MASKLWORD) - in _tssi_pre_tx()
3583 if (rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB, MASKHWORD) != 0xc000 && in _tssi_pre_tx()
3584 rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB, MASKHWORD) != 0x0) { in _tssi_pre_tx()
3587 rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB, in _tssi_pre_tx()
3595 if (rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB_S1, MASKHWORD) != 0xc000 && in _tssi_pre_tx()
3596 rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB_S1, MASKHWORD) != 0x0) { in _tssi_pre_tx()
3599 rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB_S1, in _tssi_pre_tx()
3607 rtw89_debug(rtwdev, RTW89_DBG_TSSI, in _tssi_pre_tx()
3611 rtw89_debug(rtwdev, RTW89_DBG_TSSI, in _tssi_pre_tx()
3616 rtw8852a_bb_tx_mode_switch(rtwdev, phy, 0); in _tssi_pre_tx()
3618 rtw89_chip_resume_sch_tx(rtwdev, phy, tx_en); in _tssi_pre_tx()
3619 rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DPK, BTC_WRFK_STOP); in _tssi_pre_tx()
3622 void rtw8852a_rck(struct rtw89_dev *rtwdev) in rtw8852a_rck() argument
3627 _rck(rtwdev, path); in rtw8852a_rck()
3630 void rtw8852a_dack(struct rtw89_dev *rtwdev) in rtw8852a_dack() argument
3632 u8 phy_map = rtw89_btc_phymap(rtwdev, RTW89_PHY_0, 0); in rtw8852a_dack()
3634 rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DACK, BTC_WRFK_START); in rtw8852a_dack()
3635 _dac_cal(rtwdev, false); in rtw8852a_dack()
3636 rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DACK, BTC_WRFK_STOP); in rtw8852a_dack()
3639 void rtw8852a_iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) in rtw8852a_iqk() argument
3642 u8 phy_map = rtw89_btc_phymap(rtwdev, phy_idx, 0); in rtw8852a_iqk()
3644 rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_START); in rtw8852a_iqk()
3645 rtw89_chip_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL); in rtw8852a_iqk()
3646 _wait_rx_mode(rtwdev, _kpath(rtwdev, phy_idx)); in rtw8852a_iqk()
3648 _iqk_init(rtwdev); in rtw8852a_iqk()
3649 if (rtwdev->dbcc_en) in rtw8852a_iqk()
3650 _iqk_dbcc(rtwdev, phy_idx); in rtw8852a_iqk()
3652 _iqk(rtwdev, phy_idx, false); in rtw8852a_iqk()
3654 rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en); in rtw8852a_iqk()
3655 rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_STOP); in rtw8852a_iqk()
3658 void rtw8852a_iqk_track(struct rtw89_dev *rtwdev) in rtw8852a_iqk_track() argument
3660 _iqk_track(rtwdev); in rtw8852a_iqk_track()
3663 void rtw8852a_rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, in rtw8852a_rx_dck() argument
3667 u8 phy_map = rtw89_btc_phymap(rtwdev, phy_idx, 0); in rtw8852a_rx_dck()
3669 rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_RXDCK, BTC_WRFK_START); in rtw8852a_rx_dck()
3670 rtw89_chip_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL); in rtw8852a_rx_dck()
3671 _wait_rx_mode(rtwdev, _kpath(rtwdev, phy_idx)); in rtw8852a_rx_dck()
3673 _rx_dck(rtwdev, phy_idx, is_afe); in rtw8852a_rx_dck()
3675 rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en); in rtw8852a_rx_dck()
3676 rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_RXDCK, BTC_WRFK_STOP); in rtw8852a_rx_dck()
3679 void rtw8852a_dpk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) in rtw8852a_dpk() argument
3682 u8 phy_map = rtw89_btc_phymap(rtwdev, phy_idx, 0); in rtw8852a_dpk()
3684 rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DPK, BTC_WRFK_START); in rtw8852a_dpk()
3685 rtw89_chip_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL); in rtw8852a_dpk()
3686 _wait_rx_mode(rtwdev, _kpath(rtwdev, phy_idx)); in rtw8852a_dpk()
3688 rtwdev->dpk.is_dpk_enable = true; in rtw8852a_dpk()
3689 rtwdev->dpk.is_dpk_reload_en = false; in rtw8852a_dpk()
3690 _dpk(rtwdev, phy_idx, false); in rtw8852a_dpk()
3692 rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en); in rtw8852a_dpk()
3693 rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DPK, BTC_WRFK_STOP); in rtw8852a_dpk()
3696 void rtw8852a_dpk_track(struct rtw89_dev *rtwdev) in rtw8852a_dpk_track() argument
3698 _dpk_track(rtwdev); in rtw8852a_dpk_track()
3701 void rtw8852a_tssi(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) in rtw8852a_tssi() argument
3705 rtw89_debug(rtwdev, RTW89_DBG_TSSI, "[TSSI] %s: phy=%d\n", in rtw8852a_tssi()
3708 _tssi_disable(rtwdev, phy); in rtw8852a_tssi()
3711 _tssi_rf_setting(rtwdev, phy, i); in rtw8852a_tssi()
3712 _tssi_set_sys(rtwdev, phy); in rtw8852a_tssi()
3713 _tssi_ini_txpwr_ctrl_bb(rtwdev, phy, i); in rtw8852a_tssi()
3714 _tssi_ini_txpwr_ctrl_bb_he_tb(rtwdev, phy, i); in rtw8852a_tssi()
3715 _tssi_set_dck(rtwdev, phy, i); in rtw8852a_tssi()
3716 _tssi_set_tmeter_tbl(rtwdev, phy, i); in rtw8852a_tssi()
3717 _tssi_set_dac_gain_tbl(rtwdev, phy, i); in rtw8852a_tssi()
3718 _tssi_slope_cal_org(rtwdev, phy, i); in rtw8852a_tssi()
3719 _tssi_set_rf_gap_tbl(rtwdev, phy, i); in rtw8852a_tssi()
3720 _tssi_set_slope(rtwdev, phy, i); in rtw8852a_tssi()
3721 _tssi_pak(rtwdev, phy, i); in rtw8852a_tssi()
3724 _tssi_enable(rtwdev, phy); in rtw8852a_tssi()
3725 _tssi_set_efuse_to_de(rtwdev, phy); in rtw8852a_tssi()
3726 _tssi_high_power(rtwdev, phy); in rtw8852a_tssi()
3727 _tssi_pre_tx(rtwdev, phy); in rtw8852a_tssi()
3730 void rtw8852a_tssi_scan(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) in rtw8852a_tssi_scan() argument
3734 rtw89_debug(rtwdev, RTW89_DBG_TSSI, "[TSSI] %s: phy=%d\n", in rtw8852a_tssi_scan()
3737 if (!rtwdev->is_tssi_mode[RF_PATH_A]) in rtw8852a_tssi_scan()
3739 if (!rtwdev->is_tssi_mode[RF_PATH_B]) in rtw8852a_tssi_scan()
3742 _tssi_disable(rtwdev, phy); in rtw8852a_tssi_scan()
3745 _tssi_rf_setting(rtwdev, phy, i); in rtw8852a_tssi_scan()
3746 _tssi_set_sys(rtwdev, phy); in rtw8852a_tssi_scan()
3747 _tssi_set_tmeter_tbl(rtwdev, phy, i); in rtw8852a_tssi_scan()
3748 _tssi_pak(rtwdev, phy, i); in rtw8852a_tssi_scan()
3751 _tssi_enable(rtwdev, phy); in rtw8852a_tssi_scan()
3752 _tssi_set_efuse_to_de(rtwdev, phy); in rtw8852a_tssi_scan()
3755 void rtw8852a_tssi_track(struct rtw89_dev *rtwdev) in rtw8852a_tssi_track() argument
3757 _tssi_track(rtwdev); in rtw8852a_tssi_track()
3761 void _rtw8852a_tssi_avg_scan(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) in _rtw8852a_tssi_avg_scan() argument
3763 if (!rtwdev->is_tssi_mode[RF_PATH_A] && !rtwdev->is_tssi_mode[RF_PATH_B]) in _rtw8852a_tssi_avg_scan()
3767 rtw89_rfk_parser(rtwdev, &rtw8852a_tssi_disable_defs_tbl); in _rtw8852a_tssi_avg_scan()
3769 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_AVG, B_P0_TSSI_AVG, 0x0); in _rtw8852a_tssi_avg_scan()
3770 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_MV_AVG, B_P0_TSSI_MV_AVG, 0x0); in _rtw8852a_tssi_avg_scan()
3772 rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_AVG, B_P1_TSSI_AVG, 0x0); in _rtw8852a_tssi_avg_scan()
3773 rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_MV_AVG, B_P1_TSSI_MV_AVG, 0x0); in _rtw8852a_tssi_avg_scan()
3776 rtw89_rfk_parser(rtwdev, &rtw8852a_tssi_enable_defs_ab_tbl); in _rtw8852a_tssi_avg_scan()
3780 void _rtw8852a_tssi_set_avg(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) in _rtw8852a_tssi_set_avg() argument
3782 if (!rtwdev->is_tssi_mode[RF_PATH_A] && !rtwdev->is_tssi_mode[RF_PATH_B]) in _rtw8852a_tssi_set_avg()
3786 rtw89_rfk_parser(rtwdev, &rtw8852a_tssi_disable_defs_tbl); in _rtw8852a_tssi_set_avg()
3788 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_AVG, B_P0_TSSI_AVG, 0x4); in _rtw8852a_tssi_set_avg()
3789 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_MV_AVG, B_P0_TSSI_MV_AVG, 0x2); in _rtw8852a_tssi_set_avg()
3791 rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_AVG, B_P1_TSSI_AVG, 0x4); in _rtw8852a_tssi_set_avg()
3792 rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_MV_AVG, B_P1_TSSI_MV_AVG, 0x2); in _rtw8852a_tssi_set_avg()
3795 rtw89_rfk_parser(rtwdev, &rtw8852a_tssi_enable_defs_ab_tbl); in _rtw8852a_tssi_set_avg()
3798 static void rtw8852a_tssi_set_avg(struct rtw89_dev *rtwdev, in rtw8852a_tssi_set_avg() argument
3801 if (!rtwdev->is_tssi_mode[RF_PATH_A] && !rtwdev->is_tssi_mode[RF_PATH_B]) in rtw8852a_tssi_set_avg()
3806 _rtw8852a_tssi_avg_scan(rtwdev, phy); in rtw8852a_tssi_set_avg()
3809 _rtw8852a_tssi_set_avg(rtwdev, phy); in rtw8852a_tssi_set_avg()
3813 static void rtw8852a_tssi_default_txagc(struct rtw89_dev *rtwdev, in rtw8852a_tssi_default_txagc() argument
3816 struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; in rtw8852a_tssi_default_txagc()
3819 if (!rtwdev->is_tssi_mode[RF_PATH_A] && !rtwdev->is_tssi_mode[RF_PATH_B]) in rtw8852a_tssi_default_txagc()
3823 if (rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB, B_TXAGC_BB_OFT) != 0xc000 && in rtw8852a_tssi_default_txagc()
3824 rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB, B_TXAGC_BB_OFT) != 0x0) { in rtw8852a_tssi_default_txagc()
3827 rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB, in rtw8852a_tssi_default_txagc()
3834 if (rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB_S1, B_TXAGC_BB_S1_OFT) != 0xc000 && in rtw8852a_tssi_default_txagc()
3835 rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB_S1, B_TXAGC_BB_S1_OFT) != 0x0) { in rtw8852a_tssi_default_txagc()
3838 rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB_S1, in rtw8852a_tssi_default_txagc()
3845 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT, in rtw8852a_tssi_default_txagc()
3847 rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_TRK, B_P1_TSSI_OFT, in rtw8852a_tssi_default_txagc()
3850 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT_EN, 0x0); in rtw8852a_tssi_default_txagc()
3851 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT_EN, 0x1); in rtw8852a_tssi_default_txagc()
3853 rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_TRK, B_P1_TSSI_OFT_EN, 0x0); in rtw8852a_tssi_default_txagc()
3854 rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_TRK, B_P1_TSSI_OFT_EN, 0x1); in rtw8852a_tssi_default_txagc()
3858 void rtw8852a_wifi_scan_notify(struct rtw89_dev *rtwdev, in rtw8852a_wifi_scan_notify() argument
3862 rtw8852a_tssi_default_txagc(rtwdev, phy_idx, true); in rtw8852a_wifi_scan_notify()
3863 rtw8852a_tssi_set_avg(rtwdev, phy_idx, true); in rtw8852a_wifi_scan_notify()
3865 rtw8852a_tssi_default_txagc(rtwdev, phy_idx, false); in rtw8852a_wifi_scan_notify()
3866 rtw8852a_tssi_set_avg(rtwdev, phy_idx, false); in rtw8852a_wifi_scan_notify()