Lines Matching refs:rtwdev
490 static void rtw8852a_efuse_parsing_tssi(struct rtw89_dev *rtwdev, in rtw8852a_efuse_parsing_tssi() argument
493 struct rtw89_tssi_info *tssi = &rtwdev->tssi; in rtw8852a_efuse_parsing_tssi()
505 rtw89_debug(rtwdev, RTW89_DBG_TSSI, in rtw8852a_efuse_parsing_tssi()
515 rtw89_debug(rtwdev, RTW89_DBG_TSSI, in rtw8852a_efuse_parsing_tssi()
521 static int rtw8852a_read_efuse(struct rtw89_dev *rtwdev, u8 *log_map) in rtw8852a_read_efuse() argument
523 struct rtw89_efuse *efuse = &rtwdev->efuse; in rtw8852a_read_efuse()
530 rtw8852a_efuse_parsing_tssi(rtwdev, map); in rtw8852a_read_efuse()
532 switch (rtwdev->hci.type) { in rtw8852a_read_efuse()
540 rtw89_info(rtwdev, "chip rfe_type is %d\n", efuse->rfe_type); in rtw8852a_read_efuse()
545 static void rtw8852a_phycap_parsing_tssi(struct rtw89_dev *rtwdev, u8 *phycap_map) in rtw8852a_phycap_parsing_tssi() argument
547 struct rtw89_tssi_info *tssi = &rtwdev->tssi; in rtw8852a_phycap_parsing_tssi()
549 u32 addr = rtwdev->chip->phycap_addr; in rtw8852a_phycap_parsing_tssi()
567 rtw89_debug(rtwdev, RTW89_DBG_TSSI, in rtw8852a_phycap_parsing_tssi()
573 rtw89_debug(rtwdev, RTW89_DBG_TSSI, in rtw8852a_phycap_parsing_tssi()
579 static void rtw8852a_phycap_parsing_thermal_trim(struct rtw89_dev *rtwdev, in rtw8852a_phycap_parsing_thermal_trim() argument
582 struct rtw89_power_trim_info *info = &rtwdev->pwr_trim; in rtw8852a_phycap_parsing_thermal_trim()
584 u32 addr = rtwdev->chip->phycap_addr; in rtw8852a_phycap_parsing_thermal_trim()
590 rtw89_debug(rtwdev, RTW89_DBG_RFK, in rtw8852a_phycap_parsing_thermal_trim()
599 static void rtw8852a_thermal_trim(struct rtw89_dev *rtwdev) in rtw8852a_thermal_trim() argument
606 struct rtw89_power_trim_info *info = &rtwdev->pwr_trim; in rtw8852a_thermal_trim()
610 rtw89_debug(rtwdev, RTW89_DBG_RFK, in rtw8852a_thermal_trim()
618 rtw89_write_rf(rtwdev, i, RR_TM2, RR_TM2_OFF, val); in rtw8852a_thermal_trim()
620 rtw89_debug(rtwdev, RTW89_DBG_RFK, in rtw8852a_thermal_trim()
627 static void rtw8852a_phycap_parsing_pa_bias_trim(struct rtw89_dev *rtwdev, in rtw8852a_phycap_parsing_pa_bias_trim() argument
630 struct rtw89_power_trim_info *info = &rtwdev->pwr_trim; in rtw8852a_phycap_parsing_pa_bias_trim()
632 u32 addr = rtwdev->chip->phycap_addr; in rtw8852a_phycap_parsing_pa_bias_trim()
638 rtw89_debug(rtwdev, RTW89_DBG_RFK, in rtw8852a_phycap_parsing_pa_bias_trim()
647 static void rtw8852a_pa_bias_trim(struct rtw89_dev *rtwdev) in rtw8852a_pa_bias_trim() argument
649 struct rtw89_power_trim_info *info = &rtwdev->pwr_trim; in rtw8852a_pa_bias_trim()
654 rtw89_debug(rtwdev, RTW89_DBG_RFK, in rtw8852a_pa_bias_trim()
664 rtw89_debug(rtwdev, RTW89_DBG_RFK, in rtw8852a_pa_bias_trim()
668 rtw89_write_rf(rtwdev, i, RR_BIASA, RR_BIASA_TXG, pabias_2g); in rtw8852a_pa_bias_trim()
669 rtw89_write_rf(rtwdev, i, RR_BIASA, RR_BIASA_TXA, pabias_5g); in rtw8852a_pa_bias_trim()
673 static int rtw8852a_read_phycap(struct rtw89_dev *rtwdev, u8 *phycap_map) in rtw8852a_read_phycap() argument
675 rtw8852a_phycap_parsing_tssi(rtwdev, phycap_map); in rtw8852a_read_phycap()
676 rtw8852a_phycap_parsing_thermal_trim(rtwdev, phycap_map); in rtw8852a_read_phycap()
677 rtw8852a_phycap_parsing_pa_bias_trim(rtwdev, phycap_map); in rtw8852a_read_phycap()
682 static void rtw8852a_power_trim(struct rtw89_dev *rtwdev) in rtw8852a_power_trim() argument
684 rtw8852a_thermal_trim(rtwdev); in rtw8852a_power_trim()
685 rtw8852a_pa_bias_trim(rtwdev); in rtw8852a_power_trim()
688 static void rtw8852a_set_channel_mac(struct rtw89_dev *rtwdev, in rtw8852a_set_channel_mac() argument
700 txsc40 = rtw89_phy_get_txsc(rtwdev, chan, in rtw8852a_set_channel_mac()
704 txsc20 = rtw89_phy_get_txsc(rtwdev, chan, in rtw8852a_set_channel_mac()
713 rtw89_write8_mask(rtwdev, rf_mod, B_AX_WMAC_RFMOD_MASK, BIT(1)); in rtw8852a_set_channel_mac()
714 rtw89_write32(rtwdev, sub_carr, txsc20 | (txsc40 << 4)); in rtw8852a_set_channel_mac()
717 rtw89_write8_mask(rtwdev, rf_mod, B_AX_WMAC_RFMOD_MASK, BIT(0)); in rtw8852a_set_channel_mac()
718 rtw89_write32(rtwdev, sub_carr, txsc20); in rtw8852a_set_channel_mac()
721 rtw89_write8_clr(rtwdev, rf_mod, B_AX_WMAC_RFMOD_MASK); in rtw8852a_set_channel_mac()
722 rtw89_write32(rtwdev, sub_carr, 0); in rtw8852a_set_channel_mac()
729 rtw89_write8_set(rtwdev, chk_rate, in rtw8852a_set_channel_mac()
732 rtw89_write8_clr(rtwdev, chk_rate, in rtw8852a_set_channel_mac()
746 static int rtw8852a_ctrl_sco_cck(struct rtw89_dev *rtwdev, u8 central_ch, in rtw8852a_ctrl_sco_cck() argument
759 rtw89_warn(rtwdev, "Invalid BW:%d for CCK\n", bw); in rtw8852a_ctrl_sco_cck()
762 rtw89_phy_write32_mask(rtwdev, R_RXSCOBC, B_RXSCOBC_TH, in rtw8852a_ctrl_sco_cck()
764 rtw89_phy_write32_mask(rtwdev, R_RXSCOCCK, B_RXSCOCCK_TH, in rtw8852a_ctrl_sco_cck()
770 static void rtw8852a_ch_setting(struct rtw89_dev *rtwdev, u8 central_ch, in rtw8852a_ch_setting() argument
775 val = rtw89_read_rf(rtwdev, path, RR_CFGCH, RFREG_MASK); in rtw8852a_ch_setting()
777 rtw89_warn(rtwdev, "Invalid RF_0x18 for Path-%d\n", path); in rtw8852a_ch_setting()
784 rtw89_write_rf(rtwdev, path, RR_CFGCH, RFREG_MASK, val); in rtw8852a_ch_setting()
815 static void rtw8852a_ctrl_ch(struct rtw89_dev *rtwdev, u8 central_ch, in rtw8852a_ctrl_ch() argument
823 rtw8852a_ch_setting(rtwdev, central_ch, RF_PATH_A); in rtw8852a_ctrl_ch()
825 rtw89_phy_write32_idx(rtwdev, R_PATH0_TIA_ERR_G1, in rtw8852a_ctrl_ch()
829 rtw89_phy_write32_idx(rtwdev, R_PATH0_TIA_ERR_G1, in rtw8852a_ctrl_ch()
834 if (!rtwdev->dbcc_en) { in rtw8852a_ctrl_ch()
835 rtw8852a_ch_setting(rtwdev, central_ch, RF_PATH_B); in rtw8852a_ctrl_ch()
837 rtw89_phy_write32_idx(rtwdev, R_P1_MODE, in rtw8852a_ctrl_ch()
841 rtw89_phy_write32_idx(rtwdev, R_P1_MODE, in rtw8852a_ctrl_ch()
846 rtw89_phy_write32_clr(rtwdev, R_2P4G_BAND, in rtw8852a_ctrl_ch()
849 rtw89_phy_write32_set(rtwdev, R_2P4G_BAND, in rtw8852a_ctrl_ch()
854 rtw89_phy_write32_idx(rtwdev, R_FC0_BW, B_FC0_BW_INV, in rtw8852a_ctrl_ch()
858 rtw8852a_ch_setting(rtwdev, central_ch, RF_PATH_B); in rtw8852a_ctrl_ch()
860 rtw89_phy_write32_idx(rtwdev, R_P1_MODE, in rtw8852a_ctrl_ch()
864 rtw89_phy_write32_idx(rtwdev, R_P1_MODE, in rtw8852a_ctrl_ch()
869 rtw89_phy_write32_idx(rtwdev, R_FC0_BW, B_FC0_BW_INV, in rtw8852a_ctrl_ch()
875 rtw89_phy_write32_idx(rtwdev, R_BANDEDGE, B_BANDEDGE_EN, 1, in rtw8852a_ctrl_ch()
878 rtw89_phy_write32_idx(rtwdev, R_BANDEDGE, B_BANDEDGE_EN, 0, in rtw8852a_ctrl_ch()
883 rtw89_phy_write32_mask(rtwdev, R_TXFIR0, B_TXFIR_C01, in rtw8852a_ctrl_ch()
885 rtw89_phy_write32_mask(rtwdev, R_TXFIR2, B_TXFIR_C23, in rtw8852a_ctrl_ch()
887 rtw89_phy_write32_mask(rtwdev, R_TXFIR4, B_TXFIR_C45, in rtw8852a_ctrl_ch()
889 rtw89_phy_write32_mask(rtwdev, R_TXFIR6, B_TXFIR_C67, in rtw8852a_ctrl_ch()
891 rtw89_phy_write32_mask(rtwdev, R_TXFIR8, B_TXFIR_C89, in rtw8852a_ctrl_ch()
893 rtw89_phy_write32_mask(rtwdev, R_TXFIRA, B_TXFIR_CAB, 0x2d011); in rtw8852a_ctrl_ch()
894 rtw89_phy_write32_mask(rtwdev, R_TXFIRC, B_TXFIR_CCD, 0x1c02c); in rtw8852a_ctrl_ch()
895 rtw89_phy_write32_mask(rtwdev, R_TXFIRE, B_TXFIR_CEF, in rtw8852a_ctrl_ch()
898 rtw89_phy_write32_mask(rtwdev, R_TXFIR0, B_TXFIR_C01, in rtw8852a_ctrl_ch()
900 rtw89_phy_write32_mask(rtwdev, R_TXFIR2, B_TXFIR_C23, in rtw8852a_ctrl_ch()
902 rtw89_phy_write32_mask(rtwdev, R_TXFIR4, B_TXFIR_C45, 0xfc1c8); in rtw8852a_ctrl_ch()
903 rtw89_phy_write32_mask(rtwdev, R_TXFIR6, B_TXFIR_C67, in rtw8852a_ctrl_ch()
905 rtw89_phy_write32_mask(rtwdev, R_TXFIR8, B_TXFIR_C89, in rtw8852a_ctrl_ch()
907 rtw89_phy_write32_mask(rtwdev, R_TXFIRA, B_TXFIR_CAB, in rtw8852a_ctrl_ch()
909 rtw89_phy_write32_mask(rtwdev, R_TXFIRC, B_TXFIR_CCD, in rtw8852a_ctrl_ch()
911 rtw89_phy_write32_mask(rtwdev, R_TXFIRE, B_TXFIR_CEF, in rtw8852a_ctrl_ch()
916 static void rtw8852a_bw_setting(struct rtw89_dev *rtwdev, u8 bw, u8 path) in rtw8852a_bw_setting() argument
922 val = rtw89_read_rf(rtwdev, path, RR_CFGCH, RFREG_MASK); in rtw8852a_bw_setting()
924 rtw89_warn(rtwdev, "Invalid RF_0x18 for Path-%d\n", path); in rtw8852a_bw_setting()
930 rtw89_phy_write32_mask(rtwdev, adc_sel[path], 0x6000, 0x1); in rtw8852a_bw_setting()
931 rtw89_phy_write32_mask(rtwdev, wbadc_sel[path], 0x30, 0x0); in rtw8852a_bw_setting()
935 rtw89_phy_write32_mask(rtwdev, adc_sel[path], 0x6000, 0x2); in rtw8852a_bw_setting()
936 rtw89_phy_write32_mask(rtwdev, wbadc_sel[path], 0x30, 0x1); in rtw8852a_bw_setting()
940 rtw89_phy_write32_mask(rtwdev, adc_sel[path], 0x6000, 0x0); in rtw8852a_bw_setting()
941 rtw89_phy_write32_mask(rtwdev, wbadc_sel[path], 0x30, 0x2); in rtw8852a_bw_setting()
945 rtw89_phy_write32_mask(rtwdev, adc_sel[path], 0x6000, 0x0); in rtw8852a_bw_setting()
946 rtw89_phy_write32_mask(rtwdev, wbadc_sel[path], 0x30, 0x2); in rtw8852a_bw_setting()
950 rtw89_phy_write32_mask(rtwdev, adc_sel[path], 0x6000, 0x0); in rtw8852a_bw_setting()
951 rtw89_phy_write32_mask(rtwdev, wbadc_sel[path], 0x30, 0x2); in rtw8852a_bw_setting()
955 rtw89_warn(rtwdev, "Fail to set ADC\n"); in rtw8852a_bw_setting()
958 rtw89_write_rf(rtwdev, path, RR_CFGCH, RFREG_MASK, val); in rtw8852a_bw_setting()
962 rtw8852a_ctrl_bw(struct rtw89_dev *rtwdev, u8 pri_ch, u8 bw, in rtw8852a_ctrl_bw() argument
968 rtw89_phy_write32_idx(rtwdev, R_FC0_BW, B_FC0_BW_SET, 0x0, in rtw8852a_ctrl_bw()
970 rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD, B_CHBW_MOD_SBW, 0x1, in rtw8852a_ctrl_bw()
972 rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD, B_CHBW_MOD_PRICH, in rtw8852a_ctrl_bw()
976 rtw89_phy_write32_idx(rtwdev, R_FC0_BW, B_FC0_BW_SET, 0x0, in rtw8852a_ctrl_bw()
978 rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD, B_CHBW_MOD_SBW, 0x2, in rtw8852a_ctrl_bw()
980 rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD, B_CHBW_MOD_PRICH, in rtw8852a_ctrl_bw()
984 rtw89_phy_write32_idx(rtwdev, R_FC0_BW, B_FC0_BW_SET, 0x0, in rtw8852a_ctrl_bw()
986 rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD, B_CHBW_MOD_SBW, 0x0, in rtw8852a_ctrl_bw()
988 rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD, B_CHBW_MOD_PRICH, in rtw8852a_ctrl_bw()
992 rtw89_phy_write32_idx(rtwdev, R_FC0_BW, B_FC0_BW_SET, 0x1, in rtw8852a_ctrl_bw()
994 rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD, B_CHBW_MOD_SBW, 0x0, in rtw8852a_ctrl_bw()
996 rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD, B_CHBW_MOD_PRICH, in rtw8852a_ctrl_bw()
1000 rtw89_phy_write32_mask(rtwdev, R_RXSC, B_RXSC_EN, 1); in rtw8852a_ctrl_bw()
1002 rtw89_phy_write32_mask(rtwdev, R_RXSC, B_RXSC_EN, 0); in rtw8852a_ctrl_bw()
1005 rtw89_phy_write32_idx(rtwdev, R_FC0_BW, B_FC0_BW_SET, 0x2, in rtw8852a_ctrl_bw()
1007 rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD, B_CHBW_MOD_SBW, 0x0, in rtw8852a_ctrl_bw()
1009 rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD, B_CHBW_MOD_PRICH, in rtw8852a_ctrl_bw()
1014 rtw89_warn(rtwdev, "Fail to switch bw (bw:%d, pri ch:%d)\n", bw, in rtw8852a_ctrl_bw()
1019 rtw8852a_bw_setting(rtwdev, bw, RF_PATH_A); in rtw8852a_ctrl_bw()
1020 if (!rtwdev->dbcc_en) in rtw8852a_ctrl_bw()
1021 rtw8852a_bw_setting(rtwdev, bw, RF_PATH_B); in rtw8852a_ctrl_bw()
1023 rtw8852a_bw_setting(rtwdev, bw, RF_PATH_B); in rtw8852a_ctrl_bw()
1027 static void rtw8852a_spur_elimination(struct rtw89_dev *rtwdev, u8 central_ch) in rtw8852a_spur_elimination() argument
1030 rtw89_phy_write32_mask(rtwdev, R_P0_NBIIDX, B_P0_NBIIDX_VAL, in rtw8852a_spur_elimination()
1032 rtw89_phy_write32_mask(rtwdev, R_P1_NBIIDX, B_P1_NBIIDX_VAL, in rtw8852a_spur_elimination()
1034 rtw89_phy_write32_mask(rtwdev, R_SEG0CSI, 0xfff, 0x7c0); in rtw8852a_spur_elimination()
1035 rtw89_phy_write32_mask(rtwdev, R_P0_NBIIDX, in rtw8852a_spur_elimination()
1037 rtw89_phy_write32_mask(rtwdev, R_P1_NBIIDX, in rtw8852a_spur_elimination()
1039 rtw89_phy_write32_mask(rtwdev, R_SEG0CSI_EN, B_SEG0CSI_EN, in rtw8852a_spur_elimination()
1042 rtw89_phy_write32_mask(rtwdev, R_P0_NBIIDX, B_P0_NBIIDX_VAL, in rtw8852a_spur_elimination()
1044 rtw89_phy_write32_mask(rtwdev, R_P1_NBIIDX, B_P1_NBIIDX_VAL, in rtw8852a_spur_elimination()
1046 rtw89_phy_write32_mask(rtwdev, R_SEG0CSI, 0xfff, 0x40); in rtw8852a_spur_elimination()
1047 rtw89_phy_write32_mask(rtwdev, R_P0_NBIIDX, in rtw8852a_spur_elimination()
1049 rtw89_phy_write32_mask(rtwdev, R_P1_NBIIDX, in rtw8852a_spur_elimination()
1051 rtw89_phy_write32_mask(rtwdev, R_SEG0CSI_EN, B_SEG0CSI_EN, in rtw8852a_spur_elimination()
1054 rtw89_phy_write32_mask(rtwdev, R_P0_NBIIDX, B_P0_NBIIDX_VAL, in rtw8852a_spur_elimination()
1056 rtw89_phy_write32_mask(rtwdev, R_P1_NBIIDX, B_P1_NBIIDX_VAL, in rtw8852a_spur_elimination()
1058 rtw89_phy_write32_mask(rtwdev, R_SEG0CSI, 0xfff, 0x740); in rtw8852a_spur_elimination()
1059 rtw89_phy_write32_mask(rtwdev, R_P0_NBIIDX, in rtw8852a_spur_elimination()
1061 rtw89_phy_write32_mask(rtwdev, R_P1_NBIIDX, in rtw8852a_spur_elimination()
1063 rtw89_phy_write32_mask(rtwdev, R_SEG0CSI_EN, B_SEG0CSI_EN, in rtw8852a_spur_elimination()
1066 rtw89_phy_write32_mask(rtwdev, R_P0_NBIIDX, in rtw8852a_spur_elimination()
1068 rtw89_phy_write32_mask(rtwdev, R_P1_NBIIDX, in rtw8852a_spur_elimination()
1070 rtw89_phy_write32_mask(rtwdev, R_SEG0CSI_EN, B_SEG0CSI_EN, in rtw8852a_spur_elimination()
1075 static void rtw8852a_bb_reset_all(struct rtw89_dev *rtwdev, in rtw8852a_bb_reset_all() argument
1078 rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, 1, in rtw8852a_bb_reset_all()
1080 rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, 0, in rtw8852a_bb_reset_all()
1082 rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, 1, in rtw8852a_bb_reset_all()
1086 static void rtw8852a_bb_reset_en(struct rtw89_dev *rtwdev, in rtw8852a_bb_reset_en() argument
1090 rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, in rtw8852a_bb_reset_en()
1094 rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, in rtw8852a_bb_reset_en()
1099 static void rtw8852a_bb_reset(struct rtw89_dev *rtwdev, in rtw8852a_bb_reset() argument
1102 rtw89_phy_write32_set(rtwdev, R_P0_TXPW_RSTB, B_P0_TXPW_RSTB_MANON); in rtw8852a_bb_reset()
1103 rtw89_phy_write32_set(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_TRK_EN); in rtw8852a_bb_reset()
1104 rtw89_phy_write32_set(rtwdev, R_P1_TXPW_RSTB, B_P1_TXPW_RSTB_MANON); in rtw8852a_bb_reset()
1105 rtw89_phy_write32_set(rtwdev, R_P1_TSSI_TRK, B_P1_TSSI_TRK_EN); in rtw8852a_bb_reset()
1106 rtw8852a_bb_reset_all(rtwdev, phy_idx); in rtw8852a_bb_reset()
1107 rtw89_phy_write32_clr(rtwdev, R_P0_TXPW_RSTB, B_P0_TXPW_RSTB_MANON); in rtw8852a_bb_reset()
1108 rtw89_phy_write32_clr(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_TRK_EN); in rtw8852a_bb_reset()
1109 rtw89_phy_write32_clr(rtwdev, R_P1_TXPW_RSTB, B_P1_TXPW_RSTB_MANON); in rtw8852a_bb_reset()
1110 rtw89_phy_write32_clr(rtwdev, R_P1_TSSI_TRK, B_P1_TSSI_TRK_EN); in rtw8852a_bb_reset()
1113 static void rtw8852a_bb_macid_ctrl_init(struct rtw89_dev *rtwdev, in rtw8852a_bb_macid_ctrl_init() argument
1120 rtw89_mac_txpwr_write32(rtwdev, phy_idx, addr, 0); in rtw8852a_bb_macid_ctrl_init()
1123 static void rtw8852a_bb_sethw(struct rtw89_dev *rtwdev) in rtw8852a_bb_sethw() argument
1125 rtw89_phy_write32_clr(rtwdev, R_P0_EN_SOUND_WO_NDP, B_P0_EN_SOUND_WO_NDP); in rtw8852a_bb_sethw()
1126 rtw89_phy_write32_clr(rtwdev, R_P1_EN_SOUND_WO_NDP, B_P1_EN_SOUND_WO_NDP); in rtw8852a_bb_sethw()
1128 if (rtwdev->hal.cv <= CHIP_CCV) { in rtw8852a_bb_sethw()
1129 rtw89_phy_write32_set(rtwdev, R_RSTB_WATCH_DOG, B_P0_RSTB_WATCH_DOG); in rtw8852a_bb_sethw()
1130 rtw89_phy_write32(rtwdev, R_BRK_ASYNC_RST_EN_1, 0x864FA000); in rtw8852a_bb_sethw()
1131 rtw89_phy_write32(rtwdev, R_BRK_ASYNC_RST_EN_2, 0x43F); in rtw8852a_bb_sethw()
1132 rtw89_phy_write32(rtwdev, R_BRK_ASYNC_RST_EN_3, 0x7FFF); in rtw8852a_bb_sethw()
1133 rtw89_phy_write32_set(rtwdev, R_SPOOF_ASYNC_RST, B_SPOOF_ASYNC_RST); in rtw8852a_bb_sethw()
1134 rtw89_phy_write32_set(rtwdev, R_P0_TXPW_RSTB, B_P0_TXPW_RSTB_MANON); in rtw8852a_bb_sethw()
1135 rtw89_phy_write32_set(rtwdev, R_P1_TXPW_RSTB, B_P1_TXPW_RSTB_MANON); in rtw8852a_bb_sethw()
1136 rtw89_phy_write32_set(rtwdev, R_PLCP_HISTOGRAM, B_STS_PARSING_TIME); in rtw8852a_bb_sethw()
1138 rtw89_phy_write32_mask(rtwdev, R_CFO_TRK0, B_CFO_TRK_MSK, 0x1f); in rtw8852a_bb_sethw()
1139 rtw89_phy_write32_mask(rtwdev, R_CFO_TRK1, B_CFO_TRK_MSK, 0x0c); in rtw8852a_bb_sethw()
1140 rtw89_phy_write32_idx(rtwdev, R_MAC_SEL, B_MAC_SEL_MOD, 0x0, RTW89_PHY_0); in rtw8852a_bb_sethw()
1141 rtw89_phy_write32_idx(rtwdev, R_MAC_SEL, B_MAC_SEL_MOD, 0x0, RTW89_PHY_1); in rtw8852a_bb_sethw()
1142 rtw89_phy_write32_clr(rtwdev, R_NDP_BRK0, B_NDP_RU_BRK); in rtw8852a_bb_sethw()
1143 rtw89_phy_write32_set(rtwdev, R_NDP_BRK1, B_NDP_RU_BRK); in rtw8852a_bb_sethw()
1145 rtw8852a_bb_macid_ctrl_init(rtwdev, RTW89_PHY_0); in rtw8852a_bb_sethw()
1148 static void rtw8852a_bbrst_for_rfk(struct rtw89_dev *rtwdev, in rtw8852a_bbrst_for_rfk() argument
1151 rtw89_phy_write32_set(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_TRK_EN); in rtw8852a_bbrst_for_rfk()
1152 rtw89_phy_write32_set(rtwdev, R_P1_TSSI_TRK, B_P1_TSSI_TRK_EN); in rtw8852a_bbrst_for_rfk()
1153 rtw8852a_bb_reset_all(rtwdev, phy_idx); in rtw8852a_bbrst_for_rfk()
1154 rtw89_phy_write32_clr(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_TRK_EN); in rtw8852a_bbrst_for_rfk()
1155 rtw89_phy_write32_clr(rtwdev, R_P1_TSSI_TRK, B_P1_TSSI_TRK_EN); in rtw8852a_bbrst_for_rfk()
1159 static void rtw8852a_set_channel_bb(struct rtw89_dev *rtwdev, in rtw8852a_set_channel_bb() argument
1167 rtw8852a_ctrl_sco_cck(rtwdev, chan->channel, in rtw8852a_set_channel_bb()
1171 rtw8852a_ctrl_ch(rtwdev, chan->channel, phy_idx); in rtw8852a_set_channel_bb()
1172 rtw8852a_ctrl_bw(rtwdev, pri_ch_idx, chan->band_width, phy_idx); in rtw8852a_set_channel_bb()
1174 rtw89_phy_write32_mask(rtwdev, R_RXCCA, B_RXCCA_DIS, 0); in rtw8852a_set_channel_bb()
1176 rtw89_phy_write32_mask(rtwdev, R_RXCCA, B_RXCCA_DIS, 1); in rtw8852a_set_channel_bb()
1177 rtw8852a_bbrst_for_rfk(rtwdev, phy_idx); in rtw8852a_set_channel_bb()
1179 rtw8852a_spur_elimination(rtwdev, chan->channel); in rtw8852a_set_channel_bb()
1180 rtw89_phy_write32_mask(rtwdev, R_MAC_PIN_SEL, B_CH_IDX_SEG0, in rtw8852a_set_channel_bb()
1182 rtw8852a_bb_reset_all(rtwdev, phy_idx); in rtw8852a_set_channel_bb()
1185 static void rtw8852a_set_channel(struct rtw89_dev *rtwdev, in rtw8852a_set_channel() argument
1190 rtw8852a_set_channel_mac(rtwdev, chan, mac_idx); in rtw8852a_set_channel()
1191 rtw8852a_set_channel_bb(rtwdev, chan, phy_idx); in rtw8852a_set_channel()
1194 static void rtw8852a_dfs_en(struct rtw89_dev *rtwdev, bool en) in rtw8852a_dfs_en() argument
1197 rtw89_phy_write32_mask(rtwdev, R_UPD_P0, B_UPD_P0_EN, 1); in rtw8852a_dfs_en()
1199 rtw89_phy_write32_mask(rtwdev, R_UPD_P0, B_UPD_P0_EN, 0); in rtw8852a_dfs_en()
1202 static void rtw8852a_tssi_cont_en(struct rtw89_dev *rtwdev, bool en, in rtw8852a_tssi_cont_en() argument
1209 rtw89_phy_write32_mask(rtwdev, ctrl_bbrst[path], BIT(30), 0x0); in rtw8852a_tssi_cont_en()
1210 rtw89_phy_write32_mask(rtwdev, tssi_trk[path], BIT(30), 0x0); in rtw8852a_tssi_cont_en()
1212 rtw89_phy_write32_mask(rtwdev, ctrl_bbrst[path], BIT(30), 0x1); in rtw8852a_tssi_cont_en()
1213 rtw89_phy_write32_mask(rtwdev, tssi_trk[path], BIT(30), 0x1); in rtw8852a_tssi_cont_en()
1217 static void rtw8852a_tssi_cont_en_phyidx(struct rtw89_dev *rtwdev, bool en, in rtw8852a_tssi_cont_en_phyidx() argument
1220 if (!rtwdev->dbcc_en) { in rtw8852a_tssi_cont_en_phyidx()
1221 rtw8852a_tssi_cont_en(rtwdev, en, RF_PATH_A); in rtw8852a_tssi_cont_en_phyidx()
1222 rtw8852a_tssi_cont_en(rtwdev, en, RF_PATH_B); in rtw8852a_tssi_cont_en_phyidx()
1225 rtw8852a_tssi_cont_en(rtwdev, en, RF_PATH_A); in rtw8852a_tssi_cont_en_phyidx()
1227 rtw8852a_tssi_cont_en(rtwdev, en, RF_PATH_B); in rtw8852a_tssi_cont_en_phyidx()
1231 static void rtw8852a_adc_en(struct rtw89_dev *rtwdev, bool en) in rtw8852a_adc_en() argument
1234 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_RST, in rtw8852a_adc_en()
1237 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_RST, in rtw8852a_adc_en()
1241 static void rtw8852a_set_channel_help(struct rtw89_dev *rtwdev, bool enter, in rtw8852a_set_channel_help() argument
1248 rtw89_chip_stop_sch_tx(rtwdev, mac_idx, &p->tx_en, in rtw8852a_set_channel_help()
1250 rtw89_mac_cfg_ppdu_status(rtwdev, mac_idx, false); in rtw8852a_set_channel_help()
1251 rtw8852a_dfs_en(rtwdev, false); in rtw8852a_set_channel_help()
1252 rtw8852a_tssi_cont_en_phyidx(rtwdev, false, phy_idx); in rtw8852a_set_channel_help()
1253 rtw8852a_adc_en(rtwdev, false); in rtw8852a_set_channel_help()
1255 rtw8852a_bb_reset_en(rtwdev, phy_idx, false); in rtw8852a_set_channel_help()
1257 rtw89_mac_cfg_ppdu_status(rtwdev, mac_idx, true); in rtw8852a_set_channel_help()
1258 rtw8852a_adc_en(rtwdev, true); in rtw8852a_set_channel_help()
1259 rtw8852a_dfs_en(rtwdev, true); in rtw8852a_set_channel_help()
1260 rtw8852a_tssi_cont_en_phyidx(rtwdev, true, phy_idx); in rtw8852a_set_channel_help()
1261 rtw8852a_bb_reset_en(rtwdev, phy_idx, true); in rtw8852a_set_channel_help()
1262 rtw89_chip_resume_sch_tx(rtwdev, mac_idx, p->tx_en); in rtw8852a_set_channel_help()
1266 static void rtw8852a_fem_setup(struct rtw89_dev *rtwdev) in rtw8852a_fem_setup() argument
1268 struct rtw89_efuse *efuse = &rtwdev->efuse; in rtw8852a_fem_setup()
1277 rtwdev->fem.epa_2g = true; in rtw8852a_fem_setup()
1278 rtwdev->fem.elna_2g = true; in rtw8852a_fem_setup()
1284 rtwdev->fem.epa_5g = true; in rtw8852a_fem_setup()
1285 rtwdev->fem.elna_5g = true; in rtw8852a_fem_setup()
1292 static void rtw8852a_rfk_init(struct rtw89_dev *rtwdev) in rtw8852a_rfk_init() argument
1294 rtwdev->is_tssi_mode[RF_PATH_A] = false; in rtw8852a_rfk_init()
1295 rtwdev->is_tssi_mode[RF_PATH_B] = false; in rtw8852a_rfk_init()
1297 rtw8852a_rck(rtwdev); in rtw8852a_rfk_init()
1298 rtw8852a_dack(rtwdev); in rtw8852a_rfk_init()
1299 rtw8852a_rx_dck(rtwdev, RTW89_PHY_0, true); in rtw8852a_rfk_init()
1302 static void rtw8852a_rfk_channel(struct rtw89_dev *rtwdev) in rtw8852a_rfk_channel() argument
1306 rtw8852a_rx_dck(rtwdev, phy_idx, true); in rtw8852a_rfk_channel()
1307 rtw8852a_iqk(rtwdev, phy_idx); in rtw8852a_rfk_channel()
1308 rtw8852a_tssi(rtwdev, phy_idx); in rtw8852a_rfk_channel()
1309 rtw8852a_dpk(rtwdev, phy_idx); in rtw8852a_rfk_channel()
1312 static void rtw8852a_rfk_band_changed(struct rtw89_dev *rtwdev, in rtw8852a_rfk_band_changed() argument
1315 rtw8852a_tssi_scan(rtwdev, phy_idx); in rtw8852a_rfk_band_changed()
1318 static void rtw8852a_rfk_scan(struct rtw89_dev *rtwdev, bool start) in rtw8852a_rfk_scan() argument
1320 rtw8852a_wifi_scan_notify(rtwdev, start, RTW89_PHY_0); in rtw8852a_rfk_scan()
1323 static void rtw8852a_rfk_track(struct rtw89_dev *rtwdev) in rtw8852a_rfk_track() argument
1325 rtw8852a_dpk_track(rtwdev); in rtw8852a_rfk_track()
1326 rtw8852a_iqk_track(rtwdev); in rtw8852a_rfk_track()
1327 rtw8852a_tssi_track(rtwdev); in rtw8852a_rfk_track()
1330 static u32 rtw8852a_bb_cal_txpwr_ref(struct rtw89_dev *rtwdev, in rtw8852a_bb_cal_txpwr_ref() argument
1349 rtw89_debug(rtwdev, RTW89_DBG_TXPWR, in rtw8852a_bb_cal_txpwr_ref()
1357 void rtw8852a_set_txpwr_ul_tb_offset(struct rtw89_dev *rtwdev, in rtw8852a_set_txpwr_ul_tb_offset() argument
1365 rtw89_debug(rtwdev, RTW89_DBG_TXPWR, "[ULTB] Err pwr_offset=%d\n", in rtw8852a_set_txpwr_ul_tb_offset()
1370 rtw89_write32_set(rtwdev, reg, B_AX_PWR_UL_TB_CTRL_EN); in rtw8852a_set_txpwr_ul_tb_offset()
1373 rtw89_write32_mask(rtwdev, reg, B_AX_PWR_UL_TB_1T_MASK, val_1t); in rtw8852a_set_txpwr_ul_tb_offset()
1376 rtw89_write32_mask(rtwdev, reg, B_AX_PWR_UL_TB_2T_MASK, val_2t); in rtw8852a_set_txpwr_ul_tb_offset()
1377 rtw89_debug(rtwdev, RTW89_DBG_TXPWR, "[ULTB] Set TB pwr_offset=(%d, %d)\n", in rtw8852a_set_txpwr_ul_tb_offset()
1381 static void rtw8852a_set_txpwr_ref(struct rtw89_dev *rtwdev, in rtw8852a_set_txpwr_ref() argument
1393 rtw89_debug(rtwdev, RTW89_DBG_TXPWR, "[TXPWR] set txpwr reference\n"); in rtw8852a_set_txpwr_ref()
1395 rtw89_mac_txpwr_write32_mask(rtwdev, phy_idx, R_AX_PWR_RATE_CTRL, in rtw8852a_set_txpwr_ref()
1398 rtw89_debug(rtwdev, RTW89_DBG_TXPWR, "[TXPWR] set bb ofdm txpwr ref\n"); in rtw8852a_set_txpwr_ref()
1399 val = rtw8852a_bb_cal_txpwr_ref(rtwdev, phy_idx, ref_ofdm); in rtw8852a_set_txpwr_ref()
1402 rtw89_phy_write32_idx(rtwdev, addr[i] + ofst_ofdm, mask, val, in rtw8852a_set_txpwr_ref()
1405 rtw89_debug(rtwdev, RTW89_DBG_TXPWR, "[TXPWR] set bb cck txpwr ref\n"); in rtw8852a_set_txpwr_ref()
1406 val = rtw8852a_bb_cal_txpwr_ref(rtwdev, phy_idx, ref_cck); in rtw8852a_set_txpwr_ref()
1409 rtw89_phy_write32_idx(rtwdev, addr[i] + ofst_cck, mask, val, in rtw8852a_set_txpwr_ref()
1413 static void rtw8852a_set_txpwr_byrate(struct rtw89_dev *rtwdev, in rtw8852a_set_txpwr_byrate() argument
1430 rtw89_debug(rtwdev, RTW89_DBG_TXPWR, in rtw8852a_set_txpwr_byrate()
1444 tmp = rtw89_phy_read_txpwr_byrate(rtwdev, band, in rtw8852a_set_txpwr_byrate()
1451 rtw89_mac_txpwr_write32(rtwdev, phy_idx, addr, val); in rtw8852a_set_txpwr_byrate()
1459 static void rtw8852a_set_txpwr_offset(struct rtw89_dev *rtwdev, in rtw8852a_set_txpwr_offset() argument
1471 rtw89_debug(rtwdev, RTW89_DBG_TXPWR, "[TXPWR] set txpwr offset\n"); in rtw8852a_set_txpwr_offset()
1474 v = rtw89_phy_read_txpwr_byrate(rtwdev, band, &desc); in rtw8852a_set_txpwr_offset()
1478 rtw89_mac_txpwr_write32_mask(rtwdev, phy_idx, R_AX_PWR_RATE_OFST_CTRL, in rtw8852a_set_txpwr_offset()
1482 static void rtw8852a_set_txpwr_limit(struct rtw89_dev *rtwdev, in rtw8852a_set_txpwr_limit() argument
1494 rtw89_debug(rtwdev, RTW89_DBG_TXPWR, in rtw8852a_set_txpwr_limit()
1498 rtw89_phy_fill_txpwr_limit(rtwdev, chan, &lmt[i], i); in rtw8852a_set_txpwr_limit()
1509 rtw89_mac_txpwr_write32(rtwdev, phy_idx, addr, val); in rtw8852a_set_txpwr_limit()
1515 static void rtw8852a_set_txpwr_limit_ru(struct rtw89_dev *rtwdev, in rtw8852a_set_txpwr_limit_ru() argument
1527 rtw89_debug(rtwdev, RTW89_DBG_TXPWR, in rtw8852a_set_txpwr_limit_ru()
1531 rtw89_phy_fill_txpwr_limit_ru(rtwdev, chan, &lmt_ru[i], i); in rtw8852a_set_txpwr_limit_ru()
1543 rtw89_mac_txpwr_write32(rtwdev, phy_idx, addr, val); in rtw8852a_set_txpwr_limit_ru()
1550 static void rtw8852a_set_txpwr(struct rtw89_dev *rtwdev, in rtw8852a_set_txpwr() argument
1554 rtw8852a_set_txpwr_byrate(rtwdev, chan, phy_idx); in rtw8852a_set_txpwr()
1555 rtw8852a_set_txpwr_offset(rtwdev, chan, phy_idx); in rtw8852a_set_txpwr()
1556 rtw8852a_set_txpwr_limit(rtwdev, chan, phy_idx); in rtw8852a_set_txpwr()
1557 rtw8852a_set_txpwr_limit_ru(rtwdev, chan, phy_idx); in rtw8852a_set_txpwr()
1560 static void rtw8852a_set_txpwr_ctrl(struct rtw89_dev *rtwdev, in rtw8852a_set_txpwr_ctrl() argument
1563 rtw8852a_set_txpwr_ref(rtwdev, phy_idx); in rtw8852a_set_txpwr_ctrl()
1567 rtw8852a_init_txpwr_unit(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) in rtw8852a_init_txpwr_unit() argument
1571 ret = rtw89_mac_txpwr_write32(rtwdev, phy_idx, R_AX_PWR_UL_CTRL2, 0x07763333); in rtw8852a_init_txpwr_unit()
1575 ret = rtw89_mac_txpwr_write32(rtwdev, phy_idx, R_AX_PWR_COEXT_CTRL, 0x01ebf004); in rtw8852a_init_txpwr_unit()
1579 ret = rtw89_mac_txpwr_write32(rtwdev, phy_idx, R_AX_PWR_UL_CTRL0, 0x0002f8ff); in rtw8852a_init_txpwr_unit()
1586 void rtw8852a_bb_set_plcp_tx(struct rtw89_dev *rtwdev) in rtw8852a_bb_set_plcp_tx() argument
1594 rtw89_phy_write32(rtwdev, addr, val); in rtw8852a_bb_set_plcp_tx()
1598 static void rtw8852a_stop_pmac_tx(struct rtw89_dev *rtwdev, in rtw8852a_stop_pmac_tx() argument
1602 rtw89_debug(rtwdev, RTW89_DBG_TSSI, "PMAC Stop Tx"); in rtw8852a_stop_pmac_tx()
1604 rtw89_phy_write32_idx(rtwdev, R_PMAC_TX_PRD, B_PMAC_CTX_EN, 0, in rtw8852a_stop_pmac_tx()
1607 rtw89_phy_write32_idx(rtwdev, R_PMAC_TX_PRD, B_PMAC_PTX_EN, 0, in rtw8852a_stop_pmac_tx()
1611 static void rtw8852a_start_pmac_tx(struct rtw89_dev *rtwdev, in rtw8852a_start_pmac_tx() argument
1620 rtw89_phy_write32_idx(rtwdev, R_PMAC_TX_PRD, B_PMAC_CTX_EN, 1, in rtw8852a_start_pmac_tx()
1622 rtw89_debug(rtwdev, RTW89_DBG_TSSI, "PMAC CTx Start"); in rtw8852a_start_pmac_tx()
1624 rtw89_phy_write32_idx(rtwdev, R_PMAC_TX_PRD, B_PMAC_PTX_EN, 1, in rtw8852a_start_pmac_tx()
1626 rtw89_phy_write32_idx(rtwdev, R_PMAC_TX_PRD, in rtw8852a_start_pmac_tx()
1628 rtw89_phy_write32_idx(rtwdev, R_PMAC_TX_CNT, B_PMAC_TX_CNT_MSK, in rtw8852a_start_pmac_tx()
1630 rtw89_debug(rtwdev, RTW89_DBG_TSSI, "PMAC PTx Start"); in rtw8852a_start_pmac_tx()
1632 rtw89_phy_write32_idx(rtwdev, R_PMAC_TX_CTRL, B_PMAC_TXEN_DIS, 1, idx); in rtw8852a_start_pmac_tx()
1633 rtw89_phy_write32_idx(rtwdev, R_PMAC_TX_CTRL, B_PMAC_TXEN_DIS, 0, idx); in rtw8852a_start_pmac_tx()
1636 void rtw8852a_bb_set_pmac_tx(struct rtw89_dev *rtwdev, in rtw8852a_bb_set_pmac_tx() argument
1640 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); in rtw8852a_bb_set_pmac_tx()
1643 rtw8852a_stop_pmac_tx(rtwdev, tx_info, idx); in rtw8852a_bb_set_pmac_tx()
1644 rtw89_phy_write32_idx(rtwdev, R_PD_CTRL, B_PD_HIT_DIS, 0, idx); in rtw8852a_bb_set_pmac_tx()
1646 rtw89_phy_write32_clr(rtwdev, R_RXCCA, B_RXCCA_DIS); in rtw8852a_bb_set_pmac_tx()
1649 rtw89_debug(rtwdev, RTW89_DBG_TSSI, "PMAC Tx Enable"); in rtw8852a_bb_set_pmac_tx()
1650 rtw89_phy_write32_idx(rtwdev, R_PMAC_GNT, B_PMAC_GNT_TXEN, 1, idx); in rtw8852a_bb_set_pmac_tx()
1651 rtw89_phy_write32_idx(rtwdev, R_PMAC_GNT, B_PMAC_GNT_RXEN, 1, idx); in rtw8852a_bb_set_pmac_tx()
1652 rtw89_phy_write32_idx(rtwdev, R_PMAC_RX_CFG1, B_PMAC_OPT1_MSK, 0x3f, in rtw8852a_bb_set_pmac_tx()
1654 rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, 0, idx); in rtw8852a_bb_set_pmac_tx()
1655 rtw89_phy_write32_idx(rtwdev, R_PD_CTRL, B_PD_HIT_DIS, 1, idx); in rtw8852a_bb_set_pmac_tx()
1656 rtw89_phy_write32_set(rtwdev, R_RXCCA, B_RXCCA_DIS); in rtw8852a_bb_set_pmac_tx()
1657 rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, 1, idx); in rtw8852a_bb_set_pmac_tx()
1658 rtw8852a_start_pmac_tx(rtwdev, tx_info, idx); in rtw8852a_bb_set_pmac_tx()
1661 void rtw8852a_bb_set_pmac_pkt_tx(struct rtw89_dev *rtwdev, u8 enable, in rtw8852a_bb_set_pmac_pkt_tx() argument
1673 rtw8852a_bb_set_pmac_tx(rtwdev, &tx_info, idx); in rtw8852a_bb_set_pmac_pkt_tx()
1676 void rtw8852a_bb_set_power(struct rtw89_dev *rtwdev, s16 pwr_dbm, in rtw8852a_bb_set_power() argument
1679 rtw89_debug(rtwdev, RTW89_DBG_TSSI, "PMAC CFG Tx PWR = %d", pwr_dbm); in rtw8852a_bb_set_power()
1680 rtw89_phy_write32_idx(rtwdev, R_MAC_SEL, B_MAC_SEL_PWR_EN, 1, idx); in rtw8852a_bb_set_power()
1681 rtw89_phy_write32_idx(rtwdev, R_TXPWR, B_TXPWR_MSK, pwr_dbm, idx); in rtw8852a_bb_set_power()
1684 void rtw8852a_bb_cfg_tx_path(struct rtw89_dev *rtwdev, u8 tx_path) in rtw8852a_bb_cfg_tx_path() argument
1689 rtw89_phy_write32_idx(rtwdev, R_MAC_SEL, B_MAC_SEL_MOD, 7, RTW89_PHY_0); in rtw8852a_bb_cfg_tx_path()
1690 rtw89_phy_write32_idx(rtwdev, R_MAC_SEL, B_MAC_SEL_MOD, 7, RTW89_PHY_1); in rtw8852a_bb_cfg_tx_path()
1691 rtw89_debug(rtwdev, RTW89_DBG_TSSI, "PMAC CFG Tx Path = %d", tx_path); in rtw8852a_bb_cfg_tx_path()
1692 if (!rtwdev->dbcc_en) { in rtw8852a_bb_cfg_tx_path()
1694 rtw89_phy_write32_mask(rtwdev, R_TXPATH_SEL, in rtw8852a_bb_cfg_tx_path()
1696 rtw89_phy_write32_mask(rtwdev, R_TXNSS_MAP, in rtw8852a_bb_cfg_tx_path()
1699 rtw89_phy_write32_mask(rtwdev, R_TXPATH_SEL, in rtw8852a_bb_cfg_tx_path()
1701 rtw89_phy_write32_mask(rtwdev, R_TXNSS_MAP, in rtw8852a_bb_cfg_tx_path()
1704 rtw89_phy_write32_mask(rtwdev, R_TXPATH_SEL, in rtw8852a_bb_cfg_tx_path()
1706 rtw89_phy_write32_mask(rtwdev, R_TXNSS_MAP, in rtw8852a_bb_cfg_tx_path()
1709 rtw89_debug(rtwdev, RTW89_DBG_TSSI, "Error Tx Path"); in rtw8852a_bb_cfg_tx_path()
1712 rtw89_phy_write32_mask(rtwdev, R_TXPATH_SEL, B_TXPATH_SEL_MSK, in rtw8852a_bb_cfg_tx_path()
1714 rtw89_phy_write32_idx(rtwdev, R_TXPATH_SEL, B_TXPATH_SEL_MSK, 2, in rtw8852a_bb_cfg_tx_path()
1716 rtw89_phy_write32_mask(rtwdev, R_TXNSS_MAP, B_TXNSS_MAP_MSK, in rtw8852a_bb_cfg_tx_path()
1718 rtw89_phy_write32_idx(rtwdev, R_TXNSS_MAP, B_TXNSS_MAP_MSK, 4, in rtw8852a_bb_cfg_tx_path()
1724 rtw89_phy_write32_mask(rtwdev, R_P0_TXPW_RSTB, rst_mask0, 1); in rtw8852a_bb_cfg_tx_path()
1725 rtw89_phy_write32_mask(rtwdev, R_P0_TXPW_RSTB, rst_mask0, 3); in rtw8852a_bb_cfg_tx_path()
1727 rtw89_phy_write32_mask(rtwdev, R_P1_TXPW_RSTB, rst_mask1, 1); in rtw8852a_bb_cfg_tx_path()
1728 rtw89_phy_write32_mask(rtwdev, R_P1_TXPW_RSTB, rst_mask1, 3); in rtw8852a_bb_cfg_tx_path()
1732 void rtw8852a_bb_tx_mode_switch(struct rtw89_dev *rtwdev, in rtw8852a_bb_tx_mode_switch() argument
1737 rtw89_debug(rtwdev, RTW89_DBG_TSSI, "Tx mode switch"); in rtw8852a_bb_tx_mode_switch()
1738 rtw89_phy_write32_idx(rtwdev, R_PMAC_GNT, B_PMAC_GNT_TXEN, 0, idx); in rtw8852a_bb_tx_mode_switch()
1739 rtw89_phy_write32_idx(rtwdev, R_PMAC_GNT, B_PMAC_GNT_RXEN, 0, idx); in rtw8852a_bb_tx_mode_switch()
1740 rtw89_phy_write32_idx(rtwdev, R_PMAC_RX_CFG1, B_PMAC_OPT1_MSK, 0, idx); in rtw8852a_bb_tx_mode_switch()
1741 rtw89_phy_write32_idx(rtwdev, R_PMAC_RXMOD, B_PMAC_RXMOD_MSK, 0, idx); in rtw8852a_bb_tx_mode_switch()
1742 rtw89_phy_write32_idx(rtwdev, R_MAC_SEL, B_MAC_SEL_DPD_EN, 0, idx); in rtw8852a_bb_tx_mode_switch()
1743 rtw89_phy_write32_idx(rtwdev, R_MAC_SEL, B_MAC_SEL_MOD, 0, idx); in rtw8852a_bb_tx_mode_switch()
1744 rtw89_phy_write32_idx(rtwdev, R_MAC_SEL, B_MAC_SEL_PWR_EN, 0, idx); in rtw8852a_bb_tx_mode_switch()
1747 static void rtw8852a_bb_ctrl_btc_preagc(struct rtw89_dev *rtwdev, bool bt_en) in rtw8852a_bb_ctrl_btc_preagc() argument
1749 rtw89_phy_write_reg3_tbl(rtwdev, bt_en ? &rtw8852a_btc_preagc_en_defs_tbl : in rtw8852a_bb_ctrl_btc_preagc()
1753 static u8 rtw8852a_get_thermal(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path) in rtw8852a_get_thermal() argument
1755 if (rtwdev->is_tssi_mode[rf_path]) { in rtw8852a_get_thermal()
1758 return (u8)rtw89_phy_read32_mask(rtwdev, addr, 0x3F000000); in rtw8852a_get_thermal()
1761 rtw89_write_rf(rtwdev, rf_path, RR_TM, RR_TM_TRI, 0x1); in rtw8852a_get_thermal()
1762 rtw89_write_rf(rtwdev, rf_path, RR_TM, RR_TM_TRI, 0x0); in rtw8852a_get_thermal()
1763 rtw89_write_rf(rtwdev, rf_path, RR_TM, RR_TM_TRI, 0x1); in rtw8852a_get_thermal()
1767 return (u8)rtw89_read_rf(rtwdev, rf_path, RR_TM, RR_TM_VAL); in rtw8852a_get_thermal()
1770 static void rtw8852a_btc_set_rfe(struct rtw89_dev *rtwdev) in rtw8852a_btc_set_rfe() argument
1772 struct rtw89_btc *btc = &rtwdev->btc; in rtw8852a_btc_set_rfe()
1775 module->rfe_type = rtwdev->efuse.rfe_type; in rtw8852a_btc_set_rfe()
1776 module->cv = rtwdev->hal.cv; in rtw8852a_btc_set_rfe()
1798 void rtw8852a_set_trx_mask(struct rtw89_dev *rtwdev, u8 path, u8 group, u32 val) in rtw8852a_set_trx_mask() argument
1800 rtw89_write_rf(rtwdev, path, RR_LUTWE, 0xfffff, 0x20000); in rtw8852a_set_trx_mask()
1801 rtw89_write_rf(rtwdev, path, RR_LUTWA, 0xfffff, group); in rtw8852a_set_trx_mask()
1802 rtw89_write_rf(rtwdev, path, RR_LUTWD0, 0xfffff, val); in rtw8852a_set_trx_mask()
1803 rtw89_write_rf(rtwdev, path, RR_LUTWE, 0xfffff, 0x0); in rtw8852a_set_trx_mask()
1806 static void rtw8852a_ctrl_btg(struct rtw89_dev *rtwdev, bool btg) in rtw8852a_ctrl_btg() argument
1809 rtw89_phy_write32_mask(rtwdev, R_PATH0_BTG, B_PATH0_BTG_SHEN, 0x1); in rtw8852a_ctrl_btg()
1810 rtw89_phy_write32_mask(rtwdev, R_PATH1_BTG, B_PATH1_BTG_SHEN, 0x3); in rtw8852a_ctrl_btg()
1811 rtw89_phy_write32_mask(rtwdev, R_PMAC_GNT, B_PMAC_GNT_P1, 0x0); in rtw8852a_ctrl_btg()
1813 rtw89_phy_write32_mask(rtwdev, R_PATH0_BTG, B_PATH0_BTG_SHEN, 0x0); in rtw8852a_ctrl_btg()
1814 rtw89_phy_write32_mask(rtwdev, R_PATH1_BTG, B_PATH1_BTG_SHEN, 0x0); in rtw8852a_ctrl_btg()
1815 rtw89_phy_write32_mask(rtwdev, R_PMAC_GNT, B_PMAC_GNT_P1, 0xf); in rtw8852a_ctrl_btg()
1816 rtw89_phy_write32_mask(rtwdev, R_PMAC_GNT, B_PMAC_GNT_P2, 0x4); in rtw8852a_ctrl_btg()
1820 static void rtw8852a_btc_init_cfg(struct rtw89_dev *rtwdev) in rtw8852a_btc_init_cfg() argument
1822 struct rtw89_btc *btc = &rtwdev->btc; in rtw8852a_btc_init_cfg()
1824 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw8852a_btc_init_cfg()
1831 rtw89_mac_coex_init(rtwdev, &coex_params); in rtw8852a_btc_init_cfg()
1834 chip->ops->btc_set_wl_pri(rtwdev, BTC_PRI_MASK_TX_RESP, true); in rtw8852a_btc_init_cfg()
1835 chip->ops->btc_set_wl_pri(rtwdev, BTC_PRI_MASK_BEACON, true); in rtw8852a_btc_init_cfg()
1838 rtw89_write_rf(rtwdev, RF_PATH_A, RR_WLSEL, 0xfffff, 0x0); in rtw8852a_btc_init_cfg()
1839 rtw89_write_rf(rtwdev, RF_PATH_B, RR_WLSEL, 0xfffff, 0x0); in rtw8852a_btc_init_cfg()
1843 rtw8852a_set_trx_mask(rtwdev, in rtw8852a_btc_init_cfg()
1845 rtw8852a_set_trx_mask(rtwdev, in rtw8852a_btc_init_cfg()
1848 rtw8852a_set_trx_mask(rtwdev, in rtw8852a_btc_init_cfg()
1851 rtw8852a_set_trx_mask(rtwdev, in rtw8852a_btc_init_cfg()
1853 rtw8852a_set_trx_mask(rtwdev, in rtw8852a_btc_init_cfg()
1858 rtw89_write32(rtwdev, R_BTC_BREAK_TABLE, BTC_BREAK_PARAM); in rtw8852a_btc_init_cfg()
1861 rtw89_write32_set(rtwdev, in rtw8852a_btc_init_cfg()
1867 void rtw8852a_btc_set_wl_pri(struct rtw89_dev *rtwdev, u8 map, bool state) in rtw8852a_btc_set_wl_pri() argument
1886 rtw89_write32_set(rtwdev, reg, bitmap); in rtw8852a_btc_set_wl_pri()
1888 rtw89_write32_clr(rtwdev, reg, bitmap); in rtw8852a_btc_set_wl_pri()
1928 rtw8852a_btc_set_wl_txpwr_ctrl(struct rtw89_dev *rtwdev, u32 txpwr_val) in rtw8852a_btc_set_wl_txpwr_ctrl() argument
1939 rtw89_debug(rtwdev, RTW89_DBG_TXPWR, \ in rtw8852a_btc_set_wl_txpwr_ctrl()
1941 if (rtw89_mac_txpwr_read32(rtwdev, RTW89_PHY_0, _reg, &_cur))\ in rtw8852a_btc_set_wl_txpwr_ctrl()
1943 rtw89_debug(rtwdev, RTW89_DBG_TXPWR, \ in rtw8852a_btc_set_wl_txpwr_ctrl()
1948 rtw89_mac_txpwr_write32(rtwdev, RTW89_PHY_0, _reg, _wrt);\ in rtw8852a_btc_set_wl_txpwr_ctrl()
1949 rtw89_debug(rtwdev, RTW89_DBG_TXPWR, \ in rtw8852a_btc_set_wl_txpwr_ctrl()
1961 s8 rtw8852a_btc_get_bt_rssi(struct rtw89_dev *rtwdev, s8 val) in rtw8852a_btc_get_bt_rssi() argument
2011 void rtw8852a_btc_bt_aci_imp(struct rtw89_dev *rtwdev) in rtw8852a_btc_bt_aci_imp() argument
2013 struct rtw89_btc *btc = &rtwdev->btc; in rtw8852a_btc_bt_aci_imp()
2024 void rtw8852a_btc_update_bt_cnt(struct rtw89_dev *rtwdev) in rtw8852a_btc_update_bt_cnt() argument
2026 struct rtw89_btc *btc = &rtwdev->btc; in rtw8852a_btc_update_bt_cnt()
2030 val = rtw89_read32(rtwdev, R_AX_BT_STAST_HIGH); in rtw8852a_btc_update_bt_cnt()
2034 val = rtw89_read32(rtwdev, R_AX_BT_STAST_LOW); in rtw8852a_btc_update_bt_cnt()
2039 rtw89_write32_set(rtwdev, R_AX_BTC_CFG, B_AX_DIS_BTC_CLK_G); in rtw8852a_btc_update_bt_cnt()
2040 rtw89_write32_clr(rtwdev, R_AX_CSR_MODE, B_AX_BT_CNT_RST); in rtw8852a_btc_update_bt_cnt()
2041 rtw89_write32_set(rtwdev, R_AX_CSR_MODE, B_AX_BT_CNT_RST); in rtw8852a_btc_update_bt_cnt()
2042 rtw89_write32_clr(rtwdev, R_AX_BTC_CFG, B_AX_DIS_BTC_CLK_G); in rtw8852a_btc_update_bt_cnt()
2046 void rtw8852a_btc_wl_s1_standby(struct rtw89_dev *rtwdev, bool state) in rtw8852a_btc_wl_s1_standby() argument
2048 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWE, RFREG_MASK, 0x80000); in rtw8852a_btc_wl_s1_standby()
2049 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWA, RFREG_MASK, 0x1); in rtw8852a_btc_wl_s1_standby()
2050 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD1, RFREG_MASK, 0x1); in rtw8852a_btc_wl_s1_standby()
2054 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, in rtw8852a_btc_wl_s1_standby()
2057 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, in rtw8852a_btc_wl_s1_standby()
2060 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWE, RFREG_MASK, 0x0); in rtw8852a_btc_wl_s1_standby()
2063 static void rtw8852a_set_wl_lna2(struct rtw89_dev *rtwdev, u8 level) in rtw8852a_set_wl_lna2() argument
2072 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWE, RFREG_MASK, 0x1000); in rtw8852a_set_wl_lna2()
2073 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWA, RFREG_MASK, 0x3); in rtw8852a_set_wl_lna2()
2074 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, RFREG_MASK, 0x17); in rtw8852a_set_wl_lna2()
2075 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWA, RFREG_MASK, 0x2); in rtw8852a_set_wl_lna2()
2076 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, RFREG_MASK, 0x15); in rtw8852a_set_wl_lna2()
2077 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWE, RFREG_MASK, 0x0); in rtw8852a_set_wl_lna2()
2080 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWE, RFREG_MASK, 0x1000); in rtw8852a_set_wl_lna2()
2081 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWA, RFREG_MASK, 0x3); in rtw8852a_set_wl_lna2()
2082 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, RFREG_MASK, 0x5); in rtw8852a_set_wl_lna2()
2083 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWA, RFREG_MASK, 0x2); in rtw8852a_set_wl_lna2()
2084 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, RFREG_MASK, 0x15); in rtw8852a_set_wl_lna2()
2085 rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWE, RFREG_MASK, 0x0); in rtw8852a_set_wl_lna2()
2090 static void rtw8852a_btc_set_wl_rx_gain(struct rtw89_dev *rtwdev, u32 level) in rtw8852a_btc_set_wl_rx_gain() argument
2094 rtw8852a_bb_ctrl_btc_preagc(rtwdev, false); in rtw8852a_btc_set_wl_rx_gain()
2095 rtw8852a_set_wl_lna2(rtwdev, 0); in rtw8852a_btc_set_wl_rx_gain()
2098 rtw8852a_bb_ctrl_btc_preagc(rtwdev, true); in rtw8852a_btc_set_wl_rx_gain()
2099 rtw8852a_set_wl_lna2(rtwdev, 0); in rtw8852a_btc_set_wl_rx_gain()
2102 rtw8852a_bb_ctrl_btc_preagc(rtwdev, false); in rtw8852a_btc_set_wl_rx_gain()
2103 rtw8852a_set_wl_lna2(rtwdev, 1); in rtw8852a_btc_set_wl_rx_gain()
2108 static void rtw8852a_fill_freq_with_ppdu(struct rtw89_dev *rtwdev, in rtw8852a_fill_freq_with_ppdu() argument
2123 static void rtw8852a_query_ppdu(struct rtw89_dev *rtwdev, in rtw8852a_query_ppdu() argument
2131 for (path = 0; path < rtwdev->chip->rf_path_num; path++) { in rtw8852a_query_ppdu()
2136 rtw8852a_fill_freq_with_ppdu(rtwdev, phy_ppdu, status); in rtw8852a_query_ppdu()