Lines Matching +full:16 +full:bit

9 #define B_AX_AUTOLOAD_SUS BIT(5)
13 #define B_AX_PWC_EV2EF_B15 BIT(15)
14 #define B_AX_PWC_EV2EF_B14 BIT(14)
15 #define B_AX_ISO_EB2CORE BIT(8)
18 #define B_AX_FEN_BB_GLB_RSTN BIT(1)
19 #define B_AX_FEN_BBRSTB BIT(0)
22 #define B_AX_XTAL_OFF_A_DIE BIT(22)
23 #define B_AX_DIS_WLBT_PDNSUSEN_SOPC BIT(18)
24 #define B_AX_RDY_SYSPWR BIT(17)
25 #define B_AX_EN_WLON BIT(16)
26 #define B_AX_APDM_HPDN BIT(15)
27 #define B_AX_PSUS_OFF_CAPC_EN BIT(14)
28 #define B_AX_AFSM_PCIE_SUS_EN BIT(12)
29 #define B_AX_AFSM_WLSUS_EN BIT(11)
30 #define B_AX_APFM_SWLPS BIT(10)
31 #define B_AX_APFM_OFFMAC BIT(9)
32 #define B_AX_APFN_ONMAC BIT(8)
35 #define B_AX_CPU_CLK_EN BIT(14)
38 #define B_AX_SYM_PADPDN_WL_PTA_1P3 BIT(6)
39 #define B_AX_SYM_PADPDN_WL_RFC_1P3 BIT(5)
42 #define B_AX_R_DIS_PRST BIT(6)
43 #define B_AX_WLOCK_1C_BIT6 BIT(5)
47 #define B_AX_EF_RDT BIT(27)
50 #define B_AX_EF_PD_DIS BIT(11)
51 #define B_AX_EF_POR BIT(10)
56 #define B_AX_EF_RDY BIT(29)
57 #define B_AX_EF_COMP_RESULT BIT(28)
58 #define B_AX_EF_ADDR_MASK GENMASK(26, 16)
62 #define B_AX_EF_ENT BIT(31)
63 #define B_AX_EF_BURST BIT(19)
64 #define B_AX_EF_TEST_SEL_MASK GENMASK(18, 16)
65 #define B_AX_EF_TROW_EN BIT(15)
66 #define B_AX_EF_ERR_FLAG BIT(14)
67 #define B_AX_EF_DSB_EN BIT(11)
68 #define B_AX_PCIE_CALIB_EN_V1 BIT(12)
69 #define B_AX_WDT_WAKE_PCIE_EN BIT(10)
70 #define B_AX_WDT_WAKE_USB_EN BIT(9)
73 #define B_AX_BOOT_MODE BIT(19)
74 #define B_AX_WL_EECS_EXT_32K_SEL BIT(18)
75 #define B_AX_WL_SEC_BONDING_OPT_STS BIT(17)
76 #define B_AX_SECSIC_SEL BIT(16)
77 #define B_AX_ENHTP BIT(14)
78 #define B_AX_BT_AOD_GPIO3 BIT(13)
79 #define B_AX_ENSIC BIT(12)
80 #define B_AX_SIC_SWRST BIT(11)
81 #define B_AX_PO_WIFI_PTA_PINS BIT(10)
82 #define B_AX_PO_BT_PTA_PINS BIT(9)
83 #define B_AX_ENUARTTX BIT(8)
89 #define B_AX_ENBT BIT(5)
90 #define B_AX_EROM_EN BIT(4)
91 #define B_AX_ENUARTRX BIT(2)
96 #define B_AX_DBG_SEL1_16BIT BIT(27)
97 #define B_AX_DBG_SEL1 GENMASK(23, 16)
99 #define B_AX_DBG_SEL0_16BIT BIT(11)
103 #define B_AX_PCIE_DIS_L2_CTRL_LDO_HCI BIT(15)
104 #define B_AX_PCIE_DIS_WLSUS_AFT_PDN BIT(14)
105 #define B_AX_PCIE_FORCE_PWR_NGAT BIT(13)
106 #define B_AX_PCIE_CALIB_EN_V1 BIT(12)
107 #define B_AX_PCIE_AUXCLK_GATE BIT(11)
108 #define B_AX_LTE_MUX_CTRL_PATH BIT(26)
111 #define BIT_WAKE_CTRL BIT(5)
114 #define B_AX_IBX_EN_VALUE BIT(15)
115 #define B_AX_IB_EN_VALUE BIT(14)
116 #define B_AX_FORCED_IB_EN BIT(4)
117 #define B_AX_EN_REGBG BIT(3)
118 #define B_AX_R_AX_BG_LPF BIT(2)
122 #define B_AX_AXIDMA_EN BIT(3)
123 #define B_AX_WCPU_EN BIT(1)
124 #define B_AX_PLATFORM_EN BIT(0)
127 #define B_AX_DIS_WLBT_LPSEN_LOPC BIT(1)
130 #define B_AX_TOGGLE BIT(31)
133 #define B_MAC_AX_BTGS1_NOTIFY BIT(0)
141 #define B_AX_SYSON_DIS_PMCR_AX_WRMSK BIT(2)
144 #define B_AX_PCIE_MIO_ADDR_PAGE_V1_MASK GENMASK(20, 16)
145 #define B_AX_PCIE_MIO_BYIOREG BIT(13)
146 #define B_AX_PCIE_MIO_RE BIT(12)
159 #define B_AX_SEL_0XC0_MASK GENMASK(17, 16)
169 #define B_AX_HALT_H2C_TRIGGER BIT(0)
175 #define B_AX_FWDL_PATH_RDY BIT(2)
176 #define B_AX_H2C_PATH_RDY BIT(1)
177 #define B_AX_WCPU_FWDL_EN BIT(0)
181 #define PS_RPWM_TOGGLE BIT(15)
182 #define PS_RPWM_ACK BIT(14)
184 #define PS_RPWM_NOTIFY_WAKE BIT(8)
196 #define B_AX_EN_32K BIT(31)
210 #define B_AX_PD_REGU_L BIT(16)
213 #define B_AX_WL_XTAL_SI_CMD_POLL BIT(31)
214 #define B_AX_BT_XTAL_SI_ERR_FLAG BIT(30)
215 #define B_AX_WL_XTAL_GNT BIT(29)
216 #define B_AX_BT_XTAL_GNT BIT(28)
220 #define B_AX_WL_XTAL_SI_BITMASK_MASK GENMASK(23, 16)
225 #define B_AX_XTAL_SC_LPS BIT(31)
227 #define B_AX_XTAL_SC_XI_MASK GENMASK(16, 10)
233 #define B_AX_LED1_PULL_LOW_EN BIT(18)
234 #define B_AX_EESK_PULL_LOW_EN BIT(17)
235 #define B_AX_EECS_PULL_LOW_EN BIT(16)
238 #define B_AX_AFC_AFEDIG BIT(17)
239 #define B_AX_WLRF1_CTRL_7 BIT(15)
240 #define B_AX_WLRF1_CTRL_1 BIT(9)
241 #define B_AX_WLRF_CTRL_7 BIT(7)
242 #define B_AX_WLRF_CTRL_1 BIT(1)
245 #define B_AX_WHOLE_SYS_PWR_STE_MASK GENMASK(25, 16)
254 #define B_AX_S1_LDO2PWRCUT_F BIT(23)
267 #define B_AX_STOP_AXI_MST BIT(17)
268 #define B_AX_HAXI_RST_KEEP_REG BIT(16)
269 #define B_AX_RXHCI_EN_V1 BIT(15)
270 #define B_AX_RXBD_MODE_V1 BIT(14)
272 #define B_AX_TXHCI_EN_V1 BIT(7)
273 #define B_AX_FLUSH_AXI_MST BIT(4)
274 #define B_AX_RST_BDRAM BIT(3)
278 #define B_AX_STOP_WPDMA BIT(19)
279 #define B_AX_STOP_CH12 BIT(18)
280 #define B_AX_STOP_CH9 BIT(17)
281 #define B_AX_STOP_CH8 BIT(16)
282 #define B_AX_STOP_ACH7 BIT(15)
283 #define B_AX_STOP_ACH6 BIT(14)
284 #define B_AX_STOP_ACH5 BIT(13)
285 #define B_AX_STOP_ACH4 BIT(12)
286 #define B_AX_STOP_ACH3 BIT(11)
287 #define B_AX_STOP_ACH2 BIT(10)
288 #define B_AX_STOP_ACH1 BIT(9)
289 #define B_AX_STOP_ACH0 BIT(8)
292 #define B_AX_HAXIIO_BUSY BIT(20)
293 #define B_AX_WPDMA_BUSY BIT(19)
294 #define B_AX_CH12_BUSY BIT(18)
295 #define B_AX_CH9_BUSY BIT(17)
296 #define B_AX_CH8_BUSY BIT(16)
297 #define B_AX_ACH7_BUSY BIT(15)
298 #define B_AX_ACH6_BUSY BIT(14)
299 #define B_AX_ACH5_BUSY BIT(13)
300 #define B_AX_ACH4_BUSY BIT(12)
301 #define B_AX_ACH3_BUSY BIT(11)
302 #define B_AX_ACH2_BUSY BIT(10)
303 #define B_AX_ACH1_BUSY BIT(9)
304 #define B_AX_ACH0_BUSY BIT(8)
307 #define B_AX_DBG_DUMMY_MASK GENMASK(23, 16)
309 #define B_AX_PCIE_DBG_SEL BIT(12)
310 #define B_AX_MRD_TIMEOUT_EN BIT(10)
311 #define B_AX_ASFF_FULL_NO_STK BIT(1)
312 #define B_AX_EN_STUCK_DBG BIT(0)
315 #define B_AX_STOP_CH11 BIT(1)
316 #define B_AX_STOP_CH10 BIT(0)
319 #define B_AX_CH11_BUSY BIT(1)
320 #define B_AX_CH10_BUSY BIT(0)
323 #define B_AX_RPQ_BUSY BIT(1)
324 #define B_AX_RXQ_BUSY BIT(0)
327 #define B_AX_LTR_IDX_DRV_VLD BIT(16)
329 #define B_AX_LTR_IDX_FW_VLD BIT(13)
331 #define B_AX_LTR_IDX_HW_VLD BIT(10)
333 #define B_AX_LTR_REQ_DRV BIT(7)
336 #define B_AX_LTR_DRV_DEC_EN BIT(4)
337 #define B_AX_LTR_FW_DEC_EN BIT(3)
338 #define B_AX_LTR_HW_DEC_EN BIT(2)
404 #define B_AX_WDT_PTFM_INT_EN BIT(5)
405 #define B_AX_CPWM_INT_EN BIT(2)
406 #define B_AX_GT3_INT_EN BIT(1)
407 #define B_AX_C2H_INT_EN BIT(0)
409 #define B_AX_C2H_INT BIT(0)
420 #define B_AX_H2CREG_TRIGGER BIT(0)
422 #define B_AX_C2HREG_TRIGGER BIT(0)
426 #define B_AX_HCI_RXDMA_EN BIT(1)
427 #define B_AX_HCI_TXDMA_EN BIT(0)
432 #define B_AX_DMAC_CRPRT BIT(31)
433 #define B_AX_MAC_FUNC_EN BIT(30)
434 #define B_AX_DMAC_FUNC_EN BIT(29)
435 #define B_AX_MPDU_PROC_EN BIT(28)
436 #define B_AX_WD_RLS_EN BIT(27)
437 #define B_AX_DLE_WDE_EN BIT(26)
438 #define B_AX_TXPKT_CTRL_EN BIT(25)
439 #define B_AX_STA_SCH_EN BIT(24)
440 #define B_AX_DLE_PLE_EN BIT(23)
441 #define B_AX_PKT_BUF_EN BIT(22)
442 #define B_AX_DMAC_TBL_EN BIT(21)
443 #define B_AX_PKT_IN_EN BIT(20)
444 #define B_AX_DLE_CPUIO_EN BIT(19)
445 #define B_AX_DISPATCHER_EN BIT(18)
446 #define B_AX_BBRPT_EN BIT(17)
447 #define B_AX_MAC_SEC_EN BIT(16)
448 #define B_AX_MAC_UN_EN BIT(15)
449 #define B_AX_H_AXIDMA_EN BIT(14)
452 #define B_AX_WD_RLS_CLK_EN BIT(27)
453 #define B_AX_DLE_WDE_CLK_EN BIT(26)
454 #define B_AX_TXPKT_CTRL_CLK_EN BIT(25)
455 #define B_AX_STA_SCH_CLK_EN BIT(24)
456 #define B_AX_DLE_PLE_CLK_EN BIT(23)
457 #define B_AX_PKT_IN_CLK_EN BIT(20)
458 #define B_AX_DLE_CPUIO_CLK_EN BIT(19)
459 #define B_AX_DISPATCHER_CLK_EN BIT(18)
460 #define B_AX_BBRPT_CLK_EN BIT(17)
461 #define B_AX_MAC_SEC_CLK_EN BIT(16)
486 #define B_AX_LTR_WD_NOEMP_CHK BIT(6)
487 #define B_AX_APP_LTR_ACT BIT(5)
488 #define B_AX_APP_LTR_IDLE BIT(4)
489 #define B_AX_LTR_EN BIT(1)
490 #define B_AX_LTR_WD_NOEMP_CHK_V1 BIT(1)
491 #define B_AX_LTR_HW_EN BIT(0)
494 #define B_AX_LTR_RX1_TH_MASK GENMASK(27, 16)
505 #define B_AX_PLE_EMPTY_QTA_DMAC_CPUIO BIT(26)
506 #define B_AX_PLE_EMPTY_QTA_DMAC_MPDU_TX BIT(25)
507 #define B_AX_PLE_EMPTY_QTA_DMAC_WLAN_CPU BIT(24)
508 #define B_AX_PLE_EMPTY_QTA_DMAC_H2C BIT(23)
509 #define B_AX_PLE_EMPTY_QTA_DMAC_B1_TXPL BIT(22)
510 #define B_AX_PLE_EMPTY_QTA_DMAC_B0_TXPL BIT(21)
511 #define B_AX_WDE_EMPTY_QTA_DMAC_CPUIO BIT(20)
512 #define B_AX_WDE_EMPTY_QTA_DMAC_PKTIN BIT(19)
513 #define B_AX_WDE_EMPTY_QTA_DMAC_DATA_CPU BIT(18)
514 #define B_AX_WDE_EMPTY_QTA_DMAC_WLAN_CPU BIT(17)
515 #define B_AX_WDE_EMPTY_QTA_DMAC_HIF BIT(16)
516 #define B_AX_WDE_EMPTY_QUE_DMAC_PKTIN BIT(10)
517 #define B_AX_PLE_EMPTY_QUE_DMAC_SEC_TX BIT(9)
518 #define B_AX_PLE_EMPTY_QUE_DMAC_MPDU_TX BIT(8)
519 #define B_AX_WDE_EMPTY_QUE_OTHERS BIT(7)
520 #define B_AX_WDE_EMPTY_QUE_CMAC0_WMM1 BIT(4)
521 #define B_AX_WDE_EMPTY_QUE_CMAC0_WMM0 BIT(3)
522 #define B_AX_WDE_EMPTY_QUE_CMAC1_MBH BIT(2)
523 #define B_AX_WDE_EMPTY_QUE_CMAC0_MBH BIT(1)
524 #define B_AX_WDE_EMPTY_QUE_CMAC0_ALL_AC BIT(0)
527 #define B_AX_DLE_CPUIO_ERR_INT_EN BIT(10)
528 #define B_AX_APB_BRIDGE_ERR_INT_EN BIT(9)
529 #define B_AX_DISPATCH_ERR_INT_EN BIT(8)
530 #define B_AX_PKTIN_ERR_INT_EN BIT(7)
531 #define B_AX_PLE_DLE_ERR_INT_EN BIT(6)
532 #define B_AX_TXPKTCTRL_ERR_INT_EN BIT(5)
533 #define B_AX_WDE_DLE_ERR_INT_EN BIT(4)
534 #define B_AX_STA_SCHEDULER_ERR_INT_EN BIT(3)
535 #define B_AX_MPDU_ERR_INT_EN BIT(2)
536 #define B_AX_WSEC_ERR_INT_EN BIT(1)
537 #define B_AX_WDRLS_ERR_INT_EN BIT(0)
542 #define B_AX_DLE_CPUIO_ERR_FLAG BIT(10)
543 #define B_AX_APB_BRIDGE_ERR_FLAG BIT(9)
544 #define B_AX_DISPATCH_ERR_FLAG BIT(8)
545 #define B_AX_PKTIN_ERR_FLAG BIT(7)
546 #define B_AX_PLE_DLE_ERR_FLAG BIT(6)
547 #define B_AX_TXPKTCTRL_ERR_FLAG BIT(5)
548 #define B_AX_WDE_DLE_ERR_FLAG BIT(4)
549 #define B_AX_STA_SCHEDULER_ERR_FLAG BIT(3)
550 #define B_AX_MPDU_ERR_FLAG BIT(2)
551 #define B_AX_WSEC_ERR_FLAG BIT(1)
552 #define B_AX_WDRLS_ERR_FLAG BIT(0)
555 #define B_AX_PL_PAGE_128B_SEL BIT(9)
556 #define B_AX_WD_PAGE_64B_SEL BIT(8)
561 #define B_AX_HOST_ADDR_INFO_8B_SEL BIT(0)
564 #define B_AX_HDT_RX_WRITE_UNDERFLOW_INT_EN BIT(31)
565 #define B_AX_HDT_RX_WRITE_OVERFLOW_INT_EN BIT(30)
566 #define B_AX_HDT_CHKSUM_FSM_ERR_INT_EN BIT(29)
567 #define B_AX_HDT_SHIFT_DMA_CFG_ERR_INT_EN BIT(28)
568 #define B_AX_HDT_DMA_PROCESS_ERR_INT_EN BIT(27)
569 #define B_AX_HDT_TOTAL_LEN_ERR_INT_EN BIT(26)
570 #define B_AX_HDT_SHIFT_EN_ERR_INT_EN BIT(25)
571 #define B_AX_HDT_RXAGG_CFG_ERR_INT_EN BIT(24)
572 #define B_AX_HDT_OUTPUT_ERR_INT_EN BIT(21)
573 #define B_AX_HDT_RES_ERR_INT_EN BIT(20)
574 #define B_AX_HDT_BURST_NUM_ERR_INT_EN BIT(19)
575 #define B_AX_HDT_NULLPKT_ERR_INT_EN BIT(18)
576 #define B_AX_HDT_FLOW_CTRL_ERR_INT_EN BIT(17)
577 #define B_AX_HDT_PLD_CMD_UNDERFLOW_INT_EN BIT(16)
578 #define B_AX_HDT_PLD_CMD_OVERLOW_INT_EN BIT(15)
579 #define B_AX_HDT_TX_WRITE_UNDERFLOW_INT_EN BIT(14)
580 #define B_AX_HDT_TX_WRITE_OVERFLOW_INT_EN BIT(13)
581 #define B_AX_HDT_TCP_CHK_ERR_INT_EN BIT(12)
582 #define B_AX_HDT_TXPKTSIZE_ERR_INT_EN BIT(11)
583 #define B_AX_HDT_PRE_COST_ERR_INT_EN BIT(10)
584 #define B_AX_HDT_WD_CHK_ERR_INT_EN BIT(9)
585 #define B_AX_HDT_CHANNEL_DMA_ERR_INT_EN BIT(8)
586 #define B_AX_HDT_OFFSET_UNMATCH_INT_EN BIT(7)
587 #define B_AX_HDT_PAYLOAD_UNDERFLOW_INT_EN BIT(6)
588 #define B_AX_HDT_PAYLOAD_OVERFLOW_INT_EN BIT(5)
589 #define B_AX_HDT_PERMU_UNDERFLOW_INT_EN BIT(4)
590 #define B_AX_HDT_PERMU_OVERFLOW_INT_EN BIT(3)
591 #define B_AX_HDT_PKT_FAIL_DBG_INT_EN BIT(2)
592 #define B_AX_HDT_CHANNEL_ID_ERR_INT_EN BIT(1)
593 #define B_AX_HDT_CHANNEL_DIFF_ERR_INT_EN BIT(0)
629 #define B_AX_HR_WRFF_UNDERFLOW_ERR_INT_EN BIT(31)
630 #define B_AX_HR_WRFF_OVERFLOW_ERR_INT_EN BIT(30)
631 #define B_AX_HR_CHKSUM_FSM_ERR_INT_EN BIT(29)
632 #define B_AX_HR_SHIFT_DMA_CFG_ERR_INT_EN BIT(28)
633 #define B_AX_HR_DMA_PROCESS_ERR_INT_EN BIT(27)
634 #define B_AX_HR_TOTAL_LEN_UNDER_ERR_INT_EN BIT(26)
635 #define B_AX_HR_SHIFT_EN_ERR_INT_EN BIT(25)
636 #define B_AX_HR_AGG_CFG_ERR_INT_EN BIT(24)
637 #define B_AX_HR_DMA_RD_CNT_DEQ_ERR_INT_EN BIT(23)
638 #define B_AX_HR_PLD_LEN_ZERO_ERR_INT_EN BIT(22)
639 #define B_AX_HT_ILL_CH_ERR_INT_EN BIT(20)
640 #define B_AX_HT_ADDR_INFO_LEN_ERR_INT_EN BIT(18)
641 #define B_AX_HT_WD_LEN_OVER_ERR_INT_EN BIT(17)
642 #define B_AX_HT_PLD_CMD_UNDERFLOW_ERR_INT_EN BIT(16)
643 #define B_AX_HT_PLD_CMD_OVERFLOW_ERR_INT_EN BIT(15)
644 #define B_AX_HT_WRFF_UNDERFLOW_ERR_INT_EN BIT(14)
645 #define B_AX_HT_WRFF_OVERFLOW_ERR_INT_EN BIT(13)
646 #define B_AX_HT_CHKSUM_FSM_ERR_INT_EN BIT(12)
647 #define B_AX_HT_TXPKTSIZE_ERR_INT_EN BIT(11)
648 #define B_AX_HT_PRE_SUB_ERR_INT_EN BIT(10)
649 #define B_AX_HT_WD_CHKSUM_ERR_INT_EN BIT(9)
650 #define B_AX_HT_CHANNEL_DMA_ERR_INT_EN BIT(8)
651 #define B_AX_HT_OFFSET_UNMATCH_ERR_INT_EN BIT(7)
652 #define B_AX_HT_PAYLOAD_UNDER_ERR_INT_EN BIT(6)
653 #define B_AX_HT_PAYLOAD_OVER_ERR_INT_EN BIT(5)
654 #define B_AX_HT_PERMU_FF_UNDERFLOW_ERR_INT_EN BIT(4)
655 #define B_AX_HT_PERMU_FF_OVERFLOW_ERR_INT_EN BIT(3)
656 #define B_AX_HT_PKT_FAIL_ERR_INT_EN BIT(2)
657 #define B_AX_HT_CH_ID_ERR_INT_EN BIT(1)
658 #define B_AX_HT_EP_CH_DIFF_ERR_INT_EN BIT(0)
696 #define B_AX_CPU_RX_WRITE_UNDERFLOW_INT_EN BIT(31)
697 #define B_AX_CPU_RX_WRITE_OVERFLOW_INT_EN BIT(30)
698 #define B_AX_CPU_CHKSUM_FSM_ERR_INT_EN BIT(29)
699 #define B_AX_CPU_SHIFT_DMA_CFG_ERR_INT_EN BIT(28)
700 #define B_AX_CPU_DMA_PROCESS_ERR_INT_EN BIT(27)
701 #define B_AX_CPU_TOTAL_LEN_ERR_INT_EN BIT(26)
702 #define B_AX_CPU_SHIFT_EN_ERR_INT_EN BIT(25)
703 #define B_AX_CPU_RXAGG_CFG_ERR_INT_EN BIT(24)
704 #define B_AX_CPU_OUTPUT_ERR_INT_EN BIT(20)
705 #define B_AX_CPU_RESP_ERR_INT_EN BIT(19)
706 #define B_AX_CPU_BURST_NUM_ERR_INT_EN BIT(18)
707 #define B_AX_CPU_NULLPKT_ERR_INT_EN BIT(17)
708 #define B_AX_CPU_FLOW_CTRL_ERR_INT_EN BIT(16)
709 #define B_AX_CPU_F2P_SEQ_ERR_INT_EN BIT(15)
710 #define B_AX_CPU_F2P_QSEL_ERR_INT_EN BIT(14)
711 #define B_AX_CPU_PLD_CMD_UNDERFLOW_INT_EN BIT(13)
712 #define B_AX_CPU_PLD_CMD_OVERLOW_INT_EN BIT(12)
713 #define B_AX_CPU_PRE_COST_ERR_INT_EN BIT(11)
714 #define B_AX_CPU_WD_CHK_ERR_INT_EN BIT(10)
715 #define B_AX_CPU_CHANNEL_DMA_ERR_INT_EN BIT(9)
716 #define B_AX_CPU_OFFSET_UNMATCH_INT_EN BIT(8)
717 #define B_AX_CPU_PAYLOAD_CHKSUM_ERR_INT_EN BIT(7)
718 #define B_AX_CPU_PAYLOAD_UNDERFLOW_INT_EN BIT(6)
719 #define B_AX_CPU_PAYLOAD_OVERFLOW_INT_EN BIT(5)
720 #define B_AX_CPU_PERMU_UNDERFLOW_INT_EN BIT(4)
721 #define B_AX_CPU_PERMU_OVERFLOW_INT_EN BIT(3)
722 #define B_AX_CPU_CHANNEL_ID_ERR_INT_EN BIT(2)
723 #define B_AX_CPU_PKT_FAIL_DBG_INT_EN BIT(1)
724 #define B_AX_CPU_CHANNEL_DIFF_ERR_INT_EN BIT(0)
757 #define B_AX_CR_PLD_LEN_ERR_INT_EN BIT(30)
758 #define B_AX_CR_WRFF_UNDERFLOW_ERR_INT_EN BIT(29)
759 #define B_AX_CR_WRFF_OVERFLOW_ERR_INT_EN BIT(28)
760 #define B_AX_CR_SHIFT_DMA_CFG_ERR_INT_EN BIT(27)
761 #define B_AX_CR_DMA_PROCESS_ERR_INT_EN BIT(26)
762 #define B_AX_CR_TOTAL_LEN_UNDER_ERR_INT_EN BIT(25)
763 #define B_AX_CR_SHIFT_EN_ERR_INT_EN BIT(24)
764 #define B_AX_REUSE_FIFO_B_UNDER_ERR_INT_EN BIT(22)
765 #define B_AX_REUSE_FIFO_B_OVER_ERR_INT_EN BIT(21)
766 #define B_AX_REUSE_FIFO_A_UNDER_ERR_INT_EN BIT(20)
767 #define B_AX_REUSE_FIFO_A_OVER_ERR_INT_EN BIT(19)
768 #define B_AX_CT_ADDR_INFO_LEN_MISS_ERR_INT_EN BIT(17)
769 #define B_AX_CT_WD_LEN_OVER_ERR_INT_EN BIT(16)
770 #define B_AX_CT_F2P_SEQ_ERR_INT_EN BIT(15)
771 #define B_AX_CT_F2P_QSEL_ERR_INT_EN BIT(14)
772 #define B_AX_CT_PLD_CMD_UNDERFLOW_ERR_INT_EN BIT(13)
773 #define B_AX_CT_PLD_CMD_OVERFLOW_ERR_INT_EN BIT(12)
774 #define B_AX_CT_PRE_SUB_ERR_INT_EN BIT(11)
775 #define B_AX_CT_WD_CHKSUM_ERR_INT_EN BIT(10)
776 #define B_AX_CT_CHANNEL_DMA_ERR_INT_EN BIT(9)
777 #define B_AX_CT_OFFSET_UNMATCH_ERR_INT_EN BIT(8)
778 #define B_AX_CT_PAYLOAD_CHKSUM_ERR_INT_EN BIT(7)
779 #define B_AX_CT_PAYLOAD_UNDER_ERR_INT_EN BIT(6)
780 #define B_AX_CT_PAYLOAD_OVER_ERR_INT_EN BIT(5)
781 #define B_AX_CT_PERMU_FF_UNDERFLOW_ERR_INT_EN BIT(4)
782 #define B_AX_CT_PERMU_FF_OVERFLOW_ERR_INT_EN BIT(3)
783 #define B_AX_CT_CH_ID_ERR_INT_EN BIT(2)
784 #define B_AX_CT_EP_CH_DIFF_ERR_INT_EN BIT(0)
821 #define B_AX_OTHER_STF_WROQT_UNDERFLOW_INT_EN BIT(29)
822 #define B_AX_OTHER_STF_WROQT_OVERFLOW_INT_EN BIT(28)
823 #define B_AX_OTHER_STF_WRFF_UNDERFLOW_INT_EN BIT(27)
824 #define B_AX_OTHER_STF_WRFF_OVERFLOW_INT_EN BIT(26)
825 #define B_AX_OTHER_STF_CMD_UNDERFLOW_INT_EN BIT(25)
826 #define B_AX_OTHER_STF_CMD_OVERFLOW_INT_EN BIT(24)
827 #define B_AX_HOST_ADDR_INFO_LEN_ZERO_ERR_INT_EN BIT(17)
828 #define B_AX_CPU_ADDR_INFO_LEN_ZERO_ERR_INT_EN BIT(16)
829 #define B_AX_PLE_OUTPUT_ERR_INT_EN BIT(12)
830 #define B_AX_PLE_RESP_ERR_INT_EN BIT(11)
831 #define B_AX_PLE_BURST_NUM_ERR_INT_EN BIT(10)
832 #define B_AX_PLE_NULL_PKT_ERR_INT_EN BIT(9)
833 #define B_AX_PLE_FLOW_CTRL_ERR_INT_EN BIT(8)
834 #define B_AX_WDE_OUTPUT_ERR_INT_EN BIT(4)
835 #define B_AX_WDE_RESP_ERR_INT_EN BIT(3)
836 #define B_AX_WDE_BURST_NUM_ERR_INT_EN BIT(2)
837 #define B_AX_WDE_NULL_PKT_ERR_INT_EN BIT(1)
838 #define B_AX_WDE_FLOW_CTRL_ERR_INT_EN BIT(0)
858 #define B_AX_REUSE_SIZE_ERR_INT_EN BIT(31)
859 #define B_AX_REUSE_EN_ERR_INT_EN BIT(30)
860 #define B_AX_STF_OQT_UNDERFLOW_ERR_INT_EN BIT(29)
861 #define B_AX_STF_OQT_OVERFLOW_ERR_INT_EN BIT(28)
862 #define B_AX_STF_WRFF_UNDERFLOW_ERR_INT_EN BIT(27)
863 #define B_AX_STF_WRFF_OVERFLOW_ERR_INT_EN BIT(26)
864 #define B_AX_STF_CMD_UNDERFLOW_ERR_INT_EN BIT(25)
865 #define B_AX_STF_CMD_OVERFLOW_ERR_INT_EN BIT(24)
866 #define B_AX_REUSE_SIZE_ZERO_ERR_INT_EN BIT(23)
867 #define B_AX_REUSE_PKT_CNT_ERR_INT_EN BIT(22)
868 #define B_AX_CDT_PTR_TIMEOUT_ERR_INT_EN BIT(21)
869 #define B_AX_CDT_HCI_TIMEOUT_ERR_INT_EN BIT(20)
870 #define B_AX_HDT_PTR_TIMEOUT_ERR_INT_EN BIT(19)
871 #define B_AX_HDT_HCI_TIMEOUT_ERR_INT_EN BIT(18)
872 #define B_AX_CDT_ADDR_INFO_LEN_ERR_INT_EN BIT(17)
873 #define B_AX_HDT_ADDR_INFO_LEN_ERR_INT_EN BIT(16)
874 #define B_AX_CDR_DMA_TIMEOUT_ERR_INT_EN BIT(15)
875 #define B_AX_CDR_RX_TIMEOUT_ERR_INT_EN BIT(14)
876 #define B_AX_PLE_RESPOSE_ERR_INT_EN BIT(11)
877 #define B_AX_HDR_DMA_TIMEOUT_ERR_INT_EN BIT(7)
878 #define B_AX_HDR_RX_TIMEOUT_ERR_INT_EN BIT(6)
879 #define B_AX_WDE_RESPONSE_ERR_INT_EN BIT(3)
925 #define B_AX_HCI_FC_CH12_EN BIT(3)
927 #define B_AX_HCI_FC_EN BIT(0)
930 #define B_AX_PREC_PAGE_CH12_MASK GENMASK(24, 16)
933 #define B_AX_MAX_PG_MASK GENMASK(28, 16)
935 #define B_AX_GRP BIT(31)
949 #define B_AX_AVAL_PG_MASK GENMASK(27, 16)
966 #define B_AX_G1_AVAL_PG_MASK GENMASK(28, 16)
970 #define B_AX_PUBPG_G1_MASK GENMASK(28, 16)
977 #define B_AX_G1_USE_PG_MASK GENMASK(28, 16)
984 #define B_AX_PREC_PAGE_WP_CH811_MASK GENMASK(24, 16)
991 #define B_AX_WP_AVAL_PG_MASK GENMASK(28, 16)
996 #define B_AX_WDE_FREE_PAGE_NUM_MASK GENMASK(28, 16)
1004 #define B_AX_WDE_DATCHN_RRDY_ERR_INT_EN BIT(27)
1005 #define B_AX_WDE_DATCHN_FRZTO_ERR_INT_EN BIT(26)
1006 #define B_AX_WDE_DATCHN_NULLPG_ERR_INT_EN BIT(25)
1007 #define B_AX_WDE_DATCHN_ARBT_ERR_INT_EN BIT(24)
1008 #define B_AX_WDE_QUEMGN_FRZTO_ERR_INT_EN BIT(19)
1009 #define B_AX_WDE_NXTPKTLL_AD_ERR_INT_EN BIT(18)
1010 #define B_AX_WDE_PREPKTLLT_AD_ERR_INT_EN BIT(17)
1011 #define B_AX_WDE_ENQ_PKTCNT_NVAL_ERR_INT_EN BIT(16)
1012 #define B_AX_WDE_ENQ_PKTCNT_OVRF_ERR_INT_EN BIT(15)
1013 #define B_AX_WDE_QUE_SRCQUEID_ERR_INT_EN BIT(14)
1014 #define B_AX_WDE_QUE_DSTQUEID_ERR_INT_EN BIT(13)
1015 #define B_AX_WDE_QUE_CMDTYPE_ERR_INT_EN BIT(12)
1016 #define B_AX_WDE_BUFMGN_FRZTO_ERR_INT_EN BIT(7)
1017 #define B_AX_WDE_GETNPG_PGOFST_ERR_INT_EN BIT(6)
1018 #define B_AX_WDE_GETNPG_STRPG_ERR_INT_EN BIT(5)
1019 #define B_AX_WDE_BUFREQ_SRCHTAILPG_ERR_INT_EN BIT(4)
1020 #define B_AX_WDE_BUFRTN_SIZE_ERR_INT_EN BIT(3)
1021 #define B_AX_WDE_BUFRTN_INVLD_PKTID_ERR_INT_EN BIT(2)
1022 #define B_AX_WDE_BUFREQ_UNAVAL_ERR_INT_EN BIT(1)
1023 #define B_AX_WDE_BUFREQ_QTAID_ERR_INT_EN BIT(0)
1063 #define B_AX_WDE_DATCHN_CAMREQ_ERR_INT_EN BIT(29)
1064 #define B_AX_WDE_DATCHN_ADRERR_ERR_INT_EN BIT(28)
1065 #define B_AX_WDE_DATCHN_RRDY_ERR_INT_EN BIT(27)
1066 #define B_AX_WDE_DATCHN_FRZTO_ERR_INT_EN BIT(26)
1067 #define B_AX_WDE_DATCHN_NULLPG_ERR_INT_EN BIT(25)
1068 #define B_AX_WDE_DATCHN_ARBT_ERR_INT_EN BIT(24)
1069 #define B_AX_WDE_QUEMGN_FRZTO_ERR_INT_EN BIT(19)
1070 #define B_AX_WDE_NXTPKTLL_AD_ERR_INT_EN BIT(18)
1071 #define B_AX_WDE_PREPKTLLT_AD_ERR_INT_EN BIT(17)
1072 #define B_AX_WDE_ENQ_PKTCNT_NVAL_ERR_INT_EN BIT(16)
1073 #define B_AX_WDE_ENQ_PKTCNT_OVRF_ERR_INT_EN BIT(15)
1074 #define B_AX_WDE_QUE_SRCQUEID_ERR_INT_EN BIT(14)
1075 #define B_AX_WDE_BUFMGN_FRZTO_ERR_INT_EN_V1 BIT(9)
1076 #define B_AX_WDE_GETNPG_PGOFST_ERR_INT_EN_V1 BIT(8)
1077 #define B_AX_WDE_GETNPG_STRPG_ERR_INT_EN_V1 BIT(7)
1078 #define B_AX_WDE_BUFREQ_SRCHTAILPG_ERR_INT_EN_V1 BIT(6)
1079 #define B_AX_WDE_BUFRTN_SIZE_ERR_INT_EN_V1 BIT(5)
1080 #define B_AX_WDE_BUFRTN_INVLD_PKTID_ERR_INT_EN_V1 BIT(4)
1081 #define B_AX_WDE_BUFREQ_UNAVAL_ERR_INT_EN_V1 BIT(3)
1082 #define B_AX_WDE_BUFREQ_SIZELMT_INT_EN BIT(2)
1083 #define B_AX_WDE_BUFREQ_SIZE0_INT_EN BIT(1)
1134 #define B_AX_WDE_DATCHN_RRDY_ERR BIT(27)
1135 #define B_AX_WDE_DATCHN_FRZTO_ERR BIT(26)
1136 #define B_AX_WDE_DATCHN_NULLPG_ERR BIT(25)
1137 #define B_AX_WDE_DATCHN_ARBT_ERR BIT(24)
1138 #define B_AX_WDE_QUEMGN_FRZTO_ERR BIT(19)
1139 #define B_AX_WDE_NXTPKTLL_AD_ERR BIT(18)
1140 #define B_AX_WDE_PREPKTLLT_AD_ERR BIT(17)
1141 #define B_AX_WDE_ENQ_PKTCNT_NVAL_ERR BIT(16)
1142 #define B_AX_WDE_ENQ_PKTCNT_OVRF_ERR BIT(15)
1143 #define B_AX_WDE_QUE_SRCQUEID_ERR BIT(14)
1144 #define B_AX_WDE_QUE_DSTQUEID_ERR BIT(13)
1145 #define B_AX_WDE_QUE_CMDTYPE_ERR BIT(12)
1146 #define B_AX_WDE_BUFMGN_FRZTO_ERR BIT(7)
1147 #define B_AX_WDE_GETNPG_PGOFST_ERR BIT(6)
1148 #define B_AX_WDE_GETNPG_STRPG_ERR BIT(5)
1149 #define B_AX_WDE_BUFREQ_SRCHTAILPG_ERR BIT(4)
1150 #define B_AX_WDE_BUFRTN_SIZE_ERR BIT(3)
1151 #define B_AX_WDE_BUFRTN_INVLD_PKTID_ERR BIT(2)
1152 #define B_AX_WDE_BUFREQ_UNAVAL_ERR BIT(1)
1153 #define B_AX_WDE_BUFREQ_QTAID_ERR BIT(0)
1155 #define B_AX_WDE_MAX_SIZE_MASK GENMASK(27, 16)
1165 #define B_AX_DLE_FREE_TAILPG GENMASK(27, 16)
1166 #define B_AX_DLE_USE_PGNUM GENMASK(27, 16)
1171 #define B_AX_WDE_Q_MGN_INI_RDY BIT(1)
1172 #define B_AX_WDE_BUF_MGN_INI_RDY BIT(0)
1175 #define B_AX_WDE_DFI_ACTIVE BIT(31)
1176 #define B_AX_WDE_DFI_TRGSEL_MASK GENMASK(19, 16)
1184 #define B_AX_PLE_FREE_PAGE_NUM_MASK GENMASK(28, 16)
1188 #define B_AX_PLE_DATCHN_RRDY_ERR_INT_EN BIT(27)
1189 #define B_AX_PLE_DATCHN_FRZTO_ERR_INT_EN BIT(26)
1190 #define B_AX_PLE_DATCHN_NULLPG_ERR_INT_EN BIT(25)
1191 #define B_AX_PLE_DATCHN_ARBT_ERR_INT_EN BIT(24)
1192 #define B_AX_PLE_QUEMGN_FRZTO_ERR_INT_EN BIT(19)
1193 #define B_AX_PLE_NXTPKTLL_AD_ERR_INT_EN BIT(18)
1194 #define B_AX_PLE_PREPKTLLT_AD_ERR_INT_EN BIT(17)
1195 #define B_AX_PLE_ENQ_PKTCNT_NVAL_ERR_INT_EN BIT(16)
1196 #define B_AX_PLE_ENQ_PKTCNT_OVRF_ERR_INT_EN BIT(15)
1197 #define B_AX_PLE_QUE_SRCQUEID_ERR_INT_EN BIT(14)
1198 #define B_AX_PLE_QUE_DSTQUEID_ERR_INT_EN BIT(13)
1199 #define B_AX_PLE_QUE_CMDTYPE_ERR_INT_EN BIT(12)
1200 #define B_AX_PLE_BUFMGN_FRZTO_ERR_INT_EN BIT(7)
1201 #define B_AX_PLE_GETNPG_PGOFST_ERR_INT_EN BIT(6)
1202 #define B_AX_PLE_GETNPG_STRPG_ERR_INT_EN BIT(5)
1203 #define B_AX_PLE_BUFREQ_SRCHTAILPG_ERR_INT_EN BIT(4)
1204 #define B_AX_PLE_BUFRTN_SIZE_ERR_INT_EN BIT(3)
1205 #define B_AX_PLE_BUFRTN_INVLD_PKTID_ERR_INT_EN BIT(2)
1206 #define B_AX_PLE_BUFREQ_UNAVAL_ERR_INT_EN BIT(1)
1207 #define B_AX_PLE_BUFREQ_QTAID_ERR_INT_EN BIT(0)
1246 #define B_AX_PLE_DATCHN_CAMREQ_ERR_INT_EN BIT(29)
1247 #define B_AX_PLE_DATCHN_ADRERR_ERR_INT_EN BIT(28)
1248 #define B_AX_PLE_BUFMGN_FRZTO_ERR_INT_EN_V1 BIT(9)
1249 #define B_AX_PLE_GETNPG_PGOFST_ERR_INT_EN_V1 BIT(8)
1250 #define B_AX_PLE_GETNPG_STRPG_ERR_INT_EN_V1 BIT(7)
1251 #define B_AX_PLE_BUFREQ_SRCHTAILPG_ERR_INT_EN_V1 BIT(6)
1252 #define B_AX_PLE_BUFRTN_SIZE_ERR_INT_EN_V1 BIT(5)
1253 #define B_AX_PLE_BUFRTN_INVLD_PKTID_ERR_INT_EN_V1 BIT(4)
1254 #define B_AX_PLE_BUFREQ_UNAVAL_ERR_INT_EN_V1 BIT(3)
1255 #define B_AX_PLE_BUFREQ_SIZELMT_INT_EN BIT(2)
1256 #define B_AX_PLE_BUFREQ_SIZE0_INT_EN BIT(1)
1307 #define B_AX_PLE_MAX_SIZE_MASK GENMASK(27, 16)
1316 #define B_AX_PLE_Q6_MAX_SIZE_MASK GENMASK(27, 16)
1325 #define B_AX_PLE_Q_MGN_INI_RDY BIT(1)
1326 #define B_AX_PLE_BUF_MGN_INI_RDY BIT(0)
1329 #define B_AX_PLE_DFI_ACTIVE BIT(31)
1330 #define B_AX_PLE_DFI_TRGSEL_MASK GENMASK(19, 16)
1341 #define B_AX_RLSRPT0_PKTTYPE_MASK GENMASK(19, 16)
1346 #define B_AX_RLSRPT0_TO_MASK GENMASK(23, 16)
1350 #define B_AX_WDRLS_RPT1_FRZTO_ERR_INT_EN BIT(13)
1351 #define B_AX_WDRLS_RPT1_AGGNUM0_ERR_INT_EN BIT(12)
1352 #define B_AX_WDRLS_RPT0_FRZTO_ERR_INT_EN BIT(9)
1353 #define B_AX_WDRLS_RPT0_AGGNUM0_ERR_INT_EN BIT(8)
1354 #define B_AX_WDRLS_PLEBREQ_PKTID_ISNULL_ERR_INT_EN BIT(5)
1355 #define B_AX_WDRLS_PLEBREQ_TO_ERR_INT_EN BIT(4)
1356 #define B_AX_WDRLS_CTL_FRZTO_ERR_INT_EN BIT(2)
1357 #define B_AX_WDRLS_CTL_PLPKTID_ISNULL_ERR_INT_EN BIT(1)
1358 #define B_AX_WDRLS_CTL_WDPKTID_ISNULL_ERR_INT_EN BIT(0)
1389 #define B_AX_BBRPT_COM_HANG_EN BIT(1)
1390 #define B_AX_BBRPT_COM_NULL_PLPKTID_ERR_INT_EN BIT(0)
1393 #define B_AX_BBRPT_COM_NULL_PLPKTID_ERR BIT(16)
1394 #define B_AX_BBRPT_COM_NULL_PLPKTID_ERR_INT_EN BIT(0)
1397 #define B_AX_BBPRT_CHIF_TO_ERR_INT_EN BIT(7)
1398 #define B_AX_BBPRT_CHIF_NULL_ERR_INT_EN BIT(6)
1399 #define B_AX_BBPRT_CHIF_LEFT2_ERR_INT_EN BIT(5)
1400 #define B_AX_BBPRT_CHIF_LEFT1_ERR_INT_EN BIT(4)
1401 #define B_AX_BBPRT_CHIF_HDRL_ERR_INT_EN BIT(3)
1402 #define B_AX_BBPRT_CHIF_BOVF_ERR_INT_EN BIT(2)
1403 #define B_AX_BBPRT_CHIF_OVF_ERR_INT_EN BIT(1)
1404 #define B_AX_BBPRT_CHIF_BB_TO_ERR_INT_EN BIT(0)
1415 #define B_AX_BBPRT_CHIF_TO_ERR BIT(23)
1416 #define B_AX_BBPRT_CHIF_NULL_ERR BIT(22)
1417 #define B_AX_BBPRT_CHIF_LEFT2_ERR BIT(21)
1418 #define B_AX_BBPRT_CHIF_LEFT1_ERR BIT(20)
1419 #define B_AX_BBPRT_CHIF_HDRL_ERR BIT(19)
1420 #define B_AX_BBPRT_CHIF_BOVF_ERR BIT(18)
1421 #define B_AX_BBPRT_CHIF_OVF_ERR BIT(17)
1422 #define B_AX_BBPRT_CHIF_BB_TO_ERR BIT(16)
1423 #define B_AX_BBPRT_CHIF_TO_ERR_INT_EN BIT(7)
1424 #define B_AX_BBPRT_CHIF_NULL_ERR_INT_EN BIT(6)
1425 #define B_AX_BBPRT_CHIF_LEFT2_ERR_INT_EN BIT(5)
1426 #define B_AX_BBPRT_CHIF_LEFT1_ERR_INT_EN BIT(4)
1427 #define B_AX_BBPRT_CHIF_HDRL_ERR_INT_EN BIT(3)
1428 #define B_AX_BBPRT_CHIF_BOVF_ERR_INT_EN BIT(2)
1429 #define B_AX_BBPRT_CHIF_OVF_ERR_INT_EN BIT(1)
1430 #define B_AX_BBPRT_CHIF_BB_TO_ERR_INT_EN BIT(0)
1441 #define B_AX_BBRPT_DFS_TO_ERR_INT_EN BIT(0)
1444 #define B_AX_BBRPT_DFS_TO_ERR BIT(16)
1445 #define B_AX_BBRPT_DFS_TO_ERR_INT_EN BIT(0)
1448 #define B_AX_LA_ISR_DATA_LOSS_ERR BIT(16)
1449 #define B_AX_LA_IMR_DATA_LOSS_ERR BIT(0)
1453 #define B_AX_WD_BUF_REQ_EXEC BIT(31)
1454 #define B_AX_WD_BUF_REQ_QUOTA_ID_MASK GENMASK(23, 16)
1459 #define B_AX_WD_BUF_STAT_DONE BIT(31)
1464 #define B_AX_WD_CPUQ_OP_EXEC BIT(31)
1466 #define B_AX_CPUQ_OP_MACID_MASK GENMASK(23, 16)
1472 #define B_AX_CPUQ_OP_SRC_QID_MASK GENMASK(21, 16)
1478 #define B_AX_WD_CPUQ_OP_STRT_PKTID_MASK GENMASK(27, 16)
1483 #define B_AX_WD_CPUQ_OP_STAT_DONE BIT(31)
1487 #define B_AX_PLEQUE_OP_ERR_INT_EN BIT(12)
1488 #define B_AX_PLEBUF_OP_ERR_INT_EN BIT(8)
1489 #define B_AX_WDEQUE_OP_ERR_INT_EN BIT(4)
1490 #define B_AX_WDEBUF_OP_ERR_INT_EN BIT(0)
1505 #define B_AX_WD_ADDR_INFO_LENGTH BIT(1)
1508 #define B_AX_PKTIN_GETPKTID_ERR_INT_EN BIT(0)
1514 #define B_AX_TX_KSRCH_ERR_EN BIT(9)
1515 #define B_AX_TX_NW_TYPE_ERR_EN BIT(8)
1516 #define B_AX_TX_LLC_PRE_ERR_EN BIT(7)
1517 #define B_AX_TX_ETH_TYPE_ERR_EN BIT(6)
1518 #define B_AX_TX_HDR3_SIZE_ERR_INT_EN BIT(5)
1519 #define B_AX_TX_OFFSET_ERR_INT_EN BIT(4)
1520 #define B_AX_TX_MPDU_SIZE_ZERO_INT_EN BIT(3)
1521 #define B_AX_TX_NXT_ERRPKTID_INT_EN BIT(2)
1522 #define B_AX_TX_GET_ERRPKTID_INT_EN BIT(1)
1532 #define B_AX_A_ICV_ERR BIT(1)
1533 #define B_AX_APPEND_FCS BIT(0)
1551 #define B_AX_RPT_ERR_INT_EN BIT(3)
1552 #define B_AX_MHDRLEN_ERR_INT_EN BIT(1)
1553 #define B_AX_GETPKTID_ERR_INT_EN BIT(0)
1557 #define B_AX_TX_PARTIAL_MODE BIT(11)
1558 #define B_AX_CLK_EN_CGCMP BIT(10)
1559 #define B_AX_CLK_EN_WAPI BIT(9)
1560 #define B_AX_CLK_EN_WEP_TKIP BIT(8)
1561 #define B_AX_BMC_MGNT_DEC BIT(5)
1562 #define B_AX_UC_MGNT_DEC BIT(4)
1563 #define B_AX_MC_DEC BIT(3)
1564 #define B_AX_BC_DEC BIT(2)
1565 #define B_AX_SEC_RX_DEC BIT(1)
1566 #define B_AX_SEC_TX_ENC BIT(0)
1569 #define B_AX_APPEND_ICV BIT(1)
1570 #define B_AX_APPEND_MIC BIT(0)
1577 #define B_AX_IMR_ERROR BIT(3)
1589 #define B_AX_RX_HANG_IMR BIT(1)
1590 #define B_AX_TX_HANG_IMR BIT(0)
1593 #define B_AX_SS_INIT_DONE_1 BIT(31)
1594 #define B_AX_SS_WARM_INIT_FLG BIT(29)
1595 #define B_AX_SS_NONEMPTY_SS2FINFO_EN BIT(28)
1596 #define B_AX_SS_EN BIT(0)
1599 #define B_AX_SS_UL_REL BIT(31)
1601 #define B_AX_SS_REL_PORT_MASK GENMASK(18, 16)
1623 #define B_AX_PLE_B_PKTID_ERR_INT_EN BIT(2)
1624 #define B_AX_RPT_HANG_TIMEOUT_INT_EN BIT(1)
1625 #define B_AX_SEARCH_HANG_TIMEOUT_INT_EN BIT(0)
1633 #define B_AX_TXPKTCTL_CMDPSR_FRZTO_ERR BIT(25)
1634 #define B_AX_TXPKTCTL_CMDPSR_CMDTYPE_ERR BIT(24)
1635 #define B_AX_TXPKTCTL_USRCTL_RLSBMPLEN_ERR BIT(19)
1636 #define B_AX_TXPKTCTL_USRCTL_RDNRLSCMD_ERR BIT(18)
1637 #define B_AX_TXPKTCTL_USRCTL_NOINIT_ERR BIT(17)
1638 #define B_AX_TXPKTCTL_USRCTL_REINIT_ERR BIT(16)
1639 #define B_AX_TXPKTCTL_CMDPSR_FRZTO_ERR_INT_EN BIT(9)
1640 #define B_AX_TXPKTCTL_CMDPSR_CMDTYPE_ERR_INT_EN BIT(8)
1641 #define B_AX_TXPKTCTL_USRCTL_RLSBMPLEN_ERR_INT_EN BIT(3)
1642 #define B_AX_TXPKTCTL_USRCTL_RDNRLSCMD_ERR_INT_EN BIT(2)
1643 #define B_AX_TXPKTCTL_USRCTL_NOINIT_ERR_INT_EN BIT(1)
1644 #define B_AX_TXPKTCTL_USRCTL_REINIT_ERR_INT_EN BIT(0)
1665 #define B_AX_TXPKTCTL_CMDPSR_FRZTO_ERR_INT_EN BIT(9)
1666 #define B_AX_TXPKTCTL_USRCTL_RLSBMPLEN_ERR_INT_EN BIT(3)
1667 #define B_AX_TXPKTCTL_USRCTL_RDNRLSCMD_ERR_INT_EN BIT(2)
1668 #define B_AX_TXPKTCTL_USRCTL_NOINIT_ERR_INT_EN BIT(1)
1671 #define B_AX_DFI_ACTIVE BIT(31)
1672 #define B_AX_DFI_TRGSEL_MASK GENMASK(19, 16)
1678 #define B_AX_B0_PRELD_FEN BIT(31)
1679 #define B_AX_B0_PRELD_USEMAXSZ_MASK GENMASK(25, 16)
1691 #define B_AX_B0_IMR_ERR_PRELD_ENTNUMCFG BIT(21)
1692 #define B_AX_B0_IMR_ERR_PRELD_RLSPKTSZERR BIT(20)
1693 #define B_AX_B0_IMR_ERR_MPDUIF_DATAERR BIT(18)
1694 #define B_AX_B0_IMR_ERR_MPDUINFO_RECFG BIT(16)
1695 #define B_AX_B0_IMR_ERR_CMDPSR_TBLSZ BIT(11)
1696 #define B_AX_B0_IMR_ERR_CMDPSR_FRZTO BIT(10)
1697 #define B_AX_B0_IMR_ERR_CMDPSR_CMDTYPE BIT(9)
1698 #define B_AX_B0_IMR_ERR_CMDPSR_1STCMDERR BIT(8)
1699 #define B_AX_B0_IMR_ERR_USRCTL_RLSBMPLEN BIT(3)
1700 #define B_AX_B0_IMR_ERR_USRCTL_RDNRLSCMD BIT(2)
1701 #define B_AX_B0_IMR_ERR_USRCTL_NOINIT BIT(1)
1702 #define B_AX_B0_IMR_ERR_USRCTL_REINIT BIT(0)
1727 #define B_AX_B1_PRELD_FEN BIT(31)
1728 #define B_AX_B1_PRELD_USEMAXSZ_MASK GENMASK(25, 16)
1738 #define B_AX_B1_IMR_ERR_PRELD_ENTNUMCFG BIT(21)
1739 #define B_AX_B1_IMR_ERR_PRELD_RLSPKTSZERR BIT(20)
1740 #define B_AX_B1_IMR_ERR_MPDUIF_DATAERR BIT(18)
1741 #define B_AX_B1_IMR_ERR_MPDUINFO_RECFG BIT(16)
1742 #define B_AX_B1_IMR_ERR_CMDPSR_TBLSZ BIT(11)
1743 #define B_AX_B1_IMR_ERR_CMDPSR_FRZTO BIT(10)
1744 #define B_AX_B1_IMR_ERR_CMDPSR_CMDTYPE BIT(9)
1745 #define B_AX_B1_IMR_ERR_CMDPSR_1STCMDERR BIT(8)
1746 #define B_AX_B1_IMR_ERR_USRCTL_RLSBMPLEN BIT(3)
1747 #define B_AX_B1_IMR_ERR_USRCTL_RDNRLSCMD BIT(2)
1748 #define B_AX_B1_IMR_ERR_USRCTL_NOINIT BIT(1)
1749 #define B_AX_B1_IMR_ERR_USRCTL_REINIT BIT(0)
1775 #define B_AX_R_SYM_WLCMAC1_P4_PC_EN BIT(4)
1776 #define B_AX_R_SYM_WLCMAC1_P3_PC_EN BIT(3)
1777 #define B_AX_R_SYM_WLCMAC1_P2_PC_EN BIT(2)
1778 #define B_AX_R_SYM_WLCMAC1_P1_PC_EN BIT(1)
1779 #define B_AX_R_SYM_WLCMAC1_PC_EN BIT(0)
1782 #define B_AX_CMAC1_FEN BIT(30)
1783 #define B_AX_R_SYM_FEN_WLBBGLB_1 BIT(17)
1784 #define B_AX_R_SYM_FEN_WLBBFUN_1 BIT(16)
1785 #define B_AX_R_SYM_ISO_CMAC12PP BIT(5)
1791 #define B_AX_CMAC_CRPRT BIT(31)
1792 #define B_AX_CMAC_EN BIT(30)
1793 #define B_AX_CMAC_TXEN BIT(29)
1794 #define B_AX_CMAC_RXEN BIT(28)
1795 #define B_AX_FORCE_CMACREG_GCKEN BIT(15)
1796 #define B_AX_PHYINTF_EN BIT(5)
1797 #define B_AX_CMAC_DMA_EN BIT(4)
1798 #define B_AX_PTCLTOP_EN BIT(3)
1799 #define B_AX_SCHEDULER_EN BIT(2)
1800 #define B_AX_TMAC_EN BIT(1)
1801 #define B_AX_RMAC_EN BIT(0)
1806 #define B_AX_CMAC_CKEN BIT(30)
1807 #define B_AX_PHYINTF_CKEN BIT(5)
1808 #define B_AX_CMAC_DMA_CKEN BIT(4)
1809 #define B_AX_PTCLTOP_CKEN BIT(3)
1810 #define B_AX_SCHEDULER_CKEN BIT(2)
1811 #define B_AX_TMAC_CKEN BIT(1)
1812 #define B_AX_RMAC_CKEN BIT(0)
1850 #define B_AX_WMAC_TX_ERR_IND_EN BIT(7)
1851 #define B_AX_WMAC_RX_ERR_IND_EN BIT(6)
1852 #define B_AX_TXPWR_CTRL_ERR_IND_EN BIT(5)
1853 #define B_AX_PHYINTF_ERR_IND_EN BIT(4)
1854 #define B_AX_DMA_TOP_ERR_IND_EN BIT(3)
1855 #define B_AX_PTCL_TOP_ERR_IND_EN BIT(1)
1856 #define B_AX_SCHEDULE_TOP_ERR_IND_EN BIT(0)
1864 #define B_AX_WMAC_TX_ERR_IND BIT(7)
1865 #define B_AX_WMAC_RX_ERR_IND BIT(6)
1866 #define B_AX_TXPWR_CTRL_ERR_IND BIT(5)
1867 #define B_AX_PHYINTF_ERR_IND BIT(4)
1868 #define B_AX_DMA_TOP_ERR_IND BIT(3)
1869 #define B_AX_PTCL_TOP_ERR_IND BIT(1)
1870 #define B_AX_SCHEDULE_TOP_ERR_IND BIT(0)
1900 #define B_AX_SIFS_PREBKF_MASK GENMASK(23, 16)
1908 #define B_AX_BTCCA_BRK_TXOP_EN BIT(9)
1909 #define B_AX_BTCCA_EN BIT(5)
1910 #define B_AX_EDCCA_EN BIT(4)
1911 #define B_AX_SEC80_EN BIT(3)
1912 #define B_AX_SEC40_EN BIT(2)
1913 #define B_AX_SEC20_EN BIT(1)
1914 #define B_AX_CCA_EN BIT(0)
1918 #define B_AX_CTN_TXEN_TWT_1 BIT(15)
1919 #define B_AX_CTN_TXEN_TWT_0 BIT(14)
1920 #define B_AX_CTN_TXEN_ULQ BIT(13)
1921 #define B_AX_CTN_TXEN_BCNQ BIT(12)
1922 #define B_AX_CTN_TXEN_HGQ BIT(11)
1923 #define B_AX_CTN_TXEN_CPUMGQ BIT(10)
1924 #define B_AX_CTN_TXEN_MGQ1 BIT(9)
1925 #define B_AX_CTN_TXEN_MGQ BIT(8)
1926 #define B_AX_CTN_TXEN_VO_1 BIT(7)
1927 #define B_AX_CTN_TXEN_VI_1 BIT(6)
1928 #define B_AX_CTN_TXEN_BK_1 BIT(5)
1929 #define B_AX_CTN_TXEN_BE_1 BIT(4)
1930 #define B_AX_CTN_TXEN_VO_0 BIT(3)
1931 #define B_AX_CTN_TXEN_VI_0 BIT(2)
1932 #define B_AX_CTN_TXEN_BK_0 BIT(1)
1933 #define B_AX_CTN_TXEN_BE_0 BIT(0)
1938 #define B_AX_MUEDCA_BE_PARAM_0_TIMER_MASK GENMASK(31, 16)
1951 #define B_AX_MUEDCA_WMM_SEL BIT(8)
1952 #define B_AX_SET_MUEDCATIMER_TF_0 BIT(4)
1953 #define B_AX_MUEDCA_EN_0 BIT(0)
1957 #define B_AX_TB_CHK_TX_NAV BIT(31)
1958 #define B_AX_TB_CHK_BASIC_NAV BIT(30)
1959 #define B_AX_TB_CHK_BTCCA BIT(29)
1960 #define B_AX_TB_CHK_EDCCA BIT(28)
1961 #define B_AX_TB_CHK_CCA_S80 BIT(27)
1962 #define B_AX_TB_CHK_CCA_S40 BIT(26)
1963 #define B_AX_TB_CHK_CCA_S20 BIT(25)
1964 #define B_AX_TB_CHK_CCA_P20 BIT(24)
1965 #define B_AX_SIFS_CHK_BTCCA BIT(21)
1966 #define B_AX_SIFS_CHK_EDCCA BIT(20)
1967 #define B_AX_SIFS_CHK_CCA_S80 BIT(19)
1968 #define B_AX_SIFS_CHK_CCA_S40 BIT(18)
1969 #define B_AX_SIFS_CHK_CCA_S20 BIT(17)
1970 #define B_AX_SIFS_CHK_CCA_P20 BIT(16)
1971 #define B_AX_CTN_CHK_TXNAV BIT(8)
1972 #define B_AX_CTN_CHK_INTRA_NAV BIT(7)
1973 #define B_AX_CTN_CHK_BASIC_NAV BIT(6)
1974 #define B_AX_CTN_CHK_BTCCA BIT(5)
1975 #define B_AX_CTN_CHK_EDCCA BIT(4)
1976 #define B_AX_CTN_CHK_CCA_S80 BIT(3)
1977 #define B_AX_CTN_CHK_CCA_S40 BIT(2)
1978 #define B_AX_CTN_CHK_CCA_S20 BIT(1)
1979 #define B_AX_CTN_CHK_CCA_P20 BIT(0)
1983 #define B_AX_CTN_TXEN_TWT_3 BIT(17)
1984 #define B_AX_CTN_TXEN_TWT_2 BIT(16)
1989 #define B_AX_SORT_NON_IDLE_ERR_INT_EN BIT(1)
1996 #define B_AX_SCH_DBG_EN BIT(16)
2006 #define B_AX_PORT_RST_TSF_ADV BIT(1)
2013 #define B_AX_BRK_SETUP BIT(16)
2014 #define B_AX_TBTT_UPD_SHIFT_SEL BIT(15)
2015 #define B_AX_BCN_DROP_ALLOW BIT(14)
2016 #define B_AX_TBTT_PROHIB_EN BIT(13)
2017 #define B_AX_BCNTX_EN BIT(12)
2019 #define B_AX_BCN_FORCETX_EN BIT(9)
2020 #define B_AX_TXBCN_BTCCA_EN BIT(8)
2021 #define B_AX_BCNERR_CNT_EN BIT(7)
2022 #define B_AX_BCN_AGRES BIT(6)
2023 #define B_AX_TSFTR_RST BIT(5)
2024 #define B_AX_RX_BSSID_FIT_EN BIT(4)
2025 #define B_AX_TSF_UDT_EN BIT(3)
2026 #define B_AX_PORT_FUNC_EN BIT(2)
2027 #define B_AX_TXBCN_RPT_EN BIT(1)
2028 #define B_AX_RXBCN_RPT_EN BIT(0)
2035 #define B_AX_TBTT_HOLD_MASK GENMASK(27, 16)
2043 #define B_AX_BCN_MSK_AREA_MASK GENMASK(27, 16)
2072 #define B_AX_SUB_BCN_SPACE_MASK GENMASK(23, 16)
2080 #define B_AX_FORCE_BCN_CURRCNT_MASK GENMASK(23, 16)
2090 #define B_AX_BCN_ERR_CNT_NAV_MASK GENMASK(23, 16)
2099 #define B_AX_BCN_ERR_FLAG_OTHERS BIT(6)
2100 #define B_AX_BCN_ERR_FLAG_MAC BIT(5)
2101 #define B_AX_BCN_ERR_FLAG_TXON BIT(4)
2102 #define B_AX_BCN_ERR_FLAG_SRCHEND BIT(3)
2103 #define B_AX_BCN_ERR_FLAG_INVALID BIT(2)
2104 #define B_AX_BCN_ERR_FLAG_CMP BIT(1)
2105 #define B_AX_BCN_ERR_FLAG_LOCK BIT(0)
2121 #define B_AX_TBTT_SHIFT_OFST_SIGN BIT(11)
2148 #define B_AX_P0MB_NUM_MASK GENMASK(19, 16)
2149 #define B_AX_P0MB15_EN BIT(15)
2150 #define B_AX_P0MB14_EN BIT(14)
2151 #define B_AX_P0MB13_EN BIT(13)
2152 #define B_AX_P0MB12_EN BIT(12)
2153 #define B_AX_P0MB11_EN BIT(11)
2154 #define B_AX_P0MB10_EN BIT(10)
2155 #define B_AX_P0MB9_EN BIT(9)
2156 #define B_AX_P0MB8_EN BIT(8)
2157 #define B_AX_P0MB7_EN BIT(7)
2158 #define B_AX_P0MB6_EN BIT(6)
2159 #define B_AX_P0MB5_EN BIT(5)
2160 #define B_AX_P0MB4_EN BIT(4)
2161 #define B_AX_P0MB3_EN BIT(3)
2162 #define B_AX_P0MB2_EN BIT(2)
2163 #define B_AX_P0MB1_EN BIT(1)
2173 #define B_AX_CPUMGQ_LIFETIME_EN BIT(8)
2174 #define B_AX_MGQ_LIFETIME_EN BIT(7)
2175 #define B_AX_LIFETIME_EN BIT(6)
2176 #define B_AX_PTCL_TRIGGER_SS_EN_UL BIT(4)
2177 #define B_AX_PTCL_TRIGGER_SS_EN_1 BIT(3)
2178 #define B_AX_PTCL_TRIGGER_SS_EN_0 BIT(2)
2179 #define B_AX_CMAC_TX_MODE_1 BIT(1)
2180 #define B_AX_CMAC_TX_MODE_0 BIT(0)
2184 #define B_AX_RA_TRY_RATE_AGG_LMT_MASK GENMASK(23, 16)
2190 #define B_AX_AMPDU_MAX_LEN_HT_MASK GENMASK(31, 16)
2199 #define B_AX_HW_CTS2SELF_EN BIT(16)
2208 #define B_AX_BAND_MODE BIT(4)
2210 #define B_AX_RTS_LIMIT_IN_OFDM6 BIT(1)
2211 #define B_AX_CHECK_CCK_EN BIT(0)
2215 #define B_AX_ADD_TXCNT_BY BIT(31)
2217 #define B_AX_L_TXCNT_LMT_MASK GENMASK(21, 16)
2221 #define B_AX_GI_LTF_FB_SEL BIT(30)
2223 #define B_AX_PORT_DROP_4_0_MASK GENMASK(20, 16)
2229 #define B_AX_F2PCMD_FWWD_RLS_MODE BIT(9)
2230 #define B_AX_F2PCMD_RPT_EN BIT(8)
2235 #define B_AX_F2PCMDRPT_FULL_DROP BIT(1)
2236 #define B_AX_NON_F2PCMDRPT_FULL_DROP BIT(0)
2240 #define B_AX_BT_PLT_PKT_CNT_MASK GENMASK(31, 16)
2241 #define B_AX_BT_PLT_RST BIT(9)
2242 #define B_AX_PLT_EN BIT(8)
2243 #define B_AX_RX_PLT_GNT_LTE_RX BIT(7)
2244 #define B_AX_RX_PLT_GNT_BT_RX BIT(6)
2245 #define B_AX_RX_PLT_GNT_BT_TX BIT(5)
2246 #define B_AX_RX_PLT_GNT_WL BIT(4)
2247 #define B_AX_TX_PLT_GNT_LTE_RX BIT(3)
2248 #define B_AX_TX_PLT_GNT_BT_RX BIT(2)
2249 #define B_AX_TX_PLT_GNT_BT_TX BIT(1)
2250 #define B_AX_TX_PLT_GNT_WL BIT(0)
2255 #define B_AX_BSS_COLOB_AX_PORT_2_MASK GENMASK(21, 16)
2265 #define B_AX_F2PCMD_PKTID_ERR_INT_EN BIT(31)
2266 #define B_AX_F2PCMD_RD_PKTID_ERR_INT_EN BIT(30)
2267 #define B_AX_F2PCMD_ASSIGN_PKTID_ERR_INT_EN BIT(29)
2268 #define B_AX_F2PCMD_USER_ALLC_ERR_INT_EN BIT(28)
2269 #define B_AX_RX_SPF_U0_PKTID_ERR_INT_EN BIT(27)
2270 #define B_AX_TX_SPF_U1_PKTID_ERR_INT_EN BIT(26)
2271 #define B_AX_TX_SPF_U2_PKTID_ERR_INT_EN BIT(25)
2272 #define B_AX_TX_SPF_U3_PKTID_ERR_INT_EN BIT(24)
2273 #define B_AX_TX_RECORD_PKTID_ERR_INT_EN BIT(23)
2274 #define B_AX_F2PCMD_EMPTY_ERR_INT_EN BIT(15)
2275 #define B_AX_TWTSP_QSEL_ERR_INT_EN BIT(14)
2276 #define B_AX_BCNQ_ORDER_ERR_INT_EN BIT(12)
2277 #define B_AX_Q_PKTID_ERR_INT_EN BIT(11)
2278 #define B_AX_D_PKTID_ERR_INT_EN BIT(10)
2279 #define B_AX_TXPRT_FULL_DROP_ERR_INT_EN BIT(9)
2280 #define B_AX_F2PCMDRPT_FULL_DROP_ERR_INT_EN BIT(8)
2281 #define B_AX_FSM1_TIMEOUT_ERR_INT_EN BIT(1)
2282 #define B_AX_FSM_TIMEOUT_ERR_INT_EN BIT(0)
2315 #define B_AX_PTCL_TX_ARB_TO_MODE BIT(6)
2320 #define B_AX_PTCL_TX_ON_STAT BIT(7)
2327 #define B_AX_PTCL_DBG_EN BIT(8)
2332 #define B_AX_NO_RESERVE_PAGE_ERR_IMR BIT(23)
2333 #define B_AX_RXDATA_FSM_HANG_ERROR_IMR BIT(15)
2334 #define B_AX_RXSTS_FSM_HANG_ERROR_IMR BIT(14)
2343 #define B_AX_RXDMA_DBGOUT_EN BIT(31)
2350 #define B_AX_RXDMA_DIS_CSI_RELEASE BIT(9)
2351 #define B_AX_RXDMA_DIS_RXSTS_WAIT_PTR_CLR BIT(7)
2352 #define B_AX_RXDMA_DIS_CSI_WAIT_PTR_CLR BIT(6)
2353 #define B_AX_RXSTS_PTR_FULL_MODE BIT(5)
2354 #define B_AX_CSI_PTR_FULL_MODE BIT(4)
2355 #define B_AX_RU3_PTR_FULL_MODE BIT(3)
2356 #define B_AX_RU2_PTR_FULL_MODE BIT(2)
2357 #define B_AX_RU1_PTR_FULL_MODE BIT(1)
2358 #define B_AX_RU0_PTR_FULL_MODE BIT(0)
2369 #define B_AX_RX_GET_NULL_PKT_ERR_MSK BIT(30)
2370 #define B_AX_RX_RU0_FSM_HANG_MSK_ERR_MSK BIT(29)
2371 #define B_AX_RX_RU1_FSM_HANG_MSK_ERR_MSK BIT(28)
2372 #define B_AX_RX_RU2_FSM_HANG_MSK_ERR_MSK BIT(27)
2373 #define B_AX_RX_RU3_FSM_HANG_MSK_ERR_MSK BIT(26)
2374 #define B_AX_RX_RU4_FSM_HANG_MSK_ERR_MSK BIT(25)
2375 #define B_AX_RX_RU5_FSM_HANG_MSK_ERR_MSK BIT(24)
2376 #define B_AX_RX_RU6_FSM_HANG_MSK_ERR_MSK BIT(23)
2377 #define B_AX_RX_RU7_FSM_HANG_MSK_ERR_MSK BIT(22)
2378 #define B_AX_RX_RXSTS_FSM_HANG_MSK_ERR_MSK BIT(21)
2379 #define B_AX_RX_CSI_FSM_HANG_MSK_ERR_MSK BIT(20)
2380 #define B_AX_RX_TXRPT_FSM_HANG_MSK_ERR_MSK BIT(19)
2381 #define B_AX_RX_F2PCMD_FSM_HANG_MSK_ERR_MSK BIT(18)
2382 #define B_AX_RX_RU0_ZERO_LEN_ERR_MSK BIT(17)
2383 #define B_AX_RX_RU1_ZERO_LEN_ERR_MSK BIT(16)
2384 #define B_AX_RX_RU2_ZERO_LEN_ERR_MSK BIT(15)
2385 #define B_AX_RX_RU3_ZERO_LEN_ERR_MSK BIT(14)
2386 #define B_AX_RX_RU4_ZERO_LEN_ERR_MSK BIT(13)
2387 #define B_AX_RX_RU5_ZERO_LEN_ERR_MSK BIT(12)
2388 #define B_AX_RX_RU6_ZERO_LEN_ERR_MSK BIT(11)
2389 #define B_AX_RX_RU7_ZERO_LEN_ERR_MSK BIT(10)
2390 #define B_AX_RX_RXSTS_ZERO_LEN_ERR_MSK BIT(9)
2391 #define B_AX_RX_CSI_ZERO_LEN_ERR_MSK BIT(8)
2392 #define B_AX_PLE_DATA_OPT_FSM_HANG_MSK BIT(7)
2393 #define B_AX_PLE_RXDATA_REQ_BUF_FSM_HANG_MSK BIT(6)
2394 #define B_AX_PLE_TXRPT_REQ_BUF_FSM_HANG_MSK BIT(5)
2395 #define B_AX_PLE_WD_OPT_FSM_HANG_MSK BIT(4)
2396 #define B_AX_PLE_ENQ_FSM_HANG_MSK BIT(3)
2397 #define B_AX_RXDATA_ENQUE_ORDER_ERR_MSK BIT(2)
2398 #define B_AX_RXSTS_ENQUE_ORDER_ERR_MSK BIT(1)
2399 #define B_AX_RX_CSI_PKT_NUM_ERR_MSK BIT(0)
2453 #define B_AX_TX_RU0_FSM_HANG_ERR_MSK BIT(31)
2454 #define B_AX_TX_RU1_FSM_HANG_ERR_MSK BIT(30)
2455 #define B_AX_TX_RU2_FSM_HANG_ERR_MSK BIT(29)
2456 #define B_AX_TX_RU3_FSM_HANG_ERR_MSK BIT(28)
2457 #define B_AX_TX_RU4_FSM_HANG_ERR_MSK BIT(27)
2458 #define B_AX_TX_RU5_FSM_HANG_ERR_MSK BIT(26)
2459 #define B_AX_TX_RU6_FSM_HANG_ERR_MSK BIT(25)
2460 #define B_AX_TX_RU7_FSM_HANG_ERR_MSK BIT(24)
2461 #define B_AX_TX_RU8_FSM_HANG_ERR_MSK BIT(23)
2462 #define B_AX_TX_RU9_FSM_HANG_ERR_MSK BIT(22)
2463 #define B_AX_TX_RU10_FSM_HANG_ERR_MSK BIT(21)
2464 #define B_AX_TX_RU11_FSM_HANG_ERR_MSK BIT(20)
2465 #define B_AX_TX_RU12_FSM_HANG_ERR_MSK BIT(19)
2466 #define B_AX_TX_RU13_FSM_HANG_ERR_MSK BIT(18)
2467 #define B_AX_TX_RU14_FSM_HANG_ERR_MSK BIT(17)
2468 #define B_AX_TX_RU15_FSM_HANG_ERR_MSK BIT(16)
2469 #define B_AX_TX_CSI_FSM_HANG_ERR_MSK BIT(15)
2470 #define B_AX_TX_WD_PLD_ID_FSM_HANG_ERR_MSK BIT(14)
2495 #define B_AX_TCR_UDF_EN BIT(23)
2496 #define B_AX_TCR_UDF_THSD_MASK GENMASK(22, 16)
2499 #define B_AX_TCR_VHTSIGA1_TXPS BIT(9)
2500 #define B_AX_TCR_PLCP_ERRHDL_EN BIT(8)
2501 #define B_AX_TCR_PADSEL BIT(7)
2502 #define B_AX_TCR_MASK_SIGBCRC BIT(6)
2503 #define B_AX_TCR_SR_VAL15_ALLOW BIT(5)
2504 #define B_AX_TCR_EN_EOF BIT(4)
2505 #define B_AX_TCR_EN_SCRAM_INC BIT(3)
2506 #define B_AX_TCR_EN_20MST BIT(2)
2507 #define B_AX_TCR_CRC BIT(1)
2508 #define B_AX_TCR_DISGCLK BIT(0)
2513 #define B_AX_TCR_CCK_LOCK_CLK BIT(27)
2514 #define B_AX_TCR_FORCE_READ_TXDFIFO BIT(26)
2515 #define B_AX_TCR_USTIME GENMASK(23, 16)
2516 #define B_AX_TCR_SMOOTH_VAL BIT(15)
2517 #define B_AX_TCR_SMOOTH_CTRL BIT(14)
2518 #define B_AX_CS_REQ_VAL BIT(13)
2519 #define B_AX_CS_REQ_SEL BIT(12)
2525 #define B_AX_TSFT_OFS_MASK GENMASK(31, 16)
2527 #define B_AX_UPD_HGQMD BIT(1)
2528 #define B_AX_UPD_TIMIE BIT(0)
2536 #define B_AX_LEGACY_PPDU_ZLD_USTIMER_MASK GENMASK(20, 16)
2547 #define B_AX_MACTX_DMA_CNT GENMASK(23, 16)
2548 #define B_AX_LENGTH_ERR_FLAG_U3 BIT(11)
2549 #define B_AX_LENGTH_ERR_FLAG_U2 BIT(10)
2550 #define B_AX_LENGTH_ERR_FLAG_U1 BIT(9)
2551 #define B_AX_LENGTH_ERR_FLAG_U0 BIT(8)
2568 #define B_AX_RSP_STATIC_RTS_CHK_SERV_BW_EN BIT(30)
2569 #define B_AX_RSP_TBPPDU_CHK_PWR BIT(29)
2570 #define B_AX_RSP_CHK_BASIC_NAV BIT(21)
2571 #define B_AX_RSP_CHK_INTRA_NAV BIT(20)
2572 #define B_AX_RSP_CHK_TXNAV BIT(19)
2573 #define B_AX_TXDATA_END_PS_OPT BIT(18)
2574 #define B_AX_CHECK_SOUNDING_SEQ BIT(17)
2575 #define B_AX_RXBA_IGNOREA2 BIT(16)
2581 #define B_AX_WMAC_RESP_STBC_EN BIT(31)
2582 #define B_AX_WMAC_RXFTM_TXACK_SC BIT(30)
2583 #define B_AX_WMAC_RXFTM_TXACKBWEQ BIT(29)
2584 #define B_AX_RSP_CHK_SEC_CCA_80 BIT(28)
2585 #define B_AX_RSP_CHK_SEC_CCA_40 BIT(27)
2586 #define B_AX_RSP_CHK_SEC_CCA_20 BIT(26)
2587 #define B_AX_RSP_CHK_BTCCA BIT(25)
2588 #define B_AX_RSP_CHK_EDCCA BIT(24)
2589 #define B_AX_RSP_CHK_CCA BIT(23)
2590 #define B_AX_WMAC_LDPC_EN BIT(22)
2591 #define B_AX_WMAC_SGIEN BIT(21)
2592 #define B_AX_WMAC_SPLCPEN BIT(20)
2593 #define B_AX_WMAC_BESP_EARLY_TXBA BIT(17)
2603 #define B_AX_RESP_TX_MACID_CCA_TH_EN BIT(31)
2607 #define B_AX_WMAC_RESP_DOPPLEB_AX_EN BIT(21)
2608 #define B_AX_WMAC_RESP_DCM_EN BIT(20)
2609 #define B_AX_WMAC_RRSB_AX_CCK_MASK GENMASK(19, 16)
2612 #define B_AX_WMAC_RESP_REF_RATE_SEL BIT(9)
2617 #define B_AX_MACLBK_EN BIT(0)
2621 #define B_AX_WMAC_NAV_UPPER_EN BIT(26)
2623 #define B_AX_WMAC_PLCP_UP_NAV_EN BIT(17)
2624 #define B_AX_WMAC_TF_UP_NAV_EN BIT(16)
2633 #define B_AX_RXTRIG_RU26_DIS BIT(21)
2634 #define B_AX_RXTRIG_FCSCHK_EN BIT(20)
2636 #define B_AX_RXTRIG_EN BIT(16)
2641 #define B_AX_WMAC_MODE BIT(22)
2642 #define B_AX_WMAC_TIMETOUT_THR_MASK GENMASK(21, 16)
2643 #define B_AX_RMAC_FTM BIT(8)
2644 #define B_AX_RMAC_CSI BIT(7)
2645 #define B_AX_TMAC_MIMO_CTRL BIT(6)
2646 #define B_AX_TMAC_RXTB BIT(5)
2647 #define B_AX_TMAC_HWSIGB_GEN BIT(4)
2648 #define B_AX_TMAC_TXPLCP BIT(3)
2649 #define B_AX_TMAC_RESP BIT(2)
2650 #define B_AX_TMAC_TXCTL BIT(1)
2651 #define B_AX_TMAC_MACTX BIT(0)
2684 #define B_AX_TMAC_TXPLCP_ERR_CLR BIT(19)
2685 #define B_AX_TMAC_RESP_ERR_CLR BIT(18)
2686 #define B_AX_TMAC_TXCTL_ERR_CLR BIT(17)
2687 #define B_AX_TMAC_MACTX_ERR_CLR BIT(16)
2688 #define B_AX_TMAC_TXPLCP_ERR BIT(14)
2689 #define B_AX_TMAC_RESP_ERR BIT(13)
2690 #define B_AX_TMAC_TXCTL_ERR BIT(12)
2691 #define B_AX_TMAC_MACTX_ERR BIT(11)
2692 #define B_AX_TMAC_TXPLCP_INT_EN BIT(10)
2693 #define B_AX_TMAC_RESP_INT_EN BIT(9)
2694 #define B_AX_TMAC_TXCTL_INT_EN BIT(8)
2695 #define B_AX_TMAC_MACTX_INT_EN BIT(7)
2696 #define B_AX_WMAC_INT_MODE BIT(6)
2713 #define B_AX_PHYINTF_TIMEOUT_THR_MSAK_V1 GENMASK(21, 16)
2714 #define B_AX_CSI_ON_TIMEOUT_EN BIT(5)
2715 #define B_AX_STS_ON_TIMEOUT_EN BIT(4)
2716 #define B_AX_DATA_ON_TIMEOUT_EN BIT(3)
2717 #define B_AX_OFDM_CCA_TIMEOUT_EN BIT(2)
2718 #define B_AX_CCK_CCA_TIMEOUT_EN BIT(1)
2719 #define B_AX_PHY_TXON_TIMEOUT_EN BIT(0)
2735 #define B_AX_CSI_ON_TIMEOUT BIT(29)
2736 #define B_AX_STS_ON_TIMEOUT BIT(28)
2737 #define B_AX_DATA_ON_TIMEOUT BIT(27)
2738 #define B_AX_OFDM_CCA_TIMEOUT BIT(26)
2739 #define B_AX_CCK_CCA_TIMEOUT BIT(25)
2740 #define B_AXC_PHY_TXON_TIMEOUT BIT(24)
2741 #define B_AX_CSI_ON_TIMEOUT_INT_EN BIT(21)
2742 #define B_AX_STS_ON_TIMEOUT_INT_EN BIT(20)
2743 #define B_AX_DATA_ON_TIMEOUT_INT_EN BIT(19)
2744 #define B_AX_OFDM_CCA_TIMEOUT_INT_EN BIT(18)
2745 #define B_AX_CCK_CCA_TIMEOUT_INT_EN BIT(17)
2746 #define B_AX_PHY_TXON_TIMEOUT_INT_EN BIT(16)
2761 #define B_AX_BFMER_VHT_CSI_OFFSET_MASK GENMASK(23, 16)
2763 #define B_AX_BFMER_NDP_BFEN BIT(2)
2764 #define B_AX_BFMER_VHT_BFPRT_CHK BIT(0)
2771 #define B_AX_BFMEE_NDP_RXSTDBY_SEL BIT(16)
2774 #define B_AX_BFMEE_HE_NDPA_EN BIT(2)
2775 #define B_AX_BFMEE_VHT_NDPA_EN BIT(1)
2776 #define B_AX_BFMEE_HT_NDPA_EN BIT(0)
2782 #define B_AX_BFMEE_CSISEQ_SEL BIT(29)
2783 #define B_AX_BFMEE_BFPARAM_SEL BIT(28)
2785 #define B_AX_BFMEE_BF_PORT_SEL BIT(23)
2786 #define B_AX_BFMEE_USE_NSTS BIT(22)
2787 #define B_AX_BFMEE_CSI_RATE_FB_EN BIT(21)
2788 #define B_AX_BFMEE_CSI_GID_SEL BIT(20)
2790 #define B_AX_BFMEE_CSI_FORCE_RETE_EN BIT(17)
2791 #define B_AX_BFMEE_CSI_USE_NDPARATE BIT(16)
2792 #define B_AX_BFMEE_CSI_WITHHTC_EN BIT(15)
2793 #define B_AX_BFMEE_CSIINFO0_BF_EN BIT(14)
2794 #define B_AX_BFMEE_CSIINFO0_STBC_EN BIT(13)
2795 #define B_AX_BFMEE_CSIINFO0_LDPC_EN BIT(12)
2808 #define B_AX_BFMEE_HE_CSI_RATE_MASK GENMASK(22, 16)
2817 #define B_AX_STOP_RX_IN BIT(11)
2828 #define B_AX_DIS_CHK_MIN_LEN BIT(8)
2829 #define B_AX_HE_SIGB_CRC_CHK BIT(6)
2830 #define B_AX_VHT_MU_SIGB_CRC_CHK BIT(5)
2831 #define B_AX_VHT_SU_SIGB_CRC_CHK BIT(4)
2832 #define B_AX_SIGA_CRC_CHK BIT(3)
2833 #define B_AX_LSIG_PARITY_CHK_EN BIT(2)
2834 #define B_AX_CCK_SIG_CHK BIT(1)
2835 #define B_AX_CCK_CRC_CHK BIT(0)
2842 #define B_AX_RX_MPDU_MAX_LEN_MASK GENMASK(21, 16)
2844 #define B_AX_A_FTM_REQ BIT(14)
2845 #define B_AX_A_ERR_PKT BIT(13)
2846 #define B_AX_A_UNSUP_PKT BIT(12)
2847 #define B_AX_A_CRC32_ERR BIT(11)
2848 #define B_AX_A_PWR_MGNT BIT(10)
2850 #define B_AX_A_BCN_CHK_EN BIT(7)
2851 #define B_AX_A_MC_LIST_CAM_MATCH BIT(6)
2852 #define B_AX_A_BC_CAM_MATCH BIT(5)
2853 #define B_AX_A_UC_CAM_MATCH BIT(4)
2854 #define B_AX_A_MC BIT(3)
2855 #define B_AX_A_BC BIT(2)
2856 #define B_AX_A_A1_MATCH BIT(1)
2857 #define B_AX_SNIFFER_MODE BIT(0)
2877 #define B_AX_ADDR_CAM_RANGE_MASK GENMASK(23, 16)
2879 #define B_AX_ADDR_CAM_CLR BIT(8)
2880 #define B_AX_ADDR_CAM_A2_B0_CHK BIT(2)
2881 #define B_AX_ADDR_CAM_SRCH_PERPKT BIT(1)
2882 #define B_AX_ADDR_CAM_EN BIT(0)
2886 #define B_AX_SSN_SEL BIT(2)
2892 #define B_AX_PPDU_STAT_RPT_TRIG BIT(8)
2893 #define B_AX_PPDU_STAT_RPT_CRC32 BIT(5)
2894 #define B_AX_PPDU_STAT_RPT_A1M BIT(4)
2895 #define B_AX_APP_PLCP_HDR_RPT BIT(3)
2896 #define B_AX_APP_RX_CNT_RPT BIT(2)
2897 #define B_AX_APP_MAC_INFO_RPT BIT(1)
2898 #define B_AX_PPDU_STAT_RPT_EN BIT(0)
2902 #define B_AX_SR_EN BIT(0)
2906 #define B_AX_CSIPRT_HESU_AID_EN BIT(25)
2907 #define B_AX_CSIPRT_VHTSU_AID_EN BIT(24)
2912 #define B_AX_STATE_CUR_MASK GENMASK(31, 16)
2914 #define B_AX_STATE_UPD BIT(7)
2919 #define B_AX_RXERR_INTPS_EN BIT(31)
2920 #define B_AX_RMAC_RX_CSI_TIMEOUT_INT_EN BIT(19)
2921 #define B_AX_RMAC_RX_TIMEOUT_INT_EN BIT(18)
2922 #define B_AX_RMAC_CSI_TIMEOUT_INT_EN BIT(17)
2923 #define B_AX_RMAC_DATA_ON_TIMEOUT_INT_EN BIT(16)
2924 #define B_AX_RMAC_CCA_TIMEOUT_INT_EN BIT(15)
2925 #define B_AX_RMAC_DMA_TIMEOUT_INT_EN BIT(14)
2926 #define B_AX_RMAC_DATA_ON_TO_IDLE_TIMEOUT_INT_EN BIT(13)
2927 #define B_AX_RMAC_CCA_TO_IDLE_TIMEOUT_INT_EN BIT(12)
2928 #define B_AX_RMAC_RX_CSI_TIMEOUT_FLAG BIT(7)
2929 #define B_AX_RMAC_RX_TIMEOUT_FLAG BIT(6)
2930 #define B_AX_BMAC_CSI_TIMEOUT_FLAG BIT(5)
2931 #define B_AX_BMAC_DATA_ON_TIMEOUT_FLAG BIT(4)
2932 #define B_AX_BMAC_CCA_TIMEOUT_FLAG BIT(3)
2933 #define B_AX_BMAC_DMA_TIMEOUT_FLAG BIT(2)
2934 #define B_AX_BMAC_DATA_ON_TO_IDLE_TIMEOUT_FLAG BIT(1)
2935 #define B_AX_BMAC_CCA_TO_IDLE_TIMEOUT_FLAG BIT(0)
2951 #define B_AX_RX_ERR_TRIG_ACT_TO_MSK BIT(9)
2952 #define B_AX_RX_ERR_STS_ACT_TO_MSK BIT(8)
2953 #define B_AX_RX_ERR_CSI_ACT_TO_MSK BIT(7)
2954 #define B_AX_RX_ERR_ACT_TO_MSK BIT(6)
2955 #define B_AX_CSI_DATAON_ASSERT_TO_MSK BIT(5)
2956 #define B_AX_DATAON_ASSERT_TO_MSK BIT(4)
2957 #define B_AX_CCA_ASSERT_TO_MSK BIT(3)
2958 #define B_AX_RX_ERR_DMA_TO_MSK BIT(2)
2959 #define B_AX_RX_ERR_DATA_TO_MSK BIT(1)
2960 #define B_AX_RX_ERR_CCA_TO_MSK BIT(0)
2994 #define B_AX_FORCE_PWR_BY_RATE_EN BIT(9)
2999 #define B_AX_TXAGC_BT_EN BIT(1)
3007 #define B_AX_PWR_UL_TB_CTRL_EN BIT(31)
3069 #define B_P80_AT_HIGH_FREQ_BB_WRP BIT(28)
3081 #define B_AX_BTC_EN BIT(31)
3082 #define B_AX_EN_EXT_BT_PINMUX BIT(29)
3083 #define B_AX_BTC_RST BIT(28)
3084 #define B_AX_BTC_DBG_SRC_SEL BIT(27)
3086 #define B_AX_INV_WL_ACT2 BIT(17)
3087 #define B_AX_BTG_LNA1_GAIN_SEL BIT(16)
3089 #define B_AX_IGN_GNT_BT2_RX BIT(7)
3090 #define B_AX_IGN_GNT_BT2_TX BIT(6)
3091 #define B_AX_IGN_GNT_BT2 BIT(5)
3093 #define B_AX_DIS_BTC_CLK_G BIT(2)
3094 #define B_AX_GNT_WL_RX_CTRL BIT(1)
3095 #define B_AX_WL_SRC BIT(0)
3099 #define B_AX_BT_BLE_EN_V1 BIT(24)
3100 #define B_AX_BT_ULTRA_EN BIT(16)
3108 #define B_AX_PTA_WL_PRI_MASK_BCNQ BIT(8)
3112 #define B_AX_BT_CNT_RST_V1 BIT(1)
3113 #define B_AX_BT_CNT_EN BIT(0)
3120 #define B_AX_PTA_WL_TX_EN BIT(1)
3121 #define B_AX_PTA_EDCCA_EN BIT(0)
3124 #define B_BTC_TX_BCN_HI BIT(22)
3125 #define B_BTC_RSP_ACK_HI BIT(10)
3131 #define B_BTC_PRI_MASK_TX_RESP_V1 BIT(3)
3135 #define B_AX_GNT_BT_BYPASS_PRIORITY BIT(12)
3136 #define B_AX_GNT_BT_POLARITY BIT(8)
3142 #define B_AX_BT_CNT_RST BIT(16)
3149 #define B_AX_WL_ACT_MSK BIT(3)
3150 #define B_AX_STATIS_BT_EN BIT(2)
3151 #define B_AX_WL_ACT_MASK_ENABLE BIT(1)
3152 #define B_AX_ENHANCED_BT BIT(0)
3157 #define B_AX_STATIS_BT_HI_RX_MASK GENMASK(31, 16)
3161 #define B_AX_STATIS_BT_LO_RX_1_MASK GENMASK(31, 16)
3165 #define B_AX_WL_ACT2_VAL BIT(21)
3166 #define B_AX_WL_ACT2_SWCTRL BIT(20)
3167 #define B_AX_WL_ACT_VAL BIT(19)
3168 #define B_AX_WL_ACT_SWCTRL BIT(18)
3169 #define B_AX_GNT_BT_RX_VAL BIT(17)
3170 #define B_AX_GNT_BT_RX_SWCTRL BIT(16)
3171 #define B_AX_GNT_BT_TX_VAL BIT(15)
3172 #define B_AX_GNT_BT_TX_SWCTRL BIT(14)
3173 #define B_AX_GNT_WL_RX_VAL BIT(13)
3174 #define B_AX_GNT_WL_RX_SWCTRL BIT(12)
3175 #define B_AX_GNT_WL_TX_VAL BIT(11)
3176 #define B_AX_GNT_WL_TX_SWCTRL BIT(10)
3177 #define B_AX_GNT_BT_RFC_S1_VAL BIT(9)
3178 #define B_AX_GNT_BT_RFC_S1_SWCTRL BIT(8)
3179 #define B_AX_GNT_WL_RFC_S1_VAL BIT(7)
3180 #define B_AX_GNT_WL_RFC_S1_SWCTRL BIT(6)
3181 #define B_AX_GNT_BT_RFC_S0_VAL BIT(5)
3182 #define B_AX_GNT_BT_RFC_S0_SWCTRL BIT(4)
3183 #define B_AX_GNT_WL_RFC_S0_VAL BIT(3)
3184 #define B_AX_GNT_WL_RFC_S0_SWCTRL BIT(2)
3185 #define B_AX_GNT_WL_BB_VAL BIT(1)
3186 #define B_AX_GNT_WL_BB_SWCTRL BIT(0)
3189 #define B_AX_GNT_BT_RFC_S1_STA BIT(5)
3190 #define B_AX_GNT_WL_RFC_S1_STA BIT(4)
3191 #define B_AX_GNT_BT_RFC_S0_STA BIT(3)
3192 #define B_AX_GNT_WL_RFC_S0_STA BIT(2)
3195 #define B_AX_GNT_BT_RFC_S1 BIT(4)
3196 #define B_AX_GNT_BT_RFC_S0 BIT(3)
3197 #define B_AX_GNT_WL_RFC_S1 BIT(2)
3198 #define B_AX_GNT_WL_RFC_S0 BIT(1)
3202 #define B_AX_R_BT_CMD_RPT_MASK GENMASK(31, 16)
3205 #define B_AX_TDMA_BT_START_NOTIFY BIT(5)
3206 #define B_AX_ENABLE_TDMA_FW_MODE BIT(4)
3207 #define B_AX_ENABLE_PTA_TDMA_MODE BIT(3)
3208 #define B_AX_ENABLE_COEXIST_TAB_IN_TDMA BIT(2)
3209 #define B_AX_GPIO2_GPIO3_EXANGE_OR_NO_BT_CCA BIT(1)
3210 #define B_AX_RTK_BT_ENABLE BIT(0)
3231 #define B_AX_GNT_BT_RFC_S1_SW_VAL BIT(31)
3232 #define B_AX_GNT_BT_RFC_S1_SW_CTRL BIT(30)
3233 #define B_AX_GNT_WL_RFC_S1_SW_VAL BIT(29)
3234 #define B_AX_GNT_WL_RFC_S1_SW_CTRL BIT(28)
3235 #define B_AX_GNT_BT_BB_S1_SW_VAL BIT(27)
3236 #define B_AX_GNT_BT_BB_S1_SW_CTRL BIT(26)
3237 #define B_AX_GNT_WL_BB_S1_SW_VAL BIT(25)
3238 #define B_AX_GNT_WL_BB_S1_SW_CTRL BIT(24)
3239 #define B_AX_BT_SW_CTRL_WL_PRIORITY BIT(19)
3240 #define B_AX_WL_SW_CTRL_WL_PRIORITY BIT(18)
3241 #define B_AX_LTE_PATTERN_2_EN BIT(17)
3242 #define B_AX_LTE_PATTERN_1_EN BIT(16)
3243 #define B_AX_GNT_BT_RFC_S0_SW_VAL BIT(15)
3244 #define B_AX_GNT_BT_RFC_S0_SW_CTRL BIT(14)
3245 #define B_AX_GNT_WL_RFC_S0_SW_VAL BIT(13)
3246 #define B_AX_GNT_WL_RFC_S0_SW_CTRL BIT(12)
3247 #define B_AX_GNT_BT_BB_S0_SW_VAL BIT(11)
3248 #define B_AX_GNT_BT_BB_S0_SW_CTRL BIT(10)
3249 #define B_AX_GNT_WL_BB_S0_SW_VAL BIT(9)
3250 #define B_AX_GNT_WL_BB_S0_SW_CTRL BIT(8)
3251 #define B_AX_LTECOEX_FUN_EN BIT(7)
3252 #define B_AX_LTECOEX_3WIRE_CTRL_MUX BIT(6)
3254 #define B_AX_LTECOEX_UART_MUX BIT(3)
3259 #define B_AX_WL_RX_CTRL BIT(8)
3260 #define B_AX_GNT_WL_RX_SW_VAL BIT(7)
3261 #define B_AX_GNT_WL_RX_SW_CTRL BIT(6)
3262 #define B_AX_GNT_WL_TX_SW_VAL BIT(5)
3263 #define B_AX_GNT_WL_TX_SW_CTRL BIT(4)
3264 #define B_AX_GNT_BT_RX_SW_VAL BIT(3)
3265 #define B_AX_GNT_BT_RX_SW_CTRL BIT(2)
3266 #define B_AX_GNT_BT_TX_SW_VAL BIT(1)
3267 #define B_AX_GNT_BT_TX_SW_CTRL BIT(0)
3273 #define RR_MOD_MASK GENMASK(19, 16)
3288 #define RR_WLSEL_AG GENMASK(18, 16)
3290 #define RR_RSV1_RST BIT(0)
3292 #define RR_BBDC_SEL BIT(0)
3299 #define RR_TXIG_TG GENMASK(16, 12)
3307 #define RR_CFGCH_BAND1 GENMASK(17, 16)
3333 #define RR_RXKPLL_POW BIT(19)
3335 #define RR_RSV4_AGH GENMASK(17, 16)
3338 #define RR_RXK_SEL2G BIT(8)
3339 #define RR_RXK_SEL5G BIT(7)
3340 #define RR_RXK_PLLEN BIT(5)
3348 #define RR_TM_TRI BIT(19)
3351 #define RR_TM2_OFF GENMASK(19, 16)
3353 #define RR_TXG1_ATT2 BIT(19)
3354 #define RR_TXG1_ATT1 BIT(11)
3356 #define RR_TXG2_ATT0 BIT(11)
3359 #define RR_TXGA_TRK_EN BIT(7)
3361 #define RR_TXGA_LOK_EN BIT(0)
3374 #define RR_TXRSV_GAPK BIT(19)
3376 #define RR_BIAS_GAPK BIT(19)
3379 #define RR_BIASA_TXA GENMASK(19, 16)
3385 #define RR_TXATANK_LBSW GENMASK(16, 15)
3387 #define RR_TXA2_LDO GENMASK(19, 16)
3391 #define RR_TXPOW_TXA BIT(8)
3392 #define RR_TXPOW_TXAS BIT(7)
3393 #define RR_TXPOW_TXG BIT(1)
3395 #define RR_RXPOW_IQK GENMASK(17, 16)
3398 #define RR_RXBB_C2G GENMASK(16, 10)
3403 #define RR_RXG_IQKMOD GENMASK(19, 16)
3419 #define RR_RXBB2_DAC_EN BIT(13)
3420 #define RR_RXBB2_CKT BIT(12)
3428 #define RR_DCK_FINE BIT(1)
3429 #define RR_DCK_LV BIT(0)
3431 #define RR_DCK1_DONE BIT(5)
3433 #define RR_DCK1_SEL BIT(3)
3437 #define RR_DCKC_CHK BIT(3)
3443 #define RR_TIA_N6 BIT(8)
3447 #define RR_LOGEN_RPT GENMASK(19, 16)
3451 #define RR_LCK_TRGSEL BIT(8)
3456 #define RR_RCKD_BW BIT(2)
3459 #define RR_LUTDBG_TIA BIT(12)
3460 #define RR_LUTDBG_LOK BIT(2)
3462 #define RR_LUTWE2_RTXBW BIT(2)
3464 #define RR_LUTWE_LOK BIT(2)
3466 #define RR_RFC_CKEN BIT(1)
3470 #define B_P0_RSTB_WATCH_DOG BIT(0)
3471 #define B_P1_RSTB_WATCH_DOG BIT(1)
3472 #define B_UPD_P0_EN BIT(31)
3478 #define B_ANAPAR_15 GENMASK(31, 16)
3479 #define B_ANAPAR_ADCCLK BIT(30)
3480 #define B_ANAPAR_FLTRST BIT(22)
3481 #define B_ANAPAR_CRXBB GENMASK(18, 16)
3491 #define B_SWSI_DATA_BIT_MASK_EN_V1 BIT(31)
3500 #define B_UPD_CLK_ADC_ON BIT(24)
3501 #define B_ENABLE_CCK BIT(5)
3503 #define B_RSTB_ASYNC_ALL BIT(1)
3505 #define B_CH_IDX_SEG0 GENMASK(23, 16)
3507 #define B_STS_PARSING_TIME GENMASK(19, 16)
3508 #define B_STS_DIS_TRIG_BY_FAIL BIT(3)
3509 #define B_STS_DIS_TRIG_BY_BRK BIT(2)
3529 #define B_PMAC_GNT_TXEN BIT(0)
3530 #define B_PMAC_GNT_RXEN BIT(16)
3538 #define B_MAC_SEL_OFDM_TRI_FILTER BIT(31)
3539 #define B_MAC_SEL_PWR_EN BIT(16)
3540 #define B_MAC_SEL_DPD_EN BIT(10)
3543 #define B_PMAC_TXEN_DIS BIT(0)
3546 #define B_PMAC_CTX_EN BIT(0)
3547 #define B_PMAC_PTX_EN BIT(4)
3551 #define B_P80_AT_HIGH_FREQ BIT(26)
3553 #define B_DBCC_80P80_SEL_EVM_RPT_EN BIT(0)
3556 #define B_MEASUREMENT_TRIG_MSK BIT(2)
3557 #define B_CCX_TRIG_OPT_MSK BIT(1)
3558 #define B_CCX_EN_MSK BIT(0)
3560 #define B_IFS_CLM_PERIOD_MSK GENMASK(31, 16)
3562 #define B_IFS_COUNTER_CLR_MSK BIT(13)
3563 #define B_IFS_COLLECT_EN BIT(12)
3565 #define B_IFS_T1_TH_HIGH_MSK GENMASK(31, 16)
3566 #define B_IFS_T1_EN_MSK BIT(15)
3569 #define B_IFS_T2_TH_HIGH_MSK GENMASK(31, 16)
3570 #define B_IFS_T2_EN_MSK BIT(15)
3573 #define B_IFS_T3_TH_HIGH_MSK GENMASK(31, 16)
3574 #define B_IFS_T3_EN_MSK BIT(15)
3577 #define B_IFS_T4_TH_HIGH_MSK GENMASK(31, 16)
3578 #define B_IFS_T4_EN_MSK BIT(15)
3581 #define B_PD_HIT_DIS BIT(9)
3583 #define B_IOQ_IQK_DPK_EN BIT(1)
3585 #define B_GNT_BT_WGT_EN BIT(21)
3587 #define B_PD_ARBITER_OFF BIT(31)
3597 #define B_P0_EN_SOUND_WO_NDP BIT(1)
3600 #define B_RXHE_MAX_NSS GENMASK(16, 14)
3603 #define B_SPOOF_ASYNC_RST BIT(15)
3606 #define B_NDP_RU_BRK BIT(0)
3613 #define B_P0_RXCK_BW3 BIT(30)
3615 #define B_P0_RXCK_ON BIT(19)
3616 #define B_P0_RXCK_VAL GENMASK(18, 16)
3617 #define B_P0_TXCK_ON BIT(15)
3623 #define B_P0_NRBW_DBG BIT(30)
3625 #define B_S0_RXDC_I GENMASK(25, 16)
3637 #define B_SWSI_W_BUSY_V1 BIT(24)
3638 #define B_SWSI_R_BUSY_V1 BIT(25)
3639 #define B_SWSI_R_DATA_DONE_V1 BIT(26)
3642 #define B_IFS_CLM_EDCCA_EXCLUDE_CCA_FA_MSK GENMASK(31, 16)
3645 #define B_IFS_CLM_OFDMCCA_EXCLUDE_FA_MSK GENMASK(31, 16)
3648 #define B_IFS_CLM_OFDM_FA_MSK GENMASK(31, 16)
3652 #define B_IFS_T3_HIS_MSK GENMASK(23, 16)
3656 #define B_IFS_T2_AVG_MSK GENMASK(31, 16)
3659 #define B_IFS_T4_AVG_MSK GENMASK(31, 16)
3662 #define B_IFS_T2_CCA_MSK GENMASK(31, 16)
3665 #define B_IFS_T4_CCA_MSK GENMASK(31, 16)
3668 #define B_IFSCNT_DONE_MSK BIT(16)
3677 #define B_TXAGC_BB_OFT GENMASK(31, 16)
3684 #define B_ADC_FIFO_RXK GENMASK(31, 16)
3685 #define B_ADC_FIFO_A3 BIT(28)
3686 #define B_ADC_FIFO_A2 BIT(24)
3687 #define B_ADC_FIFO_A1 BIT(20)
3688 #define B_ADC_FIFO_A0 BIT(16)
3706 #define B_11B_RXCCA_DIS_V1 BIT(0)
3710 #define B_RXCCA_DIS BIT(31)
3712 #define B_RXCCA_DIS_V1 BIT(0)
3714 #define B_RXSC_EN BIT(0)
3720 #define B_P80_AT_HIGH_FREQ_RU_ALLOC_PHY1 BIT(14)
3721 #define B_P80_AT_HIGH_FREQ_RU_ALLOC_PHY0 BIT(13)
3723 #define B_DBCC_80P80_SEL_EVM_RPT2_EN BIT(0)
3725 #define B_P1_EN_SOUND_WO_NDP BIT(1)
3732 #define B_P1_DBGMOD_ON BIT(30)
3734 #define B_S1_RXDC_I GENMASK(25, 16)
3741 #define B_TXAGC_BB_S1_OFT GENMASK(31, 16)
3747 #define B_MUIC_EN BIT(0)
3753 #define B_SEG0CSI_EN BIT(23)
3755 #define B_BSS_CLR_MAP_VLD0 BIT(28)
3762 #define B_T2F_GI_COMB_EN BIT(2)
3764 #define B_BT_DYN_DC_EST_EN_MSK BIT(31)
3766 #define B_ASSIGN_SBD_OPT_EN BIT(24)
3772 #define B_DCFO_OPT_EN BIT(29)
3774 #define B_BANDEDGE_EN BIT(30)
3835 #define B_PATH0_TIA_INIT_IDX_MSK BIT(17)
3839 #define B_PATH0_P20_FOLLOW_BY_PAGCUGC_EN_MSK BIT(5)
3843 #define B_PATH0_S20_FOLLOW_BY_PAGCUGC_EN_MSK BIT(5)
3851 #define B_PATH0_R_G_OFST_MASK GENMASK(23, 16)
3854 #define B_CDD_EVM_CHK_EN BIT(0)
3856 #define B_PATH0_BAND_SEL_MSK_V1 BIT(17)
3858 #define B_PATH0_BT_SHARE_V1 BIT(19)
3860 #define B_PATH0_BTG_PATH_V1 BIT(22)
3863 #define B_P0_NBIIDX_NOTCH_EN BIT(12)
3866 #define B_P0_NBIIDX_NOTCH_EN_V1 BIT(12)
3870 #define B_P0_AGC_EN BIT(31)
3875 #define B_PATH0_TIA_INIT_IDX_MSK_V1 BIT(9)
3877 #define B_PATH1_TIA_INIT_IDX_MSK BIT(17)
3887 #define B_PATH1_P20_FOLLOW_BY_PAGCUGC_EN_MSK BIT(5)
3891 #define B_PATH1_S20_FOLLOW_BY_PAGCUGC_EN_MSK BIT(5)
3897 #define B_PATH1_BAND_SEL_MSK_V1 BIT(17)
3899 #define B_PATH1_BT_SHARE_V1 BIT(19)
3901 #define B_PATH1_BTG_PATH_V1 BIT(22)
3904 #define B_P1_NBIIDX_NOTCH_EN BIT(12)
3907 #define B_SEG0R_PD_SPATIAL_REUSE_EN_MSK_V1 BIT(30)
3908 #define B_SEG0R_PD_SPATIAL_REUSE_EN_MSK BIT(29)
3911 #define B_2P4G_BAND_SEL BIT(1)
3919 #define B_BT_SHARE BIT(14)
3924 #define B_PD_BOOST_EN BIT(7)
3934 #define B_P1_AGC_EN BIT(31)
3936 #define B_PATH1_TIA_INIT_IDX_MSK_V1 BIT(9)
3948 #define B_PATH0_NOTCH_EN BIT(12)
3951 #define B_PATH0_NOTCH2_EN BIT(12)
3954 #define B_PATH0_5MDET_EN BIT(12)
3955 #define B_PATH0_5MDET_SB2 BIT(8)
3956 #define B_PATH0_5MDET_SB0 BIT(6)
3961 #define B_PATH1_NOTCH_EN BIT(12)
3964 #define B_PATH1_NOTCH2_EN BIT(12)
3967 #define B_PATH1_5MDET_EN BIT(12)
3968 #define B_PATH1_5MDET_SB2 BIT(8)
3969 #define B_PATH1_5MDET_SB0 BIT(6)
3974 #define B_RPL_PATHB_MASK GENMASK(23, 16)
3982 #define B_RX_BW40_2XFFT_EN_MSK_V1 BIT(26)
3988 #define B_BMODE_PDTH_LIMIT_EN_MSK_V1 BIT(30)
3992 #define B_CFO_COMP_VALID_BIT BIT(29)
3996 #define B_DAC_VAL BIT(31)
3998 #define B_DPD_DIS BIT(14)
3999 #define B_DPD_GDIS BIT(13)
4000 #define B_IQK_RFC_ON BIT(1)
4002 #define B_TXPWRB_ON BIT(28)
4005 #define B_DPD_OFT_EN BIT(28)
4009 #define B_TXPWRB_RDY BIT(15)
4012 #define B_P0_TMETER_DIS BIT(16)
4013 #define B_P0_TMETER_TRK BIT(24)
4015 #define B_P0_TSSI_TRK_EN BIT(30)
4016 #define B_P0_TSSI_OFT_EN BIT(28)
4022 #define R_P0_RFCTM_RDY BIT(26)
4024 #define B_P0_TRSW_B BIT(0)
4025 #define B_P0_TRSW_A BIT(1)
4026 #define B_P0_TRSW_X BIT(2)
4029 #define B_P0_RFM_DIS_WL BIT(7)
4030 #define B_P0_RFM_TX_OPT BIT(6)
4031 #define B_P0_RFM_BT_EN BIT(5)
4036 #define B_P0_TXPW_RSTB_MANON BIT(30)
4037 #define B_P0_TXPW_RSTB_TSSI BIT(31)
4041 #define B_TXGAIN_SCALE_EN BIT(19)
4046 #define B_S0_DACKI_EN BIT(3)
4055 #define B_S0_DACKQ_EN BIT(3)
4066 #define B_P1_TMETER_DIS BIT(16)
4067 #define B_P1_TMETER_TRK BIT(24)
4069 #define B_P1_TSSI_TRK_EN BIT(30)
4070 #define B_P1_TSSI_OFT_EN BIT(28)
4075 #define R_P1_RFCTM_RDY BIT(26)
4078 #define B_P1_TXPW_RSTB_MANON BIT(30)
4079 #define B_P1_TXPW_RSTB_TSSI BIT(31)
4085 #define B_S1_DACKI_EN BIT(3)
4094 #define B_S1_DACKQ_EN BIT(3)
4104 #define B_NCTL_RPT_FLG BIT(26)
4116 #define B_IQK_DIF4_RXT GENMASK(27, 16)
4125 #define B_MDPK_SYNC_SEL BIT(31)
4128 #define B_MDPK_RX_DCK_EN BIT(31)
4135 #define B_DPK_IDL BIT(8)
4137 #define B_LDL_NORM_MA BIT(16)
4141 #define B_DPK_CTL_EN BIT(28)
4145 #define B_DPK_CFG2_ST BIT(14)
4150 #define B_KIP_RPT1_SEL GENMASK(21, 16)
4153 #define B_GAPK_ADR BIT(0)
4156 #define B_DPK_MPA_T0 BIT(10)
4157 #define B_DPK_MPA_T1 BIT(9)
4158 #define B_DPK_MPA_T2 BIT(8)
4160 #define B_DPK_WR_ST BIT(29)
4162 #define B_DPK_TRK_DIS BIT(31)
4164 #define B_PRT_COM_SYNERR BIT(30)
4165 #define B_PRT_COM_DCI GENMASK(27, 16)
4168 #define B_PRT_COM_RXOV BIT(8)
4172 #define B_PRT_COM_DONE BIT(0)
4174 #define B_COEF_SEL_IQC BIT(0)
4175 #define B_COEF_SEL_MDPD BIT(8)
4182 #define B_RXIQC_BYPASS BIT(0)
4183 #define B_RXIQC_BYPASS2 BIT(2)
4187 #define B_KIP_DBCC BIT(0)
4188 #define B_KIP_RFGAIN BIT(8)
4196 #define B_CFIR_LUT_SEL BIT(8)
4197 #define B_CFIR_LUT_SET BIT(4)
4198 #define B_CFIR_LUT_G3 BIT(3)
4199 #define B_CFIR_LUT_G2 BIT(2)
4203 #define B_DPK_GN_EN GENMASK(17, 16)
4206 #define B_DPD_LBK BIT(7)
4220 #define B_KIP_RPT_SEL GENMASK(21, 16)
4223 #define B_LOAD_COEF_MDPD BIT(16)
4225 #define B_LOAD_COEF_DI BIT(1)
4226 #define B_LOAD_COEF_AUTO BIT(0)
4231 #define B_RPT_PER_TSSI GENMASK(28, 16)
4252 #define B_IQKINF_FAIL_RXGRP GENMASK(23, 16)
4255 #define B_IQKINF_F_RX BIT(3)
4256 #define B_IQKINF_FTX BIT(2)
4257 #define B_IQKINF_FFIN BIT(1)
4258 #define B_IQKINF_FCOR BIT(0)
4264 #define B_IQKINF2_FCNT GENMASK(23, 16)
4270 #define B_DCOF1_S BIT(0)
4274 #define B_DACK_S0P0_OK BIT(31)
4279 #define B_DACK_S0P2_OK BIT(2)
4283 #define B_DACK_S0P1_OK BIT(31)
4288 #define B_DACK_S0P3_OK BIT(2)
4292 #define B_DRCK_IDLE BIT(9)
4293 #define B_DRCK_EN BIT(6)
4297 #define B_DRCK_POL BIT(3)
4306 #define B_ADDCK0_EN BIT(4)
4307 #define B_ADDCK0_RST BIT(2)
4318 #define B_DACK1_EN BIT(0)
4322 #define B_DACK_S1P0_OK BIT(31)
4328 #define B_DACK_S1P2_OK BIT(2)
4332 #define B_DACK_S1P1_OK BIT(31)
4338 #define B_DACK_S1P3_OK BIT(2)
4349 #define B_ADDCK1_EN BIT(4)
4350 #define B_ADDCK1_RST BIT(2)
4361 #define B_AX_WDT_EN BIT(31)
4362 #define B_AX_WDT_OPT_RESET_PLATFORM_EN BIT(29)
4363 #define B_AX_IO_HANG_IMR BIT(27)
4364 #define B_AX_IO_HANG_CMAC_RDATA_EN BIT(26)
4365 #define B_AX_IO_HANG_DMAC_EN BIT(25)
4366 #define B_AX_WDT_CLR BIT(16)
4371 #define B_AX_FS_WDT_INT BIT(8)
4372 #define B_AX_FS_WDT_INT_MSK BIT(0)