Lines Matching refs:rtwdev
22 static int rtw89_pci_rst_bdram_pcie(struct rtw89_dev *rtwdev) in rtw89_pci_rst_bdram_pcie() argument
27 rtw89_write32(rtwdev, R_AX_PCIE_INIT_CFG1, in rtw89_pci_rst_bdram_pcie()
28 rtw89_read32(rtwdev, R_AX_PCIE_INIT_CFG1) | B_AX_RST_BDRAM); in rtw89_pci_rst_bdram_pcie()
32 rtwdev, R_AX_PCIE_INIT_CFG1); in rtw89_pci_rst_bdram_pcie()
40 static u32 rtw89_pci_dma_recalc(struct rtw89_dev *rtwdev, in rtw89_pci_dma_recalc() argument
61 static u32 rtw89_pci_txbd_recalc(struct rtw89_dev *rtwdev, in rtw89_pci_txbd_recalc() argument
68 idx = rtw89_read32(rtwdev, addr_idx); in rtw89_pci_txbd_recalc()
69 cnt = rtw89_pci_dma_recalc(rtwdev, bd_ring, idx, true); in rtw89_pci_txbd_recalc()
74 static void rtw89_pci_release_fwcmd(struct rtw89_dev *rtwdev, in rtw89_pci_release_fwcmd() argument
85 rtw89_err(rtwdev, "failed to pre-release fwcmd\n"); in rtw89_pci_release_fwcmd()
98 rtw89_err(rtwdev, "failed to release fwcmd\n"); in rtw89_pci_release_fwcmd()
108 static void rtw89_pci_reclaim_tx_fwcmd(struct rtw89_dev *rtwdev, in rtw89_pci_reclaim_tx_fwcmd() argument
114 cnt = rtw89_pci_txbd_recalc(rtwdev, tx_ring); in rtw89_pci_reclaim_tx_fwcmd()
117 rtw89_pci_release_fwcmd(rtwdev, rtwpci, cnt, false); in rtw89_pci_reclaim_tx_fwcmd()
120 static u32 rtw89_pci_rxbd_recalc(struct rtw89_dev *rtwdev, in rtw89_pci_rxbd_recalc() argument
127 idx = rtw89_read32(rtwdev, addr_idx); in rtw89_pci_rxbd_recalc()
128 cnt = rtw89_pci_dma_recalc(rtwdev, bd_ring, idx, false); in rtw89_pci_rxbd_recalc()
133 static void rtw89_pci_sync_skb_for_cpu(struct rtw89_dev *rtwdev, in rtw89_pci_sync_skb_for_cpu() argument
141 dma_sync_single_for_cpu(rtwdev->dev, dma, RTW89_PCI_RX_BUF_SIZE, in rtw89_pci_sync_skb_for_cpu()
145 static void rtw89_pci_sync_skb_for_device(struct rtw89_dev *rtwdev, in rtw89_pci_sync_skb_for_device() argument
153 dma_sync_single_for_device(rtwdev->dev, dma, RTW89_PCI_RX_BUF_SIZE, in rtw89_pci_sync_skb_for_device()
157 static int rtw89_pci_rxbd_info_update(struct rtw89_dev *rtwdev, in rtw89_pci_rxbd_info_update() argument
172 static void rtw89_pci_ctrl_txdma_ch_pcie(struct rtw89_dev *rtwdev, bool enable) in rtw89_pci_ctrl_txdma_ch_pcie() argument
174 const struct rtw89_pci_info *info = rtwdev->pci_info; in rtw89_pci_ctrl_txdma_ch_pcie()
179 rtw89_write32_clr(rtwdev, dma_stop1->addr, dma_stop1->mask); in rtw89_pci_ctrl_txdma_ch_pcie()
181 rtw89_write32_clr(rtwdev, dma_stop2->addr, dma_stop2->mask); in rtw89_pci_ctrl_txdma_ch_pcie()
183 rtw89_write32_set(rtwdev, dma_stop1->addr, dma_stop1->mask); in rtw89_pci_ctrl_txdma_ch_pcie()
185 rtw89_write32_set(rtwdev, dma_stop2->addr, dma_stop2->mask); in rtw89_pci_ctrl_txdma_ch_pcie()
190 rtw89_skb_put_rx_data(struct rtw89_dev *rtwdev, bool fs, bool ls, in rtw89_skb_put_rx_data() argument
199 rtw89_debug(rtwdev, RTW89_DBG_TXRX, in rtw89_skb_put_rx_data()
202 rtw89_hex_dump(rtwdev, RTW89_DBG_TXRX, "rx_data: ", in rtw89_skb_put_rx_data()
208 rtw89_info(rtwdev, "drop rx data due to invalid length\n"); in rtw89_skb_put_rx_data()
218 static u32 rtw89_pci_rxbd_deliver_skbs(struct rtw89_dev *rtwdev, in rtw89_pci_rxbd_deliver_skbs() argument
233 rtw89_pci_sync_skb_for_cpu(rtwdev, skb); in rtw89_pci_rxbd_deliver_skbs()
235 ret = rtw89_pci_rxbd_info_update(rtwdev, skb); in rtw89_pci_rxbd_deliver_skbs()
237 rtw89_err(rtwdev, "failed to update %d RXBD info: %d\n", in rtw89_pci_rxbd_deliver_skbs()
248 rtw89_debug(rtwdev, RTW89_DBG_UNEXP, in rtw89_pci_rxbd_deliver_skbs()
253 rtw89_warn(rtwdev, "desc info should not be ready before first segment start\n"); in rtw89_pci_rxbd_deliver_skbs()
257 rtw89_core_query_rxdesc(rtwdev, desc_info, skb->data, rxinfo_size); in rtw89_pci_rxbd_deliver_skbs()
272 rtw89_debug(rtwdev, RTW89_DBG_UNEXP, "no last skb\n"); in rtw89_pci_rxbd_deliver_skbs()
276 if (!rtw89_skb_put_rx_data(rtwdev, fs, ls, new, skb, offset, rx_info, desc_info)) in rtw89_pci_rxbd_deliver_skbs()
278 rtw89_pci_sync_skb_for_device(rtwdev, skb); in rtw89_pci_rxbd_deliver_skbs()
282 rtw89_warn(rtwdev, "no rx desc information\n"); in rtw89_pci_rxbd_deliver_skbs()
286 rtw89_core_rx(rtwdev, desc_info, new); in rtw89_pci_rxbd_deliver_skbs()
294 rtw89_pci_sync_skb_for_device(rtwdev, skb); in rtw89_pci_rxbd_deliver_skbs()
305 static void rtw89_pci_rxbd_deliver(struct rtw89_dev *rtwdev, in rtw89_pci_rxbd_deliver() argument
312 while (cnt && rtwdev->napi_budget_countdown > 0) { in rtw89_pci_rxbd_deliver()
313 rx_cnt = rtw89_pci_rxbd_deliver_skbs(rtwdev, rx_ring); in rtw89_pci_rxbd_deliver()
315 rtw89_err(rtwdev, "failed to deliver RXBD skb\n"); in rtw89_pci_rxbd_deliver()
325 rtw89_write16(rtwdev, bd_ring->addr.idx, bd_ring->wp); in rtw89_pci_rxbd_deliver()
328 static int rtw89_pci_poll_rxq_dma(struct rtw89_dev *rtwdev, in rtw89_pci_poll_rxq_dma() argument
332 int countdown = rtwdev->napi_budget_countdown; in rtw89_pci_poll_rxq_dma()
337 cnt = rtw89_pci_rxbd_recalc(rtwdev, rx_ring); in rtw89_pci_poll_rxq_dma()
343 rtw89_pci_rxbd_deliver(rtwdev, rx_ring, cnt); in rtw89_pci_poll_rxq_dma()
346 if (rtwdev->napi_budget_countdown <= 0) in rtw89_pci_poll_rxq_dma()
352 static void rtw89_pci_tx_status(struct rtw89_dev *rtwdev, in rtw89_pci_tx_status() argument
368 rtw89_debug(rtwdev, RTW89_DBG_FW, in rtw89_pci_tx_status()
381 rtw89_warn(rtwdev, "invalid TX status %x\n", tx_status); in rtw89_pci_tx_status()
386 ieee80211_tx_status_ni(rtwdev->hw, skb); in rtw89_pci_tx_status()
389 static void rtw89_pci_reclaim_txbd(struct rtw89_dev *rtwdev, struct rtw89_pci_tx_ring *tx_ring) in rtw89_pci_reclaim_txbd() argument
394 cnt = rtw89_pci_txbd_recalc(rtwdev, tx_ring); in rtw89_pci_reclaim_txbd()
398 rtw89_warn(rtwdev, "No busy txwd pages available\n"); in rtw89_pci_reclaim_txbd()
410 static void rtw89_pci_release_busy_txwd(struct rtw89_dev *rtwdev, in rtw89_pci_release_busy_txwd() argument
426 static void rtw89_pci_release_txwd_skb(struct rtw89_dev *rtwdev, in rtw89_pci_release_txwd_skb() argument
431 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_release_txwd_skb()
437 rtw89_pci_reclaim_txbd(rtwdev, tx_ring); in rtw89_pci_release_txwd_skb()
442 rtw89_warn(rtwdev, "queue %d txwd %d is not idle\n", in rtw89_pci_release_txwd_skb()
453 rtw89_pci_tx_status(rtwdev, tx_ring, skb, tx_status); in rtw89_pci_release_txwd_skb()
460 static void rtw89_pci_release_rpp(struct rtw89_dev *rtwdev, in rtw89_pci_release_rpp() argument
463 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_release_rpp()
473 txch = rtw89_core_get_ch_dma(rtwdev, qsel); in rtw89_pci_release_rpp()
476 rtw89_warn(rtwdev, "should no fwcmd release report\n"); in rtw89_pci_release_rpp()
484 rtw89_pci_release_txwd_skb(rtwdev, tx_ring, txwd, seq, tx_status); in rtw89_pci_release_rpp()
487 static void rtw89_pci_release_pending_txwd_skb(struct rtw89_dev *rtwdev, in rtw89_pci_release_pending_txwd_skb() argument
500 rtw89_pci_release_txwd_skb(rtwdev, tx_ring, txwd, i, RTW89_TX_MACID_DROP); in rtw89_pci_release_pending_txwd_skb()
504 static u32 rtw89_pci_release_tx_skbs(struct rtw89_dev *rtwdev, in rtw89_pci_release_tx_skbs() argument
520 rtw89_pci_sync_skb_for_cpu(rtwdev, skb); in rtw89_pci_release_tx_skbs()
522 ret = rtw89_pci_rxbd_info_update(rtwdev, skb); in rtw89_pci_release_tx_skbs()
524 rtw89_err(rtwdev, "failed to update %d RXBD info: %d\n", in rtw89_pci_release_tx_skbs()
531 rtw89_err(rtwdev, "cannot process RP frame not set FS/LS\n"); in rtw89_pci_release_tx_skbs()
535 rtw89_core_query_rxdesc(rtwdev, &desc_info, skb->data, rxinfo_size); in rtw89_pci_release_tx_skbs()
543 rtw89_pci_release_rpp(rtwdev, rpp); in rtw89_pci_release_tx_skbs()
546 rtw89_pci_sync_skb_for_device(rtwdev, skb); in rtw89_pci_release_tx_skbs()
553 rtw89_pci_sync_skb_for_device(rtwdev, skb); in rtw89_pci_release_tx_skbs()
557 static void rtw89_pci_release_tx(struct rtw89_dev *rtwdev, in rtw89_pci_release_tx() argument
565 release_cnt = rtw89_pci_release_tx_skbs(rtwdev, rx_ring, cnt); in rtw89_pci_release_tx()
567 rtw89_err(rtwdev, "failed to release TX skbs\n"); in rtw89_pci_release_tx()
577 rtw89_write16(rtwdev, bd_ring->addr.idx, bd_ring->wp); in rtw89_pci_release_tx()
580 static int rtw89_pci_poll_rpq_dma(struct rtw89_dev *rtwdev, in rtw89_pci_poll_rpq_dma() argument
591 cnt = rtw89_pci_rxbd_recalc(rtwdev, rx_ring); in rtw89_pci_poll_rpq_dma()
595 rtw89_pci_release_tx(rtwdev, rx_ring, cnt); in rtw89_pci_poll_rpq_dma()
602 rtwdev->napi_budget_countdown -= work_done; in rtw89_pci_poll_rpq_dma()
607 static void rtw89_pci_isr_rxd_unavail(struct rtw89_dev *rtwdev, in rtw89_pci_isr_rxd_unavail() argument
620 reg_idx = rtw89_read32(rtwdev, bd_ring->addr.idx); in rtw89_pci_isr_rxd_unavail()
626 rtw89_debug(rtwdev, RTW89_DBG_UNEXP, "%d RXD unavailable\n", i); in rtw89_pci_isr_rxd_unavail()
628 rtw89_debug(rtwdev, RTW89_DBG_TXRX, in rtw89_pci_isr_rxd_unavail()
634 void rtw89_pci_recognize_intrs(struct rtw89_dev *rtwdev, in rtw89_pci_recognize_intrs() argument
638 isrs->halt_c2h_isrs = rtw89_read32(rtwdev, R_AX_HISR0) & rtwpci->halt_c2h_intrs; in rtw89_pci_recognize_intrs()
639 isrs->isrs[0] = rtw89_read32(rtwdev, R_AX_PCIE_HISR00) & rtwpci->intrs[0]; in rtw89_pci_recognize_intrs()
640 isrs->isrs[1] = rtw89_read32(rtwdev, R_AX_PCIE_HISR10) & rtwpci->intrs[1]; in rtw89_pci_recognize_intrs()
642 rtw89_write32(rtwdev, R_AX_HISR0, isrs->halt_c2h_isrs); in rtw89_pci_recognize_intrs()
643 rtw89_write32(rtwdev, R_AX_PCIE_HISR00, isrs->isrs[0]); in rtw89_pci_recognize_intrs()
644 rtw89_write32(rtwdev, R_AX_PCIE_HISR10, isrs->isrs[1]); in rtw89_pci_recognize_intrs()
648 void rtw89_pci_recognize_intrs_v1(struct rtw89_dev *rtwdev, in rtw89_pci_recognize_intrs_v1() argument
652 isrs->ind_isrs = rtw89_read32(rtwdev, R_AX_PCIE_HISR00_V1) & rtwpci->ind_intrs; in rtw89_pci_recognize_intrs_v1()
654 rtw89_read32(rtwdev, R_AX_HISR0) & rtwpci->halt_c2h_intrs : 0; in rtw89_pci_recognize_intrs_v1()
656 rtw89_read32(rtwdev, R_AX_HAXI_HISR00) & rtwpci->intrs[0] : 0; in rtw89_pci_recognize_intrs_v1()
658 rtw89_read32(rtwdev, R_AX_HISR1) & rtwpci->intrs[1] : 0; in rtw89_pci_recognize_intrs_v1()
661 rtw89_write32(rtwdev, R_AX_HISR0, isrs->halt_c2h_isrs); in rtw89_pci_recognize_intrs_v1()
663 rtw89_write32(rtwdev, R_AX_HAXI_HISR00, isrs->isrs[0]); in rtw89_pci_recognize_intrs_v1()
665 rtw89_write32(rtwdev, R_AX_HISR1, isrs->isrs[1]); in rtw89_pci_recognize_intrs_v1()
669 static void rtw89_pci_clear_isr0(struct rtw89_dev *rtwdev, u32 isr00) in rtw89_pci_clear_isr0() argument
672 rtw89_write32(rtwdev, R_AX_PCIE_HISR00, isr00); in rtw89_pci_clear_isr0()
675 void rtw89_pci_enable_intr(struct rtw89_dev *rtwdev, struct rtw89_pci *rtwpci) in rtw89_pci_enable_intr() argument
677 rtw89_write32(rtwdev, R_AX_HIMR0, rtwpci->halt_c2h_intrs); in rtw89_pci_enable_intr()
678 rtw89_write32(rtwdev, R_AX_PCIE_HIMR00, rtwpci->intrs[0]); in rtw89_pci_enable_intr()
679 rtw89_write32(rtwdev, R_AX_PCIE_HIMR10, rtwpci->intrs[1]); in rtw89_pci_enable_intr()
683 void rtw89_pci_disable_intr(struct rtw89_dev *rtwdev, struct rtw89_pci *rtwpci) in rtw89_pci_disable_intr() argument
685 rtw89_write32(rtwdev, R_AX_HIMR0, 0); in rtw89_pci_disable_intr()
686 rtw89_write32(rtwdev, R_AX_PCIE_HIMR00, 0); in rtw89_pci_disable_intr()
687 rtw89_write32(rtwdev, R_AX_PCIE_HIMR10, 0); in rtw89_pci_disable_intr()
691 void rtw89_pci_enable_intr_v1(struct rtw89_dev *rtwdev, struct rtw89_pci *rtwpci) in rtw89_pci_enable_intr_v1() argument
693 rtw89_write32(rtwdev, R_AX_PCIE_HIMR00_V1, rtwpci->ind_intrs); in rtw89_pci_enable_intr_v1()
694 rtw89_write32(rtwdev, R_AX_HIMR0, rtwpci->halt_c2h_intrs); in rtw89_pci_enable_intr_v1()
695 rtw89_write32(rtwdev, R_AX_HAXI_HIMR00, rtwpci->intrs[0]); in rtw89_pci_enable_intr_v1()
696 rtw89_write32(rtwdev, R_AX_HIMR1, rtwpci->intrs[1]); in rtw89_pci_enable_intr_v1()
700 void rtw89_pci_disable_intr_v1(struct rtw89_dev *rtwdev, struct rtw89_pci *rtwpci) in rtw89_pci_disable_intr_v1() argument
702 rtw89_write32(rtwdev, R_AX_PCIE_HIMR00_V1, 0); in rtw89_pci_disable_intr_v1()
706 static void rtw89_pci_ops_recovery_start(struct rtw89_dev *rtwdev) in rtw89_pci_ops_recovery_start() argument
708 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_ops_recovery_start()
712 rtw89_chip_disable_intr(rtwdev, rtwpci); in rtw89_pci_ops_recovery_start()
713 rtw89_chip_config_intr_mask(rtwdev, RTW89_PCI_INTR_MASK_RECOVERY_START); in rtw89_pci_ops_recovery_start()
714 rtw89_chip_enable_intr(rtwdev, rtwpci); in rtw89_pci_ops_recovery_start()
718 static void rtw89_pci_ops_recovery_complete(struct rtw89_dev *rtwdev) in rtw89_pci_ops_recovery_complete() argument
720 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_ops_recovery_complete()
724 rtw89_chip_disable_intr(rtwdev, rtwpci); in rtw89_pci_ops_recovery_complete()
725 rtw89_chip_config_intr_mask(rtwdev, RTW89_PCI_INTR_MASK_RECOVERY_COMPLETE); in rtw89_pci_ops_recovery_complete()
726 rtw89_chip_enable_intr(rtwdev, rtwpci); in rtw89_pci_ops_recovery_complete()
730 static void rtw89_pci_low_power_interrupt_handler(struct rtw89_dev *rtwdev) in rtw89_pci_low_power_interrupt_handler() argument
732 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_low_power_interrupt_handler()
736 rtwdev->napi_budget_countdown = budget; in rtw89_pci_low_power_interrupt_handler()
738 rtw89_pci_poll_rpq_dma(rtwdev, rtwpci, budget); in rtw89_pci_low_power_interrupt_handler()
739 rtw89_pci_poll_rxq_dma(rtwdev, rtwpci, budget); in rtw89_pci_low_power_interrupt_handler()
744 struct rtw89_dev *rtwdev = dev; in rtw89_pci_interrupt_threadfn() local
745 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_interrupt_threadfn()
750 rtw89_chip_recognize_intrs(rtwdev, rtwpci, &isrs); in rtw89_pci_interrupt_threadfn()
754 rtw89_pci_isr_rxd_unavail(rtwdev, rtwpci); in rtw89_pci_interrupt_threadfn()
757 rtw89_ser_notify(rtwdev, rtw89_mac_get_err_status(rtwdev)); in rtw89_pci_interrupt_threadfn()
760 rtw89_ser_notify(rtwdev, MAC_AX_ERR_L2_ERR_WDT_TIMEOUT_INT); in rtw89_pci_interrupt_threadfn()
766 rtw89_pci_low_power_interrupt_handler(rtwdev); in rtw89_pci_interrupt_threadfn()
772 napi_schedule(&rtwdev->napi); in rtw89_pci_interrupt_threadfn()
781 rtw89_chip_enable_intr(rtwdev, rtwpci); in rtw89_pci_interrupt_threadfn()
788 struct rtw89_dev *rtwdev = dev; in rtw89_pci_interrupt_handler() local
789 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_interrupt_handler()
803 rtw89_chip_disable_intr(rtwdev, rtwpci); in rtw89_pci_interrupt_handler()
886 static int rtw89_pci_get_txch_addrs(struct rtw89_dev *rtwdev, in rtw89_pci_get_txch_addrs() argument
890 const struct rtw89_pci_info *info = rtwdev->pci_info; in rtw89_pci_get_txch_addrs()
900 static int rtw89_pci_get_rxch_addrs(struct rtw89_dev *rtwdev, in rtw89_pci_get_rxch_addrs() argument
904 const struct rtw89_pci_info *info = rtwdev->pci_info; in rtw89_pci_get_rxch_addrs()
926 u32 __rtw89_pci_check_and_reclaim_tx_fwcmd_resource(struct rtw89_dev *rtwdev) in __rtw89_pci_check_and_reclaim_tx_fwcmd_resource() argument
928 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in __rtw89_pci_check_and_reclaim_tx_fwcmd_resource()
933 rtw89_pci_reclaim_tx_fwcmd(rtwdev, rtwpci); in __rtw89_pci_check_and_reclaim_tx_fwcmd_resource()
941 u32 __rtw89_pci_check_and_reclaim_tx_resource_noio(struct rtw89_dev *rtwdev, in __rtw89_pci_check_and_reclaim_tx_resource_noio() argument
944 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in __rtw89_pci_check_and_reclaim_tx_resource_noio()
957 static u32 __rtw89_pci_check_and_reclaim_tx_resource(struct rtw89_dev *rtwdev, in __rtw89_pci_check_and_reclaim_tx_resource() argument
960 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in __rtw89_pci_check_and_reclaim_tx_resource()
974 cnt = rtw89_pci_rxbd_recalc(rtwdev, rx_ring); in __rtw89_pci_check_and_reclaim_tx_resource()
976 rtw89_pci_release_tx(rtwdev, rx_ring, cnt); in __rtw89_pci_check_and_reclaim_tx_resource()
982 rtw89_pci_reclaim_txbd(rtwdev, tx_ring); in __rtw89_pci_check_and_reclaim_tx_resource()
989 rtw89_debug(rtwdev, rtwpci->low_power ? RTW89_DBG_TXRX : RTW89_DBG_UNEXP, in __rtw89_pci_check_and_reclaim_tx_resource()
999 static u32 rtw89_pci_check_and_reclaim_tx_resource(struct rtw89_dev *rtwdev, in rtw89_pci_check_and_reclaim_tx_resource() argument
1002 if (rtwdev->hci.paused) in rtw89_pci_check_and_reclaim_tx_resource()
1003 return __rtw89_pci_check_and_reclaim_tx_resource_noio(rtwdev, txch); in rtw89_pci_check_and_reclaim_tx_resource()
1006 return __rtw89_pci_check_and_reclaim_tx_fwcmd_resource(rtwdev); in rtw89_pci_check_and_reclaim_tx_resource()
1008 return __rtw89_pci_check_and_reclaim_tx_resource(rtwdev, txch); in rtw89_pci_check_and_reclaim_tx_resource()
1011 static void __rtw89_pci_tx_kick_off(struct rtw89_dev *rtwdev, struct rtw89_pci_tx_ring *tx_ring) in __rtw89_pci_tx_kick_off() argument
1013 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in __rtw89_pci_tx_kick_off()
1021 rtw89_write16(rtwdev, addr, host_idx); in __rtw89_pci_tx_kick_off()
1026 static void rtw89_pci_tx_bd_ring_update(struct rtw89_dev *rtwdev, struct rtw89_pci_tx_ring *tx_ring, in rtw89_pci_tx_bd_ring_update() argument
1039 static void rtw89_pci_ops_tx_kick_off(struct rtw89_dev *rtwdev, u8 txch) in rtw89_pci_ops_tx_kick_off() argument
1041 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_ops_tx_kick_off()
1044 if (rtwdev->hci.paused) { in rtw89_pci_ops_tx_kick_off()
1049 __rtw89_pci_tx_kick_off(rtwdev, tx_ring); in rtw89_pci_ops_tx_kick_off()
1052 static void rtw89_pci_tx_kick_off_pending(struct rtw89_dev *rtwdev) in rtw89_pci_tx_kick_off_pending() argument
1054 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_tx_kick_off_pending()
1063 __rtw89_pci_tx_kick_off(rtwdev, tx_ring); in rtw89_pci_tx_kick_off_pending()
1067 static void __pci_flush_txch(struct rtw89_dev *rtwdev, u8 txch, bool drop) in __pci_flush_txch() argument
1069 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in __pci_flush_txch()
1081 cur_idx = rtw89_read32(rtwdev, bd_ring->addr.idx); in __pci_flush_txch()
1090 rtw89_info(rtwdev, "timed out to flush pci txch: %d\n", txch); in __pci_flush_txch()
1093 static void __rtw89_pci_ops_flush_txchs(struct rtw89_dev *rtwdev, u32 txchs, in __rtw89_pci_ops_flush_txchs() argument
1096 const struct rtw89_pci_info *info = rtwdev->pci_info; in __rtw89_pci_ops_flush_txchs()
1107 __pci_flush_txch(rtwdev, i, drop); in __rtw89_pci_ops_flush_txchs()
1111 static void rtw89_pci_ops_flush_queues(struct rtw89_dev *rtwdev, u32 queues, in rtw89_pci_ops_flush_queues() argument
1114 __rtw89_pci_ops_flush_txchs(rtwdev, BIT(RTW89_TXCH_NUM) - 1, drop); in rtw89_pci_ops_flush_queues()
1117 u32 rtw89_pci_fill_txaddr_info(struct rtw89_dev *rtwdev, in rtw89_pci_fill_txaddr_info() argument
1134 u32 rtw89_pci_fill_txaddr_info_v1(struct rtw89_dev *rtwdev, in rtw89_pci_fill_txaddr_info_v1() argument
1169 static int rtw89_pci_txwd_submit(struct rtw89_dev *rtwdev, in rtw89_pci_txwd_submit() argument
1174 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_txwd_submit()
1175 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_pci_txwd_submit()
1192 rtw89_err(rtwdev, "failed to map skb dma data\n"); in rtw89_pci_txwd_submit()
1212 rtw89_chip_fill_txaddr_info(rtwdev, txaddr_info_addr, skb->len, in rtw89_pci_txwd_submit()
1217 rtw89_chip_fill_txdesc(rtwdev, desc_info, txwd->vaddr); in rtw89_pci_txwd_submit()
1227 static int rtw89_pci_fwcmd_submit(struct rtw89_dev *rtwdev, in rtw89_pci_fwcmd_submit() argument
1232 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_fwcmd_submit()
1233 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_pci_fwcmd_submit()
1244 rtw89_chip_fill_txdesc_fwcmd(rtwdev, desc_info, txdesc); in rtw89_pci_fwcmd_submit()
1248 rtw89_err(rtwdev, "failed to map fwcmd dma data\n"); in rtw89_pci_fwcmd_submit()
1258 rtw89_pci_tx_bd_ring_update(rtwdev, tx_ring, 1); in rtw89_pci_fwcmd_submit()
1263 static int rtw89_pci_txbd_submit(struct rtw89_dev *rtwdev, in rtw89_pci_txbd_submit() argument
1276 return rtw89_pci_fwcmd_submit(rtwdev, tx_ring, txbd, tx_req); in rtw89_pci_txbd_submit()
1280 rtw89_err(rtwdev, "no available TXWD\n"); in rtw89_pci_txbd_submit()
1285 ret = rtw89_pci_txwd_submit(rtwdev, tx_ring, txwd, tx_req); in rtw89_pci_txbd_submit()
1287 rtw89_err(rtwdev, "failed to submit TXWD %d\n", txwd->seq); in rtw89_pci_txbd_submit()
1297 rtw89_pci_tx_bd_ring_update(rtwdev, tx_ring, 1); in rtw89_pci_txbd_submit()
1307 static int rtw89_pci_tx_write(struct rtw89_dev *rtwdev, struct rtw89_core_tx_request *tx_req, in rtw89_pci_tx_write() argument
1310 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_tx_write()
1321 rtw89_err(rtwdev, "only fw cmd uses dma channel 12\n"); in rtw89_pci_tx_write()
1330 rtw89_err(rtwdev, "no available TXBD\n"); in rtw89_pci_tx_write()
1336 ret = rtw89_pci_txbd_submit(rtwdev, tx_ring, txbd, tx_req); in rtw89_pci_tx_write()
1338 rtw89_err(rtwdev, "failed to submit TXBD\n"); in rtw89_pci_tx_write()
1350 static int rtw89_pci_ops_tx_write(struct rtw89_dev *rtwdev, struct rtw89_core_tx_request *tx_req) in rtw89_pci_ops_tx_write() argument
1355 ret = rtw89_pci_tx_write(rtwdev, tx_req, desc_info->ch_dma); in rtw89_pci_ops_tx_write()
1357 rtw89_err(rtwdev, "failed to TX Queue %d\n", desc_info->ch_dma); in rtw89_pci_ops_tx_write()
1380 static void rtw89_pci_reset_trx_rings(struct rtw89_dev *rtwdev) in rtw89_pci_reset_trx_rings() argument
1382 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_reset_trx_rings()
1383 const struct rtw89_pci_info *info = rtwdev->pci_info; in rtw89_pci_reset_trx_rings()
1411 rtw89_write16(rtwdev, addr_num, bd_ring->len); in rtw89_pci_reset_trx_rings()
1412 rtw89_write32(rtwdev, addr_bdram, val32); in rtw89_pci_reset_trx_rings()
1413 rtw89_write32(rtwdev, addr_desa_l, bd_ring->dma); in rtw89_pci_reset_trx_rings()
1426 rtw89_write16(rtwdev, addr_num, bd_ring->len); in rtw89_pci_reset_trx_rings()
1427 rtw89_write32(rtwdev, addr_desa_l, bd_ring->dma); in rtw89_pci_reset_trx_rings()
1431 static void rtw89_pci_release_tx_ring(struct rtw89_dev *rtwdev, in rtw89_pci_release_tx_ring() argument
1434 rtw89_pci_release_busy_txwd(rtwdev, tx_ring); in rtw89_pci_release_tx_ring()
1435 rtw89_pci_release_pending_txwd_skb(rtwdev, tx_ring); in rtw89_pci_release_tx_ring()
1438 static void rtw89_pci_ops_reset(struct rtw89_dev *rtwdev) in rtw89_pci_ops_reset() argument
1440 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_ops_reset()
1441 const struct rtw89_pci_info *info = rtwdev->pci_info; in rtw89_pci_ops_reset()
1444 rtw89_pci_reset_trx_rings(rtwdev); in rtw89_pci_ops_reset()
1451 rtw89_pci_release_fwcmd(rtwdev, rtwpci, in rtw89_pci_ops_reset()
1455 rtw89_pci_release_tx_ring(rtwdev, &rtwpci->tx_rings[txch]); in rtw89_pci_ops_reset()
1460 static void rtw89_pci_enable_intr_lock(struct rtw89_dev *rtwdev) in rtw89_pci_enable_intr_lock() argument
1462 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_enable_intr_lock()
1467 rtw89_chip_enable_intr(rtwdev, rtwpci); in rtw89_pci_enable_intr_lock()
1471 static void rtw89_pci_disable_intr_lock(struct rtw89_dev *rtwdev) in rtw89_pci_disable_intr_lock() argument
1473 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_disable_intr_lock()
1478 rtw89_chip_disable_intr(rtwdev, rtwpci); in rtw89_pci_disable_intr_lock()
1482 static int rtw89_pci_ops_start(struct rtw89_dev *rtwdev) in rtw89_pci_ops_start() argument
1484 rtw89_core_napi_start(rtwdev); in rtw89_pci_ops_start()
1485 rtw89_pci_enable_intr_lock(rtwdev); in rtw89_pci_ops_start()
1490 static void rtw89_pci_ops_stop(struct rtw89_dev *rtwdev) in rtw89_pci_ops_stop() argument
1492 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_ops_stop()
1495 rtw89_pci_disable_intr_lock(rtwdev); in rtw89_pci_ops_stop()
1497 rtw89_core_napi_stop(rtwdev); in rtw89_pci_ops_stop()
1500 static void rtw89_pci_ops_pause(struct rtw89_dev *rtwdev, bool pause) in rtw89_pci_ops_pause() argument
1502 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_ops_pause()
1506 rtw89_pci_disable_intr_lock(rtwdev); in rtw89_pci_ops_pause()
1508 if (test_bit(RTW89_FLAG_NAPI_RUNNING, rtwdev->flags)) in rtw89_pci_ops_pause()
1509 napi_synchronize(&rtwdev->napi); in rtw89_pci_ops_pause()
1511 rtw89_pci_enable_intr_lock(rtwdev); in rtw89_pci_ops_pause()
1512 rtw89_pci_tx_kick_off_pending(rtwdev); in rtw89_pci_ops_pause()
1517 void rtw89_pci_switch_bd_idx_addr(struct rtw89_dev *rtwdev, bool low_power) in rtw89_pci_switch_bd_idx_addr() argument
1519 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_switch_bd_idx_addr()
1520 const struct rtw89_pci_info *info = rtwdev->pci_info; in rtw89_pci_switch_bd_idx_addr()
1545 static void rtw89_pci_ops_switch_mode(struct rtw89_dev *rtwdev, bool low_power) in rtw89_pci_ops_switch_mode() argument
1549 WARN(!rtwdev->hci.paused, "HCI isn't paused\n"); in rtw89_pci_ops_switch_mode()
1552 rtw89_chip_config_intr_mask(rtwdev, cfg); in rtw89_pci_ops_switch_mode()
1553 rtw89_pci_switch_bd_idx_addr(rtwdev, low_power); in rtw89_pci_ops_switch_mode()
1556 static void rtw89_pci_ops_write32(struct rtw89_dev *rtwdev, u32 addr, u32 data);
1558 static u32 rtw89_pci_ops_read32_cmac(struct rtw89_dev *rtwdev, u32 addr) in rtw89_pci_ops_read32_cmac() argument
1560 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_ops_read32_cmac()
1568 rtw89_warn(rtwdev, "addr %#x = %#x\n", addr, val); in rtw89_pci_ops_read32_cmac()
1571 rtw89_pci_ops_write32(rtwdev, R_AX_CK_EN, B_AX_CMAC_ALLCKEN); in rtw89_pci_ops_read32_cmac()
1578 static u8 rtw89_pci_ops_read8(struct rtw89_dev *rtwdev, u32 addr) in rtw89_pci_ops_read8() argument
1580 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_ops_read8()
1588 val32 = rtw89_pci_ops_read32_cmac(rtwdev, addr32); in rtw89_pci_ops_read8()
1592 static u16 rtw89_pci_ops_read16(struct rtw89_dev *rtwdev, u32 addr) in rtw89_pci_ops_read16() argument
1594 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_ops_read16()
1602 val32 = rtw89_pci_ops_read32_cmac(rtwdev, addr32); in rtw89_pci_ops_read16()
1606 static u32 rtw89_pci_ops_read32(struct rtw89_dev *rtwdev, u32 addr) in rtw89_pci_ops_read32() argument
1608 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_ops_read32()
1613 return rtw89_pci_ops_read32_cmac(rtwdev, addr); in rtw89_pci_ops_read32()
1616 static void rtw89_pci_ops_write8(struct rtw89_dev *rtwdev, u32 addr, u8 data) in rtw89_pci_ops_write8() argument
1618 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_ops_write8()
1623 static void rtw89_pci_ops_write16(struct rtw89_dev *rtwdev, u32 addr, u16 data) in rtw89_pci_ops_write16() argument
1625 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_ops_write16()
1630 static void rtw89_pci_ops_write32(struct rtw89_dev *rtwdev, u32 addr, u32 data) in rtw89_pci_ops_write32() argument
1632 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_ops_write32()
1637 static void rtw89_pci_ctrl_dma_trx(struct rtw89_dev *rtwdev, bool enable) in rtw89_pci_ctrl_dma_trx() argument
1639 const struct rtw89_pci_info *info = rtwdev->pci_info; in rtw89_pci_ctrl_dma_trx()
1642 rtw89_write32_set(rtwdev, info->init_cfg_reg, in rtw89_pci_ctrl_dma_trx()
1645 rtw89_write32_clr(rtwdev, info->init_cfg_reg, in rtw89_pci_ctrl_dma_trx()
1649 static void rtw89_pci_ctrl_dma_io(struct rtw89_dev *rtwdev, bool enable) in rtw89_pci_ctrl_dma_io() argument
1651 enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; in rtw89_pci_ctrl_dma_io()
1663 rtw89_write32_clr(rtwdev, reg, mask); in rtw89_pci_ctrl_dma_io()
1665 rtw89_write32_set(rtwdev, reg, mask); in rtw89_pci_ctrl_dma_io()
1668 static void rtw89_pci_ctrl_dma_all(struct rtw89_dev *rtwdev, bool enable) in rtw89_pci_ctrl_dma_all() argument
1670 rtw89_pci_ctrl_dma_io(rtwdev, enable); in rtw89_pci_ctrl_dma_all()
1671 rtw89_pci_ctrl_dma_trx(rtwdev, enable); in rtw89_pci_ctrl_dma_all()
1674 static int rtw89_pci_check_mdio(struct rtw89_dev *rtwdev, u8 addr, u8 speed, u16 rw_bit) in rtw89_pci_check_mdio() argument
1678 rtw89_write8(rtwdev, R_AX_MDIO_CFG, addr & 0x1F); in rtw89_pci_check_mdio()
1680 val = rtw89_read16(rtwdev, R_AX_MDIO_CFG); in rtw89_pci_check_mdio()
1695 rtw89_err(rtwdev, "[ERR]Error Speed %d!\n", speed); in rtw89_pci_check_mdio()
1698 rtw89_write16(rtwdev, R_AX_MDIO_CFG, val); in rtw89_pci_check_mdio()
1699 rtw89_write16_set(rtwdev, R_AX_MDIO_CFG, rw_bit); in rtw89_pci_check_mdio()
1702 false, rtwdev, R_AX_MDIO_CFG); in rtw89_pci_check_mdio()
1706 rtw89_read16_mdio(struct rtw89_dev *rtwdev, u8 addr, u8 speed, u16 *val) in rtw89_read16_mdio() argument
1710 ret = rtw89_pci_check_mdio(rtwdev, addr, speed, B_AX_MDIO_RFLAG); in rtw89_read16_mdio()
1712 rtw89_err(rtwdev, "[ERR]MDIO R16 0x%X fail ret=%d!\n", addr, ret); in rtw89_read16_mdio()
1715 *val = rtw89_read16(rtwdev, R_AX_MDIO_RDATA); in rtw89_read16_mdio()
1721 rtw89_write16_mdio(struct rtw89_dev *rtwdev, u8 addr, u16 data, u8 speed) in rtw89_write16_mdio() argument
1725 rtw89_write16(rtwdev, R_AX_MDIO_WDATA, data); in rtw89_write16_mdio()
1726 ret = rtw89_pci_check_mdio(rtwdev, addr, speed, B_AX_MDIO_WFLAG); in rtw89_write16_mdio()
1728 rtw89_err(rtwdev, "[ERR]MDIO W16 0x%X = %x fail ret=%d!\n", addr, data, ret); in rtw89_write16_mdio()
1736 rtw89_write16_mdio_mask(struct rtw89_dev *rtwdev, u8 addr, u16 mask, u16 data, u8 speed) in rtw89_write16_mdio_mask() argument
1742 ret = rtw89_read16_mdio(rtwdev, addr, speed, &val); in rtw89_write16_mdio_mask()
1750 ret = rtw89_write16_mdio(rtwdev, addr, val, speed); in rtw89_write16_mdio_mask()
1757 static int rtw89_write16_mdio_set(struct rtw89_dev *rtwdev, u8 addr, u16 mask, u8 speed) in rtw89_write16_mdio_set() argument
1762 ret = rtw89_read16_mdio(rtwdev, addr, speed, &val); in rtw89_write16_mdio_set()
1765 ret = rtw89_write16_mdio(rtwdev, addr, val | mask, speed); in rtw89_write16_mdio_set()
1772 static int rtw89_write16_mdio_clr(struct rtw89_dev *rtwdev, u8 addr, u16 mask, u8 speed) in rtw89_write16_mdio_clr() argument
1777 ret = rtw89_read16_mdio(rtwdev, addr, speed, &val); in rtw89_write16_mdio_clr()
1780 ret = rtw89_write16_mdio(rtwdev, addr, val & ~mask, speed); in rtw89_write16_mdio_clr()
1787 static int rtw89_pci_write_config_byte(struct rtw89_dev *rtwdev, u16 addr, in rtw89_pci_write_config_byte() argument
1790 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_write_config_byte()
1796 static int rtw89_pci_read_config_byte(struct rtw89_dev *rtwdev, u16 addr, in rtw89_pci_read_config_byte() argument
1799 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_read_config_byte()
1805 static int rtw89_pci_config_byte_set(struct rtw89_dev *rtwdev, u16 addr, in rtw89_pci_config_byte_set() argument
1811 ret = rtw89_pci_read_config_byte(rtwdev, addr, &value); in rtw89_pci_config_byte_set()
1816 ret = rtw89_pci_write_config_byte(rtwdev, addr, value); in rtw89_pci_config_byte_set()
1821 static int rtw89_pci_config_byte_clr(struct rtw89_dev *rtwdev, u16 addr, in rtw89_pci_config_byte_clr() argument
1827 ret = rtw89_pci_read_config_byte(rtwdev, addr, &value); in rtw89_pci_config_byte_clr()
1832 ret = rtw89_pci_write_config_byte(rtwdev, addr, value); in rtw89_pci_config_byte_clr()
1838 __get_target(struct rtw89_dev *rtwdev, u16 *target, enum rtw89_pcie_phy phy_rate) in __get_target() argument
1844 ret = rtw89_read16_mdio(rtwdev, RAC_CTRL_PPR_V1, phy_rate, &val); in __get_target()
1847 ret = rtw89_write16_mdio(rtwdev, RAC_CTRL_PPR_V1, val & ~B_AX_CLK_CALIB_EN, in __get_target()
1851 ret = rtw89_write16_mdio(rtwdev, RAC_CTRL_PPR_V1, val | B_AX_CLK_CALIB_EN, in __get_target()
1858 ret = rtw89_read16_mdio(rtwdev, RAC_CTRL_PPR_V1, phy_rate, &tar); in __get_target()
1861 ret = rtw89_write16_mdio(rtwdev, RAC_CTRL_PPR_V1, val & ~B_AX_CLK_CALIB_EN, in __get_target()
1868 rtw89_err(rtwdev, "[ERR]Get target failed.\n"); in __get_target()
1877 static int rtw89_pci_autok_x(struct rtw89_dev *rtwdev) in rtw89_pci_autok_x() argument
1881 if (rtwdev->chip->chip_id != RTL8852B) in rtw89_pci_autok_x()
1884 ret = rtw89_write16_mdio_mask(rtwdev, RAC_REG_FLD_0, BAC_AUTOK_N_MASK, in rtw89_pci_autok_x()
1889 static int rtw89_pci_auto_refclk_cal(struct rtw89_dev *rtwdev, bool autook_en) in rtw89_pci_auto_refclk_cal() argument
1897 if (rtwdev->chip->chip_id != RTL8852B) in rtw89_pci_auto_refclk_cal()
1900 ret = rtw89_pci_read_config_byte(rtwdev, RTW89_PCIE_PHY_RATE, &val8); in rtw89_pci_auto_refclk_cal()
1902 rtw89_err(rtwdev, "[ERR]pci config read %X\n", in rtw89_pci_auto_refclk_cal()
1912 rtw89_err(rtwdev, "[ERR]PCIe PHY rate %#x not support\n", val8); in rtw89_pci_auto_refclk_cal()
1916 ret = rtw89_pci_read_config_byte(rtwdev, RTW89_PCIE_L1_CTRL, &bdr_ori); in rtw89_pci_auto_refclk_cal()
1918 rtw89_err(rtwdev, "[ERR]pci config read %X\n", RTW89_PCIE_L1_CTRL); in rtw89_pci_auto_refclk_cal()
1923 ret = rtw89_pci_write_config_byte(rtwdev, RTW89_PCIE_L1_CTRL, in rtw89_pci_auto_refclk_cal()
1926 rtw89_err(rtwdev, "[ERR]pci config write %X\n", in rtw89_pci_auto_refclk_cal()
1933 ret = rtw89_read16_mdio(rtwdev, RAC_CTRL_PPR_V1, phy_rate, &val16); in rtw89_pci_auto_refclk_cal()
1935 rtw89_err(rtwdev, "[ERR]mdio_r16_pcie %X\n", RAC_CTRL_PPR_V1); in rtw89_pci_auto_refclk_cal()
1940 ret = rtw89_write16_mdio(rtwdev, RAC_CTRL_PPR_V1, in rtw89_pci_auto_refclk_cal()
1943 rtw89_err(rtwdev, "[ERR]mdio_w16_pcie %X\n", RAC_CTRL_PPR_V1); in rtw89_pci_auto_refclk_cal()
1951 ret = rtw89_write16_mdio_clr(rtwdev, RAC_CTRL_PPR_V1, B_AX_DIV, phy_rate); in rtw89_pci_auto_refclk_cal()
1953 rtw89_err(rtwdev, "[ERR]mdio_w16_pcie %X\n", RAC_CTRL_PPR_V1); in rtw89_pci_auto_refclk_cal()
1958 ret = __get_target(rtwdev, &tar, phy_rate); in rtw89_pci_auto_refclk_cal()
1960 rtw89_err(rtwdev, "[ERR]1st get target fail %d\n", ret); in rtw89_pci_auto_refclk_cal()
1979 rtw89_err(rtwdev, "[ERR]cal mgn is 0,tar = %d\n", tar); in rtw89_pci_auto_refclk_cal()
1985 ret = rtw89_read16_mdio(rtwdev, RAC_CTRL_PPR_V1, phy_rate, &val16); in rtw89_pci_auto_refclk_cal()
1987 rtw89_err(rtwdev, "[ERR]mdio_r16_pcie %X\n", RAC_CTRL_PPR_V1); in rtw89_pci_auto_refclk_cal()
1993 ret = rtw89_write16_mdio(rtwdev, RAC_CTRL_PPR_V1, val16, phy_rate); in rtw89_pci_auto_refclk_cal()
1995 rtw89_err(rtwdev, "[ERR]mdio_w16_pcie %X\n", RAC_CTRL_PPR_V1); in rtw89_pci_auto_refclk_cal()
1999 ret = __get_target(rtwdev, &tar, phy_rate); in rtw89_pci_auto_refclk_cal()
2001 rtw89_err(rtwdev, "[ERR]2nd get target fail %d\n", ret); in rtw89_pci_auto_refclk_cal()
2005 rtw89_debug(rtwdev, RTW89_DBG_HCI, "[TRACE]target = 0x%X, div = 0x%X, margin = 0x%X\n", in rtw89_pci_auto_refclk_cal()
2007 ret = rtw89_write16_mdio(rtwdev, RAC_SET_PPR_V1, in rtw89_pci_auto_refclk_cal()
2010 rtw89_err(rtwdev, "[ERR]mdio_w16_pcie %X\n", RAC_SET_PPR_V1); in rtw89_pci_auto_refclk_cal()
2015 ret = rtw89_write16_mdio_set(rtwdev, RAC_CTRL_PPR_V1, B_AX_CALIB_EN, phy_rate); in rtw89_pci_auto_refclk_cal()
2017 rtw89_err(rtwdev, "[ERR]mdio_w16_pcie %X\n", RAC_CTRL_PPR_V1); in rtw89_pci_auto_refclk_cal()
2022 ret = rtw89_pci_write_config_byte(rtwdev, RTW89_PCIE_CLK_CTRL, in rtw89_pci_auto_refclk_cal()
2028 ret = rtw89_pci_write_config_byte(rtwdev, RTW89_PCIE_L1_CTRL, in rtw89_pci_auto_refclk_cal()
2031 rtw89_err(rtwdev, "[ERR]pci config write %X\n", in rtw89_pci_auto_refclk_cal()
2040 static int rtw89_pci_deglitch_setting(struct rtw89_dev *rtwdev) in rtw89_pci_deglitch_setting() argument
2042 enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; in rtw89_pci_deglitch_setting()
2046 ret = rtw89_write16_mdio_clr(rtwdev, RAC_ANA24, B_AX_DEGLITCH, in rtw89_pci_deglitch_setting()
2050 ret = rtw89_write16_mdio_clr(rtwdev, RAC_ANA24, B_AX_DEGLITCH, in rtw89_pci_deglitch_setting()
2055 rtw89_write16_clr(rtwdev, R_RAC_DIRECT_OFFSET_G1 + RAC_ANA24 * 2, in rtw89_pci_deglitch_setting()
2057 rtw89_write16_clr(rtwdev, R_RAC_DIRECT_OFFSET_G2 + RAC_ANA24 * 2, in rtw89_pci_deglitch_setting()
2064 static void rtw89_pci_rxdma_prefth(struct rtw89_dev *rtwdev) in rtw89_pci_rxdma_prefth() argument
2066 if (rtwdev->chip->chip_id != RTL8852A) in rtw89_pci_rxdma_prefth()
2069 rtw89_write32_set(rtwdev, R_AX_PCIE_INIT_CFG1, B_AX_DIS_RXDMA_PRE); in rtw89_pci_rxdma_prefth()
2072 static void rtw89_pci_l1off_pwroff(struct rtw89_dev *rtwdev) in rtw89_pci_l1off_pwroff() argument
2074 if (rtwdev->chip->chip_id != RTL8852A && rtwdev->chip->chip_id != RTL8852B) in rtw89_pci_l1off_pwroff()
2077 rtw89_write32_clr(rtwdev, R_AX_PCIE_PS_CTRL, B_AX_L1OFF_PWR_OFF_EN); in rtw89_pci_l1off_pwroff()
2080 static u32 rtw89_pci_l2_rxen_lat(struct rtw89_dev *rtwdev) in rtw89_pci_l2_rxen_lat() argument
2084 if (rtwdev->chip->chip_id != RTL8852A) in rtw89_pci_l2_rxen_lat()
2087 ret = rtw89_write16_mdio_clr(rtwdev, RAC_ANA26, B_AX_RXEN, in rtw89_pci_l2_rxen_lat()
2092 ret = rtw89_write16_mdio_clr(rtwdev, RAC_ANA26, B_AX_RXEN, in rtw89_pci_l2_rxen_lat()
2100 static void rtw89_pci_aphy_pwrcut(struct rtw89_dev *rtwdev) in rtw89_pci_aphy_pwrcut() argument
2102 if (rtwdev->chip->chip_id != RTL8852A && rtwdev->chip->chip_id != RTL8852B) in rtw89_pci_aphy_pwrcut()
2105 rtw89_write32_clr(rtwdev, R_AX_SYS_PW_CTRL, B_AX_PSUS_OFF_CAPC_EN); in rtw89_pci_aphy_pwrcut()
2108 static void rtw89_pci_hci_ldo(struct rtw89_dev *rtwdev) in rtw89_pci_hci_ldo() argument
2110 if (rtwdev->chip->chip_id == RTL8852A || in rtw89_pci_hci_ldo()
2111 rtwdev->chip->chip_id == RTL8852B) { in rtw89_pci_hci_ldo()
2112 rtw89_write32_set(rtwdev, R_AX_SYS_SDIO_CTRL, in rtw89_pci_hci_ldo()
2114 rtw89_write32_clr(rtwdev, R_AX_SYS_SDIO_CTRL, in rtw89_pci_hci_ldo()
2116 } else if (rtwdev->chip->chip_id == RTL8852C) { in rtw89_pci_hci_ldo()
2117 rtw89_write32_clr(rtwdev, R_AX_SYS_SDIO_CTRL, in rtw89_pci_hci_ldo()
2122 static int rtw89_pci_dphy_delay(struct rtw89_dev *rtwdev) in rtw89_pci_dphy_delay() argument
2124 if (rtwdev->chip->chip_id != RTL8852B) in rtw89_pci_dphy_delay()
2127 return rtw89_write16_mdio_mask(rtwdev, RAC_REG_REV2, BAC_CMU_EN_DLY_MASK, in rtw89_pci_dphy_delay()
2131 static void rtw89_pci_power_wake(struct rtw89_dev *rtwdev, bool pwr_up) in rtw89_pci_power_wake() argument
2134 rtw89_write32_set(rtwdev, R_AX_HCI_OPT_CTRL, BIT_WAKE_CTRL); in rtw89_pci_power_wake()
2136 rtw89_write32_clr(rtwdev, R_AX_HCI_OPT_CTRL, BIT_WAKE_CTRL); in rtw89_pci_power_wake()
2139 static void rtw89_pci_autoload_hang(struct rtw89_dev *rtwdev) in rtw89_pci_autoload_hang() argument
2141 if (rtwdev->chip->chip_id != RTL8852C) in rtw89_pci_autoload_hang()
2144 rtw89_write32_set(rtwdev, R_AX_PCIE_BG_CLR, B_AX_BG_CLR_ASYNC_M3); in rtw89_pci_autoload_hang()
2145 rtw89_write32_clr(rtwdev, R_AX_PCIE_BG_CLR, B_AX_BG_CLR_ASYNC_M3); in rtw89_pci_autoload_hang()
2148 static void rtw89_pci_l12_vmain(struct rtw89_dev *rtwdev) in rtw89_pci_l12_vmain() argument
2150 if (!(rtwdev->chip->chip_id == RTL8852C && rtwdev->hal.cv == CHIP_CAV)) in rtw89_pci_l12_vmain()
2153 rtw89_write32_set(rtwdev, R_AX_SYS_SDIO_CTRL, B_AX_PCIE_FORCE_PWR_NGAT); in rtw89_pci_l12_vmain()
2156 static void rtw89_pci_gen2_force_ib(struct rtw89_dev *rtwdev) in rtw89_pci_gen2_force_ib() argument
2158 if (!(rtwdev->chip->chip_id == RTL8852C && rtwdev->hal.cv == CHIP_CAV)) in rtw89_pci_gen2_force_ib()
2161 rtw89_write32_set(rtwdev, R_AX_PMC_DBG_CTRL2, in rtw89_pci_gen2_force_ib()
2163 rtw89_write32_set(rtwdev, R_AX_HCI_BG_CTRL, B_AX_BG_CLR_ASYNC_M3); in rtw89_pci_gen2_force_ib()
2164 rtw89_write32_clr(rtwdev, R_AX_PMC_DBG_CTRL2, in rtw89_pci_gen2_force_ib()
2168 static void rtw89_pci_l1_ent_lat(struct rtw89_dev *rtwdev) in rtw89_pci_l1_ent_lat() argument
2170 if (rtwdev->chip->chip_id != RTL8852C) in rtw89_pci_l1_ent_lat()
2173 rtw89_write32_clr(rtwdev, R_AX_PCIE_PS_CTRL_V1, B_AX_SEL_REQ_ENTR_L1); in rtw89_pci_l1_ent_lat()
2176 static void rtw89_pci_wd_exit_l1(struct rtw89_dev *rtwdev) in rtw89_pci_wd_exit_l1() argument
2178 if (rtwdev->chip->chip_id != RTL8852C) in rtw89_pci_wd_exit_l1()
2181 rtw89_write32_set(rtwdev, R_AX_PCIE_PS_CTRL_V1, B_AX_DMAC0_EXIT_L1_EN); in rtw89_pci_wd_exit_l1()
2184 static void rtw89_pci_set_sic(struct rtw89_dev *rtwdev) in rtw89_pci_set_sic() argument
2186 if (rtwdev->chip->chip_id == RTL8852C) in rtw89_pci_set_sic()
2189 rtw89_write32_clr(rtwdev, R_AX_PCIE_EXP_CTRL, in rtw89_pci_set_sic()
2193 static void rtw89_pci_set_lbc(struct rtw89_dev *rtwdev) in rtw89_pci_set_lbc() argument
2195 const struct rtw89_pci_info *info = rtwdev->pci_info; in rtw89_pci_set_lbc()
2198 if (rtwdev->chip->chip_id == RTL8852C) in rtw89_pci_set_lbc()
2201 lbc = rtw89_read32(rtwdev, R_AX_LBC_WATCHDOG); in rtw89_pci_set_lbc()
2205 rtw89_write32(rtwdev, R_AX_LBC_WATCHDOG, lbc); in rtw89_pci_set_lbc()
2209 rtw89_write32_set(rtwdev, R_AX_LBC_WATCHDOG, lbc); in rtw89_pci_set_lbc()
2212 static void rtw89_pci_set_io_rcy(struct rtw89_dev *rtwdev) in rtw89_pci_set_io_rcy() argument
2214 const struct rtw89_pci_info *info = rtwdev->pci_info; in rtw89_pci_set_io_rcy()
2217 if (rtwdev->chip->chip_id != RTL8852C) in rtw89_pci_set_io_rcy()
2223 rtw89_write32(rtwdev, R_AX_PCIE_WDT_TIMER_M1, val32); in rtw89_pci_set_io_rcy()
2224 rtw89_write32(rtwdev, R_AX_PCIE_WDT_TIMER_M2, val32); in rtw89_pci_set_io_rcy()
2225 rtw89_write32(rtwdev, R_AX_PCIE_WDT_TIMER_E0, val32); in rtw89_pci_set_io_rcy()
2227 rtw89_write32_set(rtwdev, R_AX_PCIE_IO_RCY_M1, B_AX_PCIE_IO_RCY_WDT_MODE_M1); in rtw89_pci_set_io_rcy()
2228 rtw89_write32_set(rtwdev, R_AX_PCIE_IO_RCY_M2, B_AX_PCIE_IO_RCY_WDT_MODE_M2); in rtw89_pci_set_io_rcy()
2229 rtw89_write32_set(rtwdev, R_AX_PCIE_IO_RCY_E0, B_AX_PCIE_IO_RCY_WDT_MODE_E0); in rtw89_pci_set_io_rcy()
2231 rtw89_write32_clr(rtwdev, R_AX_PCIE_IO_RCY_M1, B_AX_PCIE_IO_RCY_WDT_MODE_M1); in rtw89_pci_set_io_rcy()
2232 rtw89_write32_clr(rtwdev, R_AX_PCIE_IO_RCY_M2, B_AX_PCIE_IO_RCY_WDT_MODE_M2); in rtw89_pci_set_io_rcy()
2233 rtw89_write32_clr(rtwdev, R_AX_PCIE_IO_RCY_E0, B_AX_PCIE_IO_RCY_WDT_MODE_E0); in rtw89_pci_set_io_rcy()
2236 rtw89_write32_clr(rtwdev, R_AX_PCIE_IO_RCY_S1, B_AX_PCIE_IO_RCY_WDT_MODE_S1); in rtw89_pci_set_io_rcy()
2239 static void rtw89_pci_set_dbg(struct rtw89_dev *rtwdev) in rtw89_pci_set_dbg() argument
2241 if (rtwdev->chip->chip_id == RTL8852C) in rtw89_pci_set_dbg()
2244 rtw89_write32_set(rtwdev, R_AX_PCIE_DBG_CTRL, in rtw89_pci_set_dbg()
2247 if (rtwdev->chip->chip_id == RTL8852A) in rtw89_pci_set_dbg()
2248 rtw89_write32_set(rtwdev, R_AX_PCIE_EXP_CTRL, in rtw89_pci_set_dbg()
2252 static void rtw89_pci_set_keep_reg(struct rtw89_dev *rtwdev) in rtw89_pci_set_keep_reg() argument
2254 if (rtwdev->chip->chip_id == RTL8852C) in rtw89_pci_set_keep_reg()
2257 rtw89_write32_set(rtwdev, R_AX_PCIE_INIT_CFG1, in rtw89_pci_set_keep_reg()
2261 static void rtw89_pci_clr_idx_all(struct rtw89_dev *rtwdev) in rtw89_pci_clr_idx_all() argument
2263 const struct rtw89_pci_info *info = rtwdev->pci_info; in rtw89_pci_clr_idx_all()
2264 enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; in rtw89_pci_clr_idx_all()
2275 rtw89_write32_set(rtwdev, R_AX_TXBD_RWPTR_CLR1, val); in rtw89_pci_clr_idx_all()
2277 rtw89_write32_set(rtwdev, txbd_rwptr_clr2, in rtw89_pci_clr_idx_all()
2279 rtw89_write32_set(rtwdev, rxbd_rwptr_clr, in rtw89_pci_clr_idx_all()
2283 static int rtw89_poll_txdma_ch_idle_pcie(struct rtw89_dev *rtwdev) in rtw89_poll_txdma_ch_idle_pcie() argument
2285 const struct rtw89_pci_info *info = rtwdev->pci_info; in rtw89_poll_txdma_ch_idle_pcie()
2293 10, 100, false, rtwdev, dma_busy1); in rtw89_poll_txdma_ch_idle_pcie()
2303 10, 100, false, rtwdev, dma_busy2); in rtw89_poll_txdma_ch_idle_pcie()
2310 static int rtw89_poll_rxdma_ch_idle_pcie(struct rtw89_dev *rtwdev) in rtw89_poll_rxdma_ch_idle_pcie() argument
2312 const struct rtw89_pci_info *info = rtwdev->pci_info; in rtw89_poll_rxdma_ch_idle_pcie()
2319 10, 100, false, rtwdev, dma_busy3); in rtw89_poll_rxdma_ch_idle_pcie()
2326 static int rtw89_pci_poll_dma_all_idle(struct rtw89_dev *rtwdev) in rtw89_pci_poll_dma_all_idle() argument
2330 ret = rtw89_poll_txdma_ch_idle_pcie(rtwdev); in rtw89_pci_poll_dma_all_idle()
2332 rtw89_err(rtwdev, "txdma ch busy\n"); in rtw89_pci_poll_dma_all_idle()
2336 ret = rtw89_poll_rxdma_ch_idle_pcie(rtwdev); in rtw89_pci_poll_dma_all_idle()
2338 rtw89_err(rtwdev, "rxdma ch busy\n"); in rtw89_pci_poll_dma_all_idle()
2345 static int rtw89_pci_mode_op(struct rtw89_dev *rtwdev) in rtw89_pci_mode_op() argument
2347 const struct rtw89_pci_info *info = rtwdev->pci_info; in rtw89_pci_mode_op()
2356 enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; in rtw89_pci_mode_op()
2357 u8 cv = rtwdev->hal.cv; in rtw89_pci_mode_op()
2362 rtw89_write32_set(rtwdev, R_AX_PCIE_INIT_CFG1, B_AX_TX_TRUNC_MODE); in rtw89_pci_mode_op()
2365 rtw89_write32_clr(rtwdev, R_AX_PCIE_INIT_CFG1, B_AX_TX_TRUNC_MODE); in rtw89_pci_mode_op()
2370 rtw89_write32_set(rtwdev, R_AX_PCIE_INIT_CFG1, B_AX_RX_TRUNC_MODE); in rtw89_pci_mode_op()
2373 rtw89_write32_clr(rtwdev, R_AX_PCIE_INIT_CFG1, B_AX_RX_TRUNC_MODE); in rtw89_pci_mode_op()
2377 rtw89_write32_clr(rtwdev, info->init_cfg_reg, info->rxbd_mode_bit); in rtw89_pci_mode_op()
2379 rtw89_write32_set(rtwdev, info->init_cfg_reg, info->rxbd_mode_bit); in rtw89_pci_mode_op()
2382 rtw89_write32_mask(rtwdev, R_AX_PCIE_INIT_CFG2, in rtw89_pci_mode_op()
2387 rtw89_write32_mask(rtwdev, R_AX_PCIE_INIT_CFG1, B_AX_PCIE_MAX_TXDMA_MASK, tx_burst); in rtw89_pci_mode_op()
2388 rtw89_write32_mask(rtwdev, R_AX_PCIE_INIT_CFG1, B_AX_PCIE_MAX_RXDMA_MASK, rx_burst); in rtw89_pci_mode_op()
2390 rtw89_write32_mask(rtwdev, R_AX_HAXI_INIT_CFG1, B_AX_HAXI_MAX_TXDMA_MASK, tx_burst); in rtw89_pci_mode_op()
2391 rtw89_write32_mask(rtwdev, R_AX_HAXI_INIT_CFG1, B_AX_HAXI_MAX_RXDMA_MASK, rx_burst); in rtw89_pci_mode_op()
2396 val32 = rtw89_read32(rtwdev, R_AX_PCIE_INIT_CFG1) & in rtw89_pci_mode_op()
2398 rtw89_write32(rtwdev, R_AX_PCIE_INIT_CFG1, val32); in rtw89_pci_mode_op()
2400 val32 = rtw89_read32(rtwdev, R_AX_PCIE_INIT_CFG1) | in rtw89_pci_mode_op()
2402 rtw89_write32(rtwdev, R_AX_PCIE_INIT_CFG1, val32); in rtw89_pci_mode_op()
2406 rtw89_write32_mask(rtwdev, info->exp_ctrl_reg, info->max_tag_num_mask, in rtw89_pci_mode_op()
2410 rtw89_write32_mask(rtwdev, R_AX_PCIE_INIT_CFG2, B_AX_WD_ITVL_IDLE, in rtw89_pci_mode_op()
2412 rtw89_write32_mask(rtwdev, R_AX_PCIE_INIT_CFG2, B_AX_WD_ITVL_ACT, in rtw89_pci_mode_op()
2415 rtw89_write32_mask(rtwdev, R_AX_HAXI_INIT_CFG1, B_AX_WD_ITVL_IDLE_V1_MASK, in rtw89_pci_mode_op()
2417 rtw89_write32_mask(rtwdev, R_AX_HAXI_INIT_CFG1, B_AX_WD_ITVL_ACT_V1_MASK, in rtw89_pci_mode_op()
2422 rtw89_write32_set(rtwdev, R_AX_TX_ADDRESS_INFO_MODE_SETTING, in rtw89_pci_mode_op()
2424 rtw89_write32_clr(rtwdev, R_AX_PKTIN_SETTING, B_AX_WD_ADDR_INFO_LENGTH); in rtw89_pci_mode_op()
2426 rtw89_write32_clr(rtwdev, R_AX_TX_ADDRESS_INFO_MODE_SETTING, in rtw89_pci_mode_op()
2428 rtw89_write32_set(rtwdev, R_AX_PKTIN_SETTING, B_AX_WD_ADDR_INFO_LENGTH); in rtw89_pci_mode_op()
2434 static int rtw89_pci_ops_deinit(struct rtw89_dev *rtwdev) in rtw89_pci_ops_deinit() argument
2436 const struct rtw89_pci_info *info = rtwdev->pci_info; in rtw89_pci_ops_deinit()
2438 if (rtwdev->chip->chip_id == RTL8852A) { in rtw89_pci_ops_deinit()
2440 rtw89_write32_set(rtwdev, R_AX_LTR_CTRL_0, B_AX_APP_LTR_IDLE); in rtw89_pci_ops_deinit()
2442 info->ltr_set(rtwdev, false); in rtw89_pci_ops_deinit()
2443 rtw89_pci_ctrl_dma_all(rtwdev, false); in rtw89_pci_ops_deinit()
2444 rtw89_pci_clr_idx_all(rtwdev); in rtw89_pci_ops_deinit()
2449 static int rtw89_pci_ops_mac_pre_init(struct rtw89_dev *rtwdev) in rtw89_pci_ops_mac_pre_init() argument
2451 const struct rtw89_pci_info *info = rtwdev->pci_info; in rtw89_pci_ops_mac_pre_init()
2454 rtw89_pci_rxdma_prefth(rtwdev); in rtw89_pci_ops_mac_pre_init()
2455 rtw89_pci_l1off_pwroff(rtwdev); in rtw89_pci_ops_mac_pre_init()
2456 rtw89_pci_deglitch_setting(rtwdev); in rtw89_pci_ops_mac_pre_init()
2457 ret = rtw89_pci_l2_rxen_lat(rtwdev); in rtw89_pci_ops_mac_pre_init()
2459 rtw89_err(rtwdev, "[ERR] pcie l2 rxen lat %d\n", ret); in rtw89_pci_ops_mac_pre_init()
2463 rtw89_pci_aphy_pwrcut(rtwdev); in rtw89_pci_ops_mac_pre_init()
2464 rtw89_pci_hci_ldo(rtwdev); in rtw89_pci_ops_mac_pre_init()
2465 rtw89_pci_dphy_delay(rtwdev); in rtw89_pci_ops_mac_pre_init()
2467 ret = rtw89_pci_autok_x(rtwdev); in rtw89_pci_ops_mac_pre_init()
2469 rtw89_err(rtwdev, "[ERR] pcie autok_x fail %d\n", ret); in rtw89_pci_ops_mac_pre_init()
2473 ret = rtw89_pci_auto_refclk_cal(rtwdev, false); in rtw89_pci_ops_mac_pre_init()
2475 rtw89_err(rtwdev, "[ERR] pcie autok fail %d\n", ret); in rtw89_pci_ops_mac_pre_init()
2479 rtw89_pci_power_wake(rtwdev, true); in rtw89_pci_ops_mac_pre_init()
2480 rtw89_pci_autoload_hang(rtwdev); in rtw89_pci_ops_mac_pre_init()
2481 rtw89_pci_l12_vmain(rtwdev); in rtw89_pci_ops_mac_pre_init()
2482 rtw89_pci_gen2_force_ib(rtwdev); in rtw89_pci_ops_mac_pre_init()
2483 rtw89_pci_l1_ent_lat(rtwdev); in rtw89_pci_ops_mac_pre_init()
2484 rtw89_pci_wd_exit_l1(rtwdev); in rtw89_pci_ops_mac_pre_init()
2485 rtw89_pci_set_sic(rtwdev); in rtw89_pci_ops_mac_pre_init()
2486 rtw89_pci_set_lbc(rtwdev); in rtw89_pci_ops_mac_pre_init()
2487 rtw89_pci_set_io_rcy(rtwdev); in rtw89_pci_ops_mac_pre_init()
2488 rtw89_pci_set_dbg(rtwdev); in rtw89_pci_ops_mac_pre_init()
2489 rtw89_pci_set_keep_reg(rtwdev); in rtw89_pci_ops_mac_pre_init()
2491 rtw89_write32_set(rtwdev, info->dma_stop1.addr, B_AX_STOP_WPDMA); in rtw89_pci_ops_mac_pre_init()
2494 rtw89_pci_ctrl_dma_all(rtwdev, false); in rtw89_pci_ops_mac_pre_init()
2496 ret = rtw89_pci_poll_dma_all_idle(rtwdev); in rtw89_pci_ops_mac_pre_init()
2498 rtw89_err(rtwdev, "[ERR] poll pcie dma all idle\n"); in rtw89_pci_ops_mac_pre_init()
2502 rtw89_pci_clr_idx_all(rtwdev); in rtw89_pci_ops_mac_pre_init()
2503 rtw89_pci_mode_op(rtwdev); in rtw89_pci_ops_mac_pre_init()
2506 rtw89_pci_ops_reset(rtwdev); in rtw89_pci_ops_mac_pre_init()
2508 ret = rtw89_pci_rst_bdram_pcie(rtwdev); in rtw89_pci_ops_mac_pre_init()
2510 rtw89_warn(rtwdev, "reset bdram busy\n"); in rtw89_pci_ops_mac_pre_init()
2515 rtw89_pci_ctrl_txdma_ch_pcie(rtwdev, false); in rtw89_pci_ops_mac_pre_init()
2516 rtw89_write32_clr(rtwdev, info->dma_stop1.addr, B_AX_STOP_CH12); in rtw89_pci_ops_mac_pre_init()
2519 rtw89_pci_ctrl_dma_all(rtwdev, true); in rtw89_pci_ops_mac_pre_init()
2524 int rtw89_pci_ltr_set(struct rtw89_dev *rtwdev, bool en) in rtw89_pci_ltr_set() argument
2531 val = rtw89_read32(rtwdev, R_AX_LTR_CTRL_0); in rtw89_pci_ltr_set()
2534 val = rtw89_read32(rtwdev, R_AX_LTR_CTRL_1); in rtw89_pci_ltr_set()
2537 val = rtw89_read32(rtwdev, R_AX_LTR_IDLE_LATENCY); in rtw89_pci_ltr_set()
2540 val = rtw89_read32(rtwdev, R_AX_LTR_ACTIVE_LATENCY); in rtw89_pci_ltr_set()
2544 rtw89_write32_set(rtwdev, R_AX_LTR_CTRL_0, B_AX_LTR_HW_EN | B_AX_LTR_EN | in rtw89_pci_ltr_set()
2546 rtw89_write32_mask(rtwdev, R_AX_LTR_CTRL_0, B_AX_LTR_SPACE_IDX_MASK, in rtw89_pci_ltr_set()
2548 rtw89_write32_mask(rtwdev, R_AX_LTR_CTRL_0, B_AX_LTR_IDLE_TIMER_IDX_MASK, in rtw89_pci_ltr_set()
2550 rtw89_write32_mask(rtwdev, R_AX_LTR_CTRL_1, B_AX_LTR_RX0_TH_MASK, 0x28); in rtw89_pci_ltr_set()
2551 rtw89_write32_mask(rtwdev, R_AX_LTR_CTRL_1, B_AX_LTR_RX1_TH_MASK, 0x28); in rtw89_pci_ltr_set()
2552 rtw89_write32(rtwdev, R_AX_LTR_IDLE_LATENCY, 0x90039003); in rtw89_pci_ltr_set()
2553 rtw89_write32(rtwdev, R_AX_LTR_ACTIVE_LATENCY, 0x880b880b); in rtw89_pci_ltr_set()
2559 int rtw89_pci_ltr_set_v1(struct rtw89_dev *rtwdev, bool en) in rtw89_pci_ltr_set_v1() argument
2564 val32 = rtw89_read32(rtwdev, R_AX_LTR_CTRL_0); in rtw89_pci_ltr_set_v1()
2567 val32 = rtw89_read32(rtwdev, R_AX_LTR_CTRL_1); in rtw89_pci_ltr_set_v1()
2570 dec_ctrl = rtw89_read32(rtwdev, R_AX_LTR_DEC_CTRL); in rtw89_pci_ltr_set_v1()
2573 val32 = rtw89_read32(rtwdev, R_AX_LTR_LATENCY_IDX3); in rtw89_pci_ltr_set_v1()
2576 val32 = rtw89_read32(rtwdev, R_AX_LTR_LATENCY_IDX0); in rtw89_pci_ltr_set_v1()
2592 rtw89_write32_set(rtwdev, R_AX_LTR_CTRL_0, in rtw89_pci_ltr_set_v1()
2594 rtw89_write32_mask(rtwdev, R_AX_LTR_CTRL_0, B_AX_LTR_IDLE_TIMER_IDX_MASK, in rtw89_pci_ltr_set_v1()
2596 rtw89_write32_mask(rtwdev, R_AX_LTR_CTRL_1, B_AX_LTR_RX0_TH_MASK, 0x28); in rtw89_pci_ltr_set_v1()
2597 rtw89_write32_mask(rtwdev, R_AX_LTR_CTRL_1, B_AX_LTR_RX1_TH_MASK, 0x28); in rtw89_pci_ltr_set_v1()
2598 rtw89_write32(rtwdev, R_AX_LTR_DEC_CTRL, dec_ctrl); in rtw89_pci_ltr_set_v1()
2599 rtw89_write32(rtwdev, R_AX_LTR_LATENCY_IDX3, 0x90039003); in rtw89_pci_ltr_set_v1()
2600 rtw89_write32(rtwdev, R_AX_LTR_LATENCY_IDX0, 0x880b880b); in rtw89_pci_ltr_set_v1()
2606 static int rtw89_pci_ops_mac_post_init(struct rtw89_dev *rtwdev) in rtw89_pci_ops_mac_post_init() argument
2608 const struct rtw89_pci_info *info = rtwdev->pci_info; in rtw89_pci_ops_mac_post_init()
2609 enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; in rtw89_pci_ops_mac_post_init()
2612 ret = info->ltr_set(rtwdev, true); in rtw89_pci_ops_mac_post_init()
2614 rtw89_err(rtwdev, "pci ltr set fail\n"); in rtw89_pci_ops_mac_post_init()
2619 rtw89_write32_set(rtwdev, R_AX_LTR_CTRL_0, B_AX_APP_LTR_ACT); in rtw89_pci_ops_mac_post_init()
2623 rtw89_write32_set(rtwdev, R_AX_TX_ADDRESS_INFO_MODE_SETTING, in rtw89_pci_ops_mac_post_init()
2625 rtw89_write32_clr(rtwdev, R_AX_PKTIN_SETTING, B_AX_WD_ADDR_INFO_LENGTH); in rtw89_pci_ops_mac_post_init()
2629 rtw89_pci_ctrl_txdma_ch_pcie(rtwdev, true); in rtw89_pci_ops_mac_post_init()
2632 rtw89_write32_clr(rtwdev, info->dma_stop1.addr, in rtw89_pci_ops_mac_post_init()
2638 static int rtw89_pci_claim_device(struct rtw89_dev *rtwdev, in rtw89_pci_claim_device() argument
2641 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_claim_device()
2646 rtw89_err(rtwdev, "failed to enable pci device\n"); in rtw89_pci_claim_device()
2651 pci_set_drvdata(pdev, rtwdev->hw); in rtw89_pci_claim_device()
2658 static void rtw89_pci_declaim_device(struct rtw89_dev *rtwdev, in rtw89_pci_declaim_device() argument
2665 static int rtw89_pci_setup_mapping(struct rtw89_dev *rtwdev, in rtw89_pci_setup_mapping() argument
2668 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_setup_mapping()
2675 rtw89_err(rtwdev, "failed to request pci regions\n"); in rtw89_pci_setup_mapping()
2681 rtw89_err(rtwdev, "failed to set dma mask to 32-bit\n"); in rtw89_pci_setup_mapping()
2687 rtw89_err(rtwdev, "failed to set consistent dma mask to 32-bit\n"); in rtw89_pci_setup_mapping()
2694 rtw89_err(rtwdev, "failed to map pci io\n"); in rtw89_pci_setup_mapping()
2707 static void rtw89_pci_clear_mapping(struct rtw89_dev *rtwdev, in rtw89_pci_clear_mapping() argument
2710 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_clear_mapping()
2718 static void rtw89_pci_free_tx_wd_ring(struct rtw89_dev *rtwdev, in rtw89_pci_free_tx_wd_ring() argument
2733 static void rtw89_pci_free_tx_ring(struct rtw89_dev *rtwdev, in rtw89_pci_free_tx_ring() argument
2749 static void rtw89_pci_free_tx_rings(struct rtw89_dev *rtwdev, in rtw89_pci_free_tx_rings() argument
2752 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_free_tx_rings()
2753 const struct rtw89_pci_info *info = rtwdev->pci_info; in rtw89_pci_free_tx_rings()
2761 rtw89_pci_free_tx_wd_ring(rtwdev, pdev, tx_ring); in rtw89_pci_free_tx_rings()
2762 rtw89_pci_free_tx_ring(rtwdev, pdev, tx_ring); in rtw89_pci_free_tx_rings()
2766 static void rtw89_pci_free_rx_ring(struct rtw89_dev *rtwdev, in rtw89_pci_free_rx_ring() argument
2798 static void rtw89_pci_free_rx_rings(struct rtw89_dev *rtwdev, in rtw89_pci_free_rx_rings() argument
2801 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_free_rx_rings()
2807 rtw89_pci_free_rx_ring(rtwdev, pdev, rx_ring); in rtw89_pci_free_rx_rings()
2811 static void rtw89_pci_free_trx_rings(struct rtw89_dev *rtwdev, in rtw89_pci_free_trx_rings() argument
2814 rtw89_pci_free_rx_rings(rtwdev, pdev); in rtw89_pci_free_trx_rings()
2815 rtw89_pci_free_tx_rings(rtwdev, pdev); in rtw89_pci_free_trx_rings()
2818 static int rtw89_pci_init_rx_bd(struct rtw89_dev *rtwdev, struct pci_dev *pdev, in rtw89_pci_init_rx_bd() argument
2844 static int rtw89_pci_alloc_tx_wd_ring(struct rtw89_dev *rtwdev, in rtw89_pci_alloc_tx_wd_ring() argument
2895 static int rtw89_pci_alloc_tx_ring(struct rtw89_dev *rtwdev, in rtw89_pci_alloc_tx_ring() argument
2907 ret = rtw89_pci_alloc_tx_wd_ring(rtwdev, pdev, tx_ring, txch); in rtw89_pci_alloc_tx_ring()
2909 rtw89_err(rtwdev, "failed to alloc txwd ring of txch %d\n", txch); in rtw89_pci_alloc_tx_ring()
2913 ret = rtw89_pci_get_txch_addrs(rtwdev, txch, &txch_addr); in rtw89_pci_alloc_tx_ring()
2915 rtw89_err(rtwdev, "failed to get address of txch %d", txch); in rtw89_pci_alloc_tx_ring()
2938 rtw89_pci_free_tx_wd_ring(rtwdev, pdev, tx_ring); in rtw89_pci_alloc_tx_ring()
2943 static int rtw89_pci_alloc_tx_rings(struct rtw89_dev *rtwdev, in rtw89_pci_alloc_tx_rings() argument
2946 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_alloc_tx_rings()
2947 const struct rtw89_pci_info *info = rtwdev->pci_info; in rtw89_pci_alloc_tx_rings()
2960 ret = rtw89_pci_alloc_tx_ring(rtwdev, pdev, tx_ring, in rtw89_pci_alloc_tx_rings()
2963 rtw89_err(rtwdev, "failed to alloc tx ring %d\n", i); in rtw89_pci_alloc_tx_rings()
2974 rtw89_pci_free_tx_ring(rtwdev, pdev, tx_ring); in rtw89_pci_alloc_tx_rings()
2980 static int rtw89_pci_alloc_rx_ring(struct rtw89_dev *rtwdev, in rtw89_pci_alloc_rx_ring() argument
2994 ret = rtw89_pci_get_rxch_addrs(rtwdev, rxch, &rxch_addr); in rtw89_pci_alloc_rx_ring()
2996 rtw89_err(rtwdev, "failed to get address of rxch %d", rxch); in rtw89_pci_alloc_rx_ring()
3026 ret = rtw89_pci_init_rx_bd(rtwdev, pdev, rx_ring, skb, in rtw89_pci_alloc_rx_ring()
3029 rtw89_err(rtwdev, "failed to init rx buf %d\n", i); in rtw89_pci_alloc_rx_ring()
3059 static int rtw89_pci_alloc_rx_rings(struct rtw89_dev *rtwdev, in rtw89_pci_alloc_rx_rings() argument
3062 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_alloc_rx_rings()
3073 ret = rtw89_pci_alloc_rx_ring(rtwdev, pdev, rx_ring, in rtw89_pci_alloc_rx_rings()
3076 rtw89_err(rtwdev, "failed to alloc rx ring %d\n", i); in rtw89_pci_alloc_rx_rings()
3087 rtw89_pci_free_rx_ring(rtwdev, pdev, rx_ring); in rtw89_pci_alloc_rx_rings()
3093 static int rtw89_pci_alloc_trx_rings(struct rtw89_dev *rtwdev, in rtw89_pci_alloc_trx_rings() argument
3098 ret = rtw89_pci_alloc_tx_rings(rtwdev, pdev); in rtw89_pci_alloc_trx_rings()
3100 rtw89_err(rtwdev, "failed to alloc dma tx rings\n"); in rtw89_pci_alloc_trx_rings()
3104 ret = rtw89_pci_alloc_rx_rings(rtwdev, pdev); in rtw89_pci_alloc_trx_rings()
3106 rtw89_err(rtwdev, "failed to alloc dma rx rings\n"); in rtw89_pci_alloc_trx_rings()
3113 rtw89_pci_free_tx_rings(rtwdev, pdev); in rtw89_pci_alloc_trx_rings()
3118 static void rtw89_pci_h2c_init(struct rtw89_dev *rtwdev, in rtw89_pci_h2c_init() argument
3125 static int rtw89_pci_setup_resource(struct rtw89_dev *rtwdev, in rtw89_pci_setup_resource() argument
3128 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_setup_resource()
3131 ret = rtw89_pci_setup_mapping(rtwdev, pdev); in rtw89_pci_setup_resource()
3133 rtw89_err(rtwdev, "failed to setup pci mapping\n"); in rtw89_pci_setup_resource()
3137 ret = rtw89_pci_alloc_trx_rings(rtwdev, pdev); in rtw89_pci_setup_resource()
3139 rtw89_err(rtwdev, "failed to alloc pci trx rings\n"); in rtw89_pci_setup_resource()
3143 rtw89_pci_h2c_init(rtwdev, rtwpci); in rtw89_pci_setup_resource()
3151 rtw89_pci_clear_mapping(rtwdev, pdev); in rtw89_pci_setup_resource()
3156 static void rtw89_pci_clear_resource(struct rtw89_dev *rtwdev, in rtw89_pci_clear_resource() argument
3159 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_clear_resource()
3161 rtw89_pci_free_trx_rings(rtwdev, pdev); in rtw89_pci_clear_resource()
3162 rtw89_pci_clear_mapping(rtwdev, pdev); in rtw89_pci_clear_resource()
3163 rtw89_pci_release_fwcmd(rtwdev, rtwpci, in rtw89_pci_clear_resource()
3167 void rtw89_pci_config_intr_mask(struct rtw89_dev *rtwdev) in rtw89_pci_config_intr_mask() argument
3169 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_config_intr_mask()
3191 static void rtw89_pci_recovery_intr_mask_v1(struct rtw89_dev *rtwdev) in rtw89_pci_recovery_intr_mask_v1() argument
3193 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_recovery_intr_mask_v1()
3201 static void rtw89_pci_default_intr_mask_v1(struct rtw89_dev *rtwdev) in rtw89_pci_default_intr_mask_v1() argument
3203 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_default_intr_mask_v1()
3219 static void rtw89_pci_low_power_intr_mask_v1(struct rtw89_dev *rtwdev) in rtw89_pci_low_power_intr_mask_v1() argument
3221 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_low_power_intr_mask_v1()
3230 void rtw89_pci_config_intr_mask_v1(struct rtw89_dev *rtwdev) in rtw89_pci_config_intr_mask_v1() argument
3232 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_config_intr_mask_v1()
3235 rtw89_pci_recovery_intr_mask_v1(rtwdev); in rtw89_pci_config_intr_mask_v1()
3237 rtw89_pci_low_power_intr_mask_v1(rtwdev); in rtw89_pci_config_intr_mask_v1()
3239 rtw89_pci_default_intr_mask_v1(rtwdev); in rtw89_pci_config_intr_mask_v1()
3243 static int rtw89_pci_request_irq(struct rtw89_dev *rtwdev, in rtw89_pci_request_irq() argument
3252 rtw89_err(rtwdev, "failed to alloc irq vectors, ret %d\n", ret); in rtw89_pci_request_irq()
3256 ret = devm_request_threaded_irq(rtwdev->dev, pdev->irq, in rtw89_pci_request_irq()
3259 IRQF_SHARED, KBUILD_MODNAME, rtwdev); in rtw89_pci_request_irq()
3261 rtw89_err(rtwdev, "failed to request threaded irq\n"); in rtw89_pci_request_irq()
3265 rtw89_chip_config_intr_mask(rtwdev, RTW89_PCI_INTR_MASK_RESET); in rtw89_pci_request_irq()
3275 static void rtw89_pci_free_irq(struct rtw89_dev *rtwdev, in rtw89_pci_free_irq() argument
3278 devm_free_irq(rtwdev->dev, pdev->irq, rtwdev); in rtw89_pci_free_irq()
3297 static int rtw89_pci_filter_out(struct rtw89_dev *rtwdev) in rtw89_pci_filter_out() argument
3299 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_filter_out()
3305 if (rtwdev->chip->chip_id != RTL8852C) in rtw89_pci_filter_out()
3308 val = rtw89_read32_mask(rtwdev, R_AX_PCIE_MIX_CFG_V1, B_AX_ASPM_CTRL_MASK); in rtw89_pci_filter_out()
3321 val16 = rtw89_read16(rtwdev, phy_offset + RAC_ANA10 * RAC_MULT); in rtw89_pci_filter_out()
3322 rtw89_write16_set(rtwdev, phy_offset + RAC_ANA10 * RAC_MULT, in rtw89_pci_filter_out()
3324 rtw89_write16_set(rtwdev, phy_offset + RAC_ANA19 * RAC_MULT, in rtw89_pci_filter_out()
3327 val16 = rtw89_read16_mask(rtwdev, in rtw89_pci_filter_out()
3331 filter_out_val = rtw89_read16(rtwdev, phy_offset + RAC_ANA24 * in rtw89_pci_filter_out()
3336 rtw89_write16(rtwdev, phy_offset + RAC_ANA24 * RAC_MULT, in rtw89_pci_filter_out()
3338 rtw89_write16_set(rtwdev, phy_offset + RAC_ANA0A * RAC_MULT, in rtw89_pci_filter_out()
3340 rtw89_write16_set(rtwdev, in rtw89_pci_filter_out()
3346 rtw89_write16_set(rtwdev, phy_offset + RAC_ANA0C * RAC_MULT, in rtw89_pci_filter_out()
3352 static void rtw89_pci_clkreq_set(struct rtw89_dev *rtwdev, bool enable) in rtw89_pci_clkreq_set() argument
3354 enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; in rtw89_pci_clkreq_set()
3360 ret = rtw89_pci_write_config_byte(rtwdev, RTW89_PCIE_CLK_CTRL, in rtw89_pci_clkreq_set()
3363 rtw89_err(rtwdev, "failed to set CLKREQ Delay\n"); in rtw89_pci_clkreq_set()
3367 ret = rtw89_pci_config_byte_set(rtwdev, in rtw89_pci_clkreq_set()
3371 ret = rtw89_pci_config_byte_clr(rtwdev, in rtw89_pci_clkreq_set()
3375 rtw89_err(rtwdev, "failed to %s CLKREQ_L1, ret=%d", in rtw89_pci_clkreq_set()
3378 rtw89_write32_set(rtwdev, R_AX_PCIE_LAT_CTRL, in rtw89_pci_clkreq_set()
3381 rtw89_write32_set(rtwdev, R_AX_L1_CLK_CTRL, in rtw89_pci_clkreq_set()
3384 rtw89_write32_clr(rtwdev, R_AX_L1_CLK_CTRL, in rtw89_pci_clkreq_set()
3389 static void rtw89_pci_aspm_set(struct rtw89_dev *rtwdev, bool enable) in rtw89_pci_aspm_set() argument
3391 enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; in rtw89_pci_aspm_set()
3398 ret = rtw89_pci_read_config_byte(rtwdev, RTW89_PCIE_ASPM_CTRL, &value); in rtw89_pci_aspm_set()
3400 rtw89_err(rtwdev, "failed to read ASPM Delay\n"); in rtw89_pci_aspm_set()
3406 ret = rtw89_pci_write_config_byte(rtwdev, RTW89_PCIE_ASPM_CTRL, value); in rtw89_pci_aspm_set()
3408 rtw89_err(rtwdev, "failed to read ASPM Delay\n"); in rtw89_pci_aspm_set()
3412 ret = rtw89_pci_config_byte_set(rtwdev, in rtw89_pci_aspm_set()
3416 ret = rtw89_pci_config_byte_clr(rtwdev, in rtw89_pci_aspm_set()
3421 rtw89_write32_set(rtwdev, R_AX_PCIE_MIX_CFG_V1, in rtw89_pci_aspm_set()
3424 rtw89_write32_clr(rtwdev, R_AX_PCIE_MIX_CFG_V1, in rtw89_pci_aspm_set()
3428 rtw89_err(rtwdev, "failed to %s ASPM L1, ret=%d", in rtw89_pci_aspm_set()
3432 static void rtw89_pci_recalc_int_mit(struct rtw89_dev *rtwdev) in rtw89_pci_recalc_int_mit() argument
3434 struct rtw89_traffic_stats *stats = &rtwdev->stats; in rtw89_pci_recalc_int_mit()
3439 if (!rtwdev->scanning && in rtw89_pci_recalc_int_mit()
3446 rtw89_write32(rtwdev, R_AX_INT_MIT_RX, val); in rtw89_pci_recalc_int_mit()
3449 static void rtw89_pci_link_cfg(struct rtw89_dev *rtwdev) in rtw89_pci_link_cfg() argument
3451 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_link_cfg()
3474 rtw89_err(rtwdev, "failed to read PCI cap, ret=%d\n", ret); in rtw89_pci_link_cfg()
3479 rtw89_pci_clkreq_set(rtwdev, true); in rtw89_pci_link_cfg()
3482 rtw89_pci_aspm_set(rtwdev, true); in rtw89_pci_link_cfg()
3485 static void rtw89_pci_l1ss_set(struct rtw89_dev *rtwdev, bool enable) in rtw89_pci_l1ss_set() argument
3487 enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; in rtw89_pci_l1ss_set()
3492 ret = rtw89_pci_config_byte_set(rtwdev, in rtw89_pci_l1ss_set()
3496 ret = rtw89_pci_config_byte_clr(rtwdev, in rtw89_pci_l1ss_set()
3500 rtw89_err(rtwdev, "failed to %s L1SS, ret=%d", in rtw89_pci_l1ss_set()
3503 ret = rtw89_pci_config_byte_clr(rtwdev, RTW89_PCIE_L1SS_STS_V1, in rtw89_pci_l1ss_set()
3507 rtw89_warn(rtwdev, "failed to unset ASPM L1.1, ret=%d", ret); in rtw89_pci_l1ss_set()
3509 rtw89_write32_clr(rtwdev, R_AX_PCIE_MIX_CFG_V1, in rtw89_pci_l1ss_set()
3512 rtw89_write32_set(rtwdev, R_AX_PCIE_MIX_CFG_V1, in rtw89_pci_l1ss_set()
3517 static void rtw89_pci_l1ss_cfg(struct rtw89_dev *rtwdev) in rtw89_pci_l1ss_cfg() argument
3519 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_l1ss_cfg()
3533 rtw89_pci_l1ss_set(rtwdev, true); in rtw89_pci_l1ss_cfg()
3536 static int rtw89_pci_poll_io_idle(struct rtw89_dev *rtwdev) in rtw89_pci_poll_io_idle() argument
3543 10, 1000, false, rtwdev, in rtw89_pci_poll_io_idle()
3546 rtw89_err(rtwdev, "pci dmach busy1 0x%X\n", in rtw89_pci_poll_io_idle()
3547 rtw89_read32(rtwdev, R_AX_PCIE_DMA_BUSY1)); in rtw89_pci_poll_io_idle()
3553 static int rtw89_pci_lv1rst_stop_dma(struct rtw89_dev *rtwdev) in rtw89_pci_lv1rst_stop_dma() argument
3558 if (rtwdev->chip->chip_id == RTL8852C) in rtw89_pci_lv1rst_stop_dma()
3561 rtw89_pci_ctrl_dma_all(rtwdev, false); in rtw89_pci_lv1rst_stop_dma()
3562 ret = rtw89_pci_poll_io_idle(rtwdev); in rtw89_pci_lv1rst_stop_dma()
3564 val = rtw89_read32(rtwdev, R_AX_DBG_ERR_FLAG); in rtw89_pci_lv1rst_stop_dma()
3565 rtw89_debug(rtwdev, RTW89_DBG_HCI, in rtw89_pci_lv1rst_stop_dma()
3569 rtw89_mac_ctrl_hci_dma_tx(rtwdev, false); in rtw89_pci_lv1rst_stop_dma()
3571 rtw89_mac_ctrl_hci_dma_rx(rtwdev, false); in rtw89_pci_lv1rst_stop_dma()
3572 rtw89_mac_ctrl_hci_dma_trx(rtwdev, true); in rtw89_pci_lv1rst_stop_dma()
3573 ret = rtw89_pci_poll_io_idle(rtwdev); in rtw89_pci_lv1rst_stop_dma()
3574 val = rtw89_read32(rtwdev, R_AX_DBG_ERR_FLAG); in rtw89_pci_lv1rst_stop_dma()
3575 rtw89_debug(rtwdev, RTW89_DBG_HCI, in rtw89_pci_lv1rst_stop_dma()
3585 static int rtw89_pci_rst_bdram(struct rtw89_dev *rtwdev) in rtw89_pci_rst_bdram() argument
3591 rtw89_write32_set(rtwdev, R_AX_PCIE_INIT_CFG1, val32); in rtw89_pci_rst_bdram()
3595 true, rtwdev, R_AX_PCIE_INIT_CFG1); in rtw89_pci_rst_bdram()
3599 static int rtw89_pci_lv1rst_start_dma(struct rtw89_dev *rtwdev) in rtw89_pci_lv1rst_start_dma() argument
3603 if (rtwdev->chip->chip_id == RTL8852C) in rtw89_pci_lv1rst_start_dma()
3606 rtw89_mac_ctrl_hci_dma_trx(rtwdev, false); in rtw89_pci_lv1rst_start_dma()
3607 rtw89_mac_ctrl_hci_dma_trx(rtwdev, true); in rtw89_pci_lv1rst_start_dma()
3608 rtw89_pci_clr_idx_all(rtwdev); in rtw89_pci_lv1rst_start_dma()
3610 ret = rtw89_pci_rst_bdram(rtwdev); in rtw89_pci_lv1rst_start_dma()
3614 rtw89_pci_ctrl_dma_all(rtwdev, true); in rtw89_pci_lv1rst_start_dma()
3618 static int rtw89_pci_ops_mac_lv1_recovery(struct rtw89_dev *rtwdev, in rtw89_pci_ops_mac_lv1_recovery() argument
3625 ret = rtw89_pci_lv1rst_stop_dma(rtwdev); in rtw89_pci_ops_mac_lv1_recovery()
3627 rtw89_err(rtwdev, "lv1 rcvy pci stop dma fail\n"); in rtw89_pci_ops_mac_lv1_recovery()
3632 ret = rtw89_pci_lv1rst_start_dma(rtwdev); in rtw89_pci_ops_mac_lv1_recovery()
3634 rtw89_err(rtwdev, "lv1 rcvy pci start dma fail\n"); in rtw89_pci_ops_mac_lv1_recovery()
3644 static void rtw89_pci_ops_dump_err_status(struct rtw89_dev *rtwdev) in rtw89_pci_ops_dump_err_status() argument
3646 rtw89_info(rtwdev, "R_AX_RPQ_RXBD_IDX =0x%08x\n", in rtw89_pci_ops_dump_err_status()
3647 rtw89_read32(rtwdev, R_AX_RPQ_RXBD_IDX)); in rtw89_pci_ops_dump_err_status()
3648 rtw89_info(rtwdev, "R_AX_DBG_ERR_FLAG=0x%08x\n", in rtw89_pci_ops_dump_err_status()
3649 rtw89_read32(rtwdev, R_AX_DBG_ERR_FLAG)); in rtw89_pci_ops_dump_err_status()
3650 rtw89_info(rtwdev, "R_AX_LBC_WATCHDOG=0x%08x\n", in rtw89_pci_ops_dump_err_status()
3651 rtw89_read32(rtwdev, R_AX_LBC_WATCHDOG)); in rtw89_pci_ops_dump_err_status()
3656 struct rtw89_dev *rtwdev = container_of(napi, struct rtw89_dev, napi); in rtw89_pci_napi_poll() local
3657 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_napi_poll()
3661 rtwdev->napi_budget_countdown = budget; in rtw89_pci_napi_poll()
3663 rtw89_pci_clear_isr0(rtwdev, B_AX_RPQDMA_INT | B_AX_RPQBD_FULL_INT); in rtw89_pci_napi_poll()
3664 work_done = rtw89_pci_poll_rpq_dma(rtwdev, rtwpci, rtwdev->napi_budget_countdown); in rtw89_pci_napi_poll()
3668 rtw89_pci_clear_isr0(rtwdev, B_AX_RXP1DMA_INT | B_AX_RXDMA_INT | B_AX_RDU_INT); in rtw89_pci_napi_poll()
3669 work_done += rtw89_pci_poll_rxq_dma(rtwdev, rtwpci, rtwdev->napi_budget_countdown); in rtw89_pci_napi_poll()
3673 rtw89_chip_enable_intr(rtwdev, rtwpci); in rtw89_pci_napi_poll()
3683 struct rtw89_dev *rtwdev = hw->priv; in rtw89_pci_suspend() local
3684 enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; in rtw89_pci_suspend()
3686 rtw89_write32_set(rtwdev, R_AX_RSV_CTRL, B_AX_WLOCK_1C_BIT6); in rtw89_pci_suspend()
3687 rtw89_write32_set(rtwdev, R_AX_RSV_CTRL, B_AX_R_DIS_PRST); in rtw89_pci_suspend()
3688 rtw89_write32_clr(rtwdev, R_AX_RSV_CTRL, B_AX_WLOCK_1C_BIT6); in rtw89_pci_suspend()
3690 rtw89_write32_clr(rtwdev, R_AX_SYS_SDIO_CTRL, in rtw89_pci_suspend()
3692 rtw89_write32_set(rtwdev, R_AX_PCIE_INIT_CFG1, in rtw89_pci_suspend()
3695 rtw89_write32_clr(rtwdev, R_AX_PCIE_PS_CTRL_V1, in rtw89_pci_suspend()
3702 static void rtw89_pci_l2_hci_ldo(struct rtw89_dev *rtwdev) in rtw89_pci_l2_hci_ldo() argument
3704 if (rtwdev->chip->chip_id == RTL8852C) in rtw89_pci_l2_hci_ldo()
3708 rtw89_pci_write_config_byte(rtwdev, RTW89_PCIE_RST_MSTATE, in rtw89_pci_l2_hci_ldo()
3710 rtw89_pci_write_config_byte(rtwdev, RTW89_PCIE_RST_MSTATE, in rtw89_pci_l2_hci_ldo()
3717 struct rtw89_dev *rtwdev = hw->priv; in rtw89_pci_resume() local
3718 enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; in rtw89_pci_resume()
3720 rtw89_write32_set(rtwdev, R_AX_RSV_CTRL, B_AX_WLOCK_1C_BIT6); in rtw89_pci_resume()
3721 rtw89_write32_clr(rtwdev, R_AX_RSV_CTRL, B_AX_R_DIS_PRST); in rtw89_pci_resume()
3722 rtw89_write32_clr(rtwdev, R_AX_RSV_CTRL, B_AX_WLOCK_1C_BIT6); in rtw89_pci_resume()
3724 rtw89_write32_set(rtwdev, R_AX_SYS_SDIO_CTRL, in rtw89_pci_resume()
3726 rtw89_write32_clr(rtwdev, R_AX_PCIE_INIT_CFG1, in rtw89_pci_resume()
3729 rtw89_write32_set(rtwdev, R_AX_PCIE_PS_CTRL_V1, in rtw89_pci_resume()
3731 rtw89_write32_clr(rtwdev, R_AX_PCIE_PS_CTRL_V1, in rtw89_pci_resume()
3734 rtw89_pci_l2_hci_ldo(rtwdev); in rtw89_pci_resume()
3735 rtw89_pci_filter_out(rtwdev); in rtw89_pci_resume()
3736 rtw89_pci_link_cfg(rtwdev); in rtw89_pci_resume()
3737 rtw89_pci_l1ss_cfg(rtwdev); in rtw89_pci_resume()
3778 struct rtw89_dev *rtwdev; in rtw89_pci_probe() local
3785 rtwdev = rtw89_alloc_ieee80211_hw(&pdev->dev, in rtw89_pci_probe()
3788 if (!rtwdev) { in rtw89_pci_probe()
3795 rtwdev->pci_info = info->bus.pci; in rtw89_pci_probe()
3796 rtwdev->hci.ops = &rtw89_pci_ops; in rtw89_pci_probe()
3797 rtwdev->hci.type = RTW89_HCI_TYPE_PCIE; in rtw89_pci_probe()
3798 rtwdev->hci.rpwm_addr = pci_info->rpwm_addr; in rtw89_pci_probe()
3799 rtwdev->hci.cpwm_addr = pci_info->cpwm_addr; in rtw89_pci_probe()
3801 SET_IEEE80211_DEV(rtwdev->hw, &pdev->dev); in rtw89_pci_probe()
3803 ret = rtw89_core_init(rtwdev); in rtw89_pci_probe()
3805 rtw89_err(rtwdev, "failed to initialise core\n"); in rtw89_pci_probe()
3809 ret = rtw89_pci_claim_device(rtwdev, pdev); in rtw89_pci_probe()
3811 rtw89_err(rtwdev, "failed to claim pci device\n"); in rtw89_pci_probe()
3815 ret = rtw89_pci_setup_resource(rtwdev, pdev); in rtw89_pci_probe()
3817 rtw89_err(rtwdev, "failed to setup pci resource\n"); in rtw89_pci_probe()
3821 ret = rtw89_chip_info_setup(rtwdev); in rtw89_pci_probe()
3823 rtw89_err(rtwdev, "failed to setup chip information\n"); in rtw89_pci_probe()
3827 rtw89_pci_filter_out(rtwdev); in rtw89_pci_probe()
3828 rtw89_pci_link_cfg(rtwdev); in rtw89_pci_probe()
3829 rtw89_pci_l1ss_cfg(rtwdev); in rtw89_pci_probe()
3831 ret = rtw89_core_register(rtwdev); in rtw89_pci_probe()
3833 rtw89_err(rtwdev, "failed to register core\n"); in rtw89_pci_probe()
3837 rtw89_core_napi_init(rtwdev); in rtw89_pci_probe()
3839 ret = rtw89_pci_request_irq(rtwdev, pdev); in rtw89_pci_probe()
3841 rtw89_err(rtwdev, "failed to request pci irq\n"); in rtw89_pci_probe()
3848 rtw89_core_napi_deinit(rtwdev); in rtw89_pci_probe()
3849 rtw89_core_unregister(rtwdev); in rtw89_pci_probe()
3851 rtw89_pci_clear_resource(rtwdev, pdev); in rtw89_pci_probe()
3853 rtw89_pci_declaim_device(rtwdev, pdev); in rtw89_pci_probe()
3855 rtw89_core_deinit(rtwdev); in rtw89_pci_probe()
3857 rtw89_free_ieee80211_hw(rtwdev); in rtw89_pci_probe()
3866 struct rtw89_dev *rtwdev; in rtw89_pci_remove() local
3868 rtwdev = hw->priv; in rtw89_pci_remove()
3870 rtw89_pci_free_irq(rtwdev, pdev); in rtw89_pci_remove()
3871 rtw89_core_napi_deinit(rtwdev); in rtw89_pci_remove()
3872 rtw89_core_unregister(rtwdev); in rtw89_pci_remove()
3873 rtw89_pci_clear_resource(rtwdev, pdev); in rtw89_pci_remove()
3874 rtw89_pci_declaim_device(rtwdev, pdev); in rtw89_pci_remove()
3875 rtw89_core_deinit(rtwdev); in rtw89_pci_remove()
3876 rtw89_free_ieee80211_hw(rtwdev); in rtw89_pci_remove()