1169 			rtw89_write32_clr(rtwdev, R_AX_SYS_ISO_CTRL_EXTEND,  in cmac_func_en()
1177 		rtw89_write32_clr(rtwdev, addrl_func_en[mac_idx], func_en);  in cmac_func_en()
1178 		rtw89_write32_clr(rtwdev, addrl_ck_en[mac_idx], ck_en);  in cmac_func_en()
1180 			rtw89_write32_clr(rtwdev, R_AX_SYS_ISO_CTRL_EXTEND,  in cmac_func_en()
1184 			rtw89_write32_clr(rtwdev, R_AX_AFE_CTRL1, c1pc_en);  in cmac_func_en()
1358 		rtw89_write32_clr(rtwdev, R_AX_DMAC_FUNC_EN,  in dle_func_en()
1368 		rtw89_write32_clr(rtwdev, R_AX_DMAC_CLK_EN,  in dle_clk_en()
1661 	rtw89_write32_clr(rtwdev, R_AX_SS_CTRL, B_AX_SS_NONEMPTY_SS2FINFO_EN);  in sta_sch_init()
1813 	rtw89_write32_clr(rtwdev, reg, B_AX_BTCCA_EN);  in scheduler_init()
2000 	rtw89_write32_clr(rtwdev, reg, B_AX_MACLBK_EN);  in tmac_init()
2768 	rtw89_write32_clr(rtwdev, R_AX_WDRLS_ERR_IMR, B_AX_WDRLS_IMR_EN_CLR);  in rtw89_wdrls_imr_enable()
2784 	rtw89_write32_clr(rtwdev, R_AX_MPDU_TX_ERR_IMR,  in rtw89_mpdu_trx_imr_enable()
2791 		rtw89_write32_clr(rtwdev, R_AX_MPDU_TX_ERR_IMR,  in rtw89_mpdu_trx_imr_enable()
2799 	rtw89_write32_clr(rtwdev, R_AX_MPDU_RX_ERR_IMR,  in rtw89_mpdu_trx_imr_enable()
2811 	rtw89_write32_clr(rtwdev, R_AX_STA_SCHEDULER_ERR_IMR,  in rtw89_sta_sch_imr_enable()
2823 	rtw89_write32_clr(rtwdev, imr->txpktctl_imr_b0_reg,  in rtw89_txpktctl_imr_enable()
2827 	rtw89_write32_clr(rtwdev, imr->txpktctl_imr_b1_reg,  in rtw89_txpktctl_imr_enable()
2837 	rtw89_write32_clr(rtwdev, R_AX_WDE_ERR_IMR, imr->wde_imr_clr);  in rtw89_wde_imr_enable()
2845 	rtw89_write32_clr(rtwdev, R_AX_PLE_ERR_IMR, imr->ple_imr_clr);  in rtw89_ple_imr_enable()
2859 	rtw89_write32_clr(rtwdev, R_AX_HOST_DISPATCHER_ERR_IMR,  in rtw89_dispatcher_imr_enable()
2863 	rtw89_write32_clr(rtwdev, R_AX_CPU_DISPATCHER_ERR_IMR,  in rtw89_dispatcher_imr_enable()
2867 	rtw89_write32_clr(rtwdev, R_AX_OTHER_DISPATCHER_ERR_IMR,  in rtw89_dispatcher_imr_enable()
2875 	rtw89_write32_clr(rtwdev, R_AX_CPUIO_ERR_IMR, B_AX_CPUIO_IMR_CLR);  in rtw89_cpuio_imr_enable()
2885 	rtw89_write32_clr(rtwdev, imr->bbrpt_chinfo_err_imr_reg,  in rtw89_bbrpt_imr_enable()
2899 	rtw89_write32_clr(rtwdev, reg, B_AX_SORT_NON_IDLE_ERR_INT_EN |  in rtw89_scheduler_imr_enable()
2910 	rtw89_write32_clr(rtwdev, reg, imr->ptcl_imr_clr);  in rtw89_ptcl_imr_enable()
2921 	rtw89_write32_clr(rtwdev, reg, imr->cdma_imr_0_clr);  in rtw89_cdma_imr_enable()
2926 		rtw89_write32_clr(rtwdev, reg, imr->cdma_imr_1_clr);  in rtw89_cdma_imr_enable()
2937 	rtw89_write32_clr(rtwdev, reg, imr->phy_intf_imr_clr);  in rtw89_phy_intf_imr_enable()
2947 	rtw89_write32_clr(rtwdev, reg, imr->rmac_imr_clr);  in rtw89_rmac_imr_enable()
2957 	rtw89_write32_clr(rtwdev, reg, imr->tmac_imr_clr);  in rtw89_tmac_imr_enable()
3046 		rtw89_write32_clr(rtwdev, R_AX_RLSRPT0_CFG0,  in set_host_rpr()
3121 	rtw89_write32_clr(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_WCPU_EN);  in rtw89_mac_disable_cpu()
3122 	rtw89_write32_clr(rtwdev, R_AX_WCPU_FW_CTRL, B_AX_WCPU_FWDL_EN |  in rtw89_mac_disable_cpu()
3124 	rtw89_write32_clr(rtwdev, R_AX_SYS_CLK_CTRL, B_AX_CPU_CLK_EN);  in rtw89_mac_disable_cpu()
3128 	rtw89_write32_clr(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_PLATFORM_EN);  in rtw89_mac_disable_cpu()
3198 	rtw89_write32_clr(rtwdev, R_AX_HAXI_DMA_STOP1,  in rtw89_mac_dmac_pre_init()
3203 	rtw89_write32_clr(rtwdev, R_AX_HAXI_DMA_STOP2, B_AX_STOP_CH10 | B_AX_STOP_CH11);  in rtw89_mac_dmac_pre_init()
3239 	rtw89_write32_clr(rtwdev, R_AX_WLRF_CTRL,  in rtw89_mac_disable_bb_rf()
3601 		rtw89_write32_clr(rtwdev, reg, B_AX_P0MB_ALL_MASK);  in rtw89_mac_port_cfg_mbssid()
3780 		rtw89_write32_clr(rtwdev, reg, B_AX_RXTRIG_RU26_DIS);  in rtw89_mac_set_he_obss_narrow_bw_ru()
4024 		rtw89_write32_clr(rtwdev, reg, B_AX_PPDU_STAT_RPT_EN);  in rtw89_mac_cfg_ppdu_status()
4400 		rtw89_write32_clr(rtwdev, reg, mask);  in rtw89_mac_bfee_ctrl()
4535 	rtw89_write32_clr(rtwdev, reg, B_AX_BFMEE_CSI_FORCE_RETE_EN);  in rtw89_mac_csi_rrsc()