Lines Matching refs:GENMASK
22 u32_get_bits(info, GENMASK(6, 0))
24 u32_get_bits(info, GENMASK(11, 8))
27 u32p_replace_bits(info, val, GENMASK(6, 0))
29 u32p_replace_bits(info, val, GENMASK(11, 8))
67 u32_get_bits(*((const u32 *)(info)), GENMASK(6, 0))
71 u32_get_bits(*((const u32 *)(info)), GENMASK(11, 8))
73 u32_get_bits(*((const u32 *)(info)), GENMASK(15, 12))
75 u32_get_bits(*((const u32 *)(info)), GENMASK(23, 16))
77 u32_get_bits(*((const u32 *)(info)), GENMASK(31, 24))
79 u32_get_bits(*((const u32 *)(info) + 1), GENMASK(7, 0))
81 u32_get_bits(*((const u32 *)(info) + 1), GENMASK(15, 8))
83 u32_get_bits(*((const u32 *)(info) + 1), GENMASK(23, 16))
85 u32_get_bits(*((const u32 *)(info) + 1), GENMASK(31, 24))
87 u32_get_bits(*((const u32 *)(info) + 2), GENMASK(7, 0))
89 u32_get_bits(*((const u32 *)(info) + 3), GENMASK(15, 8))
91 u32_get_bits(*((const u32 *)(info) + 3), GENMASK(23, 16))
253 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(5, 1)); in RTW89_SET_FWCMD_RA_MODE()
258 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(7, 6)); in RTW89_SET_FWCMD_RA_BW_CAP()
263 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(15, 8)); in RTW89_SET_FWCMD_RA_MACID()
278 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(19, 18)); in RTW89_SET_FWCMD_RA_INIT_RATE_LV()
303 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(26, 24)); in RTW89_SET_FWCMD_RA_SS_NUM()
308 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(29, 27)); in RTW89_SET_FWCMD_RA_GILTF()
323 le32p_replace_bits((__le32 *)(cmd) + 0x01, val, GENMASK(7, 0)); in RTW89_SET_FWCMD_RA_MASK_0()
328 le32p_replace_bits((__le32 *)(cmd) + 0x01, val, GENMASK(15, 8)); in RTW89_SET_FWCMD_RA_MASK_1()
333 le32p_replace_bits((__le32 *)(cmd) + 0x01, val, GENMASK(23, 16)); in RTW89_SET_FWCMD_RA_MASK_2()
338 le32p_replace_bits((__le32 *)(cmd) + 0x01, val, GENMASK(31, 24)); in RTW89_SET_FWCMD_RA_MASK_3()
343 le32p_replace_bits((__le32 *)(cmd) + 0x02, val, GENMASK(7, 0)); in RTW89_SET_FWCMD_RA_MASK_4()
353 le32p_replace_bits((__le32 *)(cmd) + 0x03, val, GENMASK(7, 0)); in RTW89_SET_FWCMD_RA_BAND_NUM()
378 le32p_replace_bits((__le32 *)(cmd) + 0x03, val, GENMASK(14, 12)); in RTW89_SET_FWCMD_RA_FIX_GILTF()
383 le32p_replace_bits((__le32 *)(cmd) + 0x03, val, GENMASK(23, 16)); in RTW89_SET_FWCMD_RA_FIXED_CSI_MCS_SS_IDX()
388 le32p_replace_bits((__le32 *)(cmd) + 0x03, val, GENMASK(25, 24)); in RTW89_SET_FWCMD_RA_FIXED_CSI_MODE()
393 le32p_replace_bits((__le32 *)(cmd) + 0x03, val, GENMASK(28, 26)); in RTW89_SET_FWCMD_RA_FIXED_CSI_GI_LTF()
398 le32p_replace_bits((__le32 *)(cmd) + 0x03, val, GENMASK(31, 29)); in RTW89_SET_FWCMD_RA_FIXED_CSI_BW()
403 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(7, 0)); in RTW89_SET_FWCMD_SEC_IDX()
408 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(15, 8)); in RTW89_SET_FWCMD_SEC_OFFSET()
413 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(23, 16)); in RTW89_SET_FWCMD_SEC_LEN()
418 le32p_replace_bits((__le32 *)(cmd) + 0x01, val, GENMASK(3, 0)); in RTW89_SET_FWCMD_SEC_TYPE()
433 le32p_replace_bits((__le32 *)(cmd) + 0x02, val, GENMASK(31, 0)); in RTW89_SET_FWCMD_SEC_KEY0()
438 le32p_replace_bits((__le32 *)(cmd) + 0x03, val, GENMASK(31, 0)); in RTW89_SET_FWCMD_SEC_KEY1()
443 le32p_replace_bits((__le32 *)(cmd) + 0x04, val, GENMASK(31, 0)); in RTW89_SET_FWCMD_SEC_KEY2()
448 le32p_replace_bits((__le32 *)(cmd) + 0x05, val, GENMASK(31, 0)); in RTW89_SET_FWCMD_SEC_KEY3()
453 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(1, 0)); in RTW89_SET_EDCA_SEL()
468 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(6, 5)); in RTW89_SET_EDCA_AC()
473 le32p_replace_bits((__le32 *)(cmd) + 0x01, val, GENMASK(31, 0)); in RTW89_SET_EDCA_PARAM()
475 #define FW_EDCA_PARAM_TXOPLMT_MSK GENMASK(26, 16)
476 #define FW_EDCA_PARAM_CWMAX_MSK GENMASK(15, 12)
477 #define FW_EDCA_PARAM_CWMIN_MSK GENMASK(11, 8)
478 #define FW_EDCA_PARAM_AIFS_MSK GENMASK(7, 0)
481 le32_get_bits(*((const __le32 *)(fwhdr) + 1), GENMASK(23, 0))
487 le32_get_bits(*((const __le32 *)(fwhdr)), GENMASK(31, 0))
490 le32_get_bits(*((const __le32 *)(fwhdr) + 1), GENMASK(7, 0))
492 le32_get_bits(*((const __le32 *)(fwhdr) + 1), GENMASK(15, 8))
494 le32_get_bits(*((const __le32 *)(fwhdr) + 1), GENMASK(23, 16))
496 le32_get_bits(*((const __le32 *)(fwhdr) + 1), GENMASK(31, 24))
498 le32_get_bits(*((const __le32 *)(fwhdr) + 4), GENMASK(7, 0))
500 le32_get_bits(*((const __le32 *)(fwhdr) + 4), GENMASK(15, 8))
502 le32_get_bits(*((const __le32 *)(fwhdr) + 4), GENMASK(23, 16))
504 le32_get_bits(*((const __le32 *)(fwhdr) + 4), GENMASK(31, 24))
506 le32_get_bits(*((const __le32 *)(fwhdr) + 5), GENMASK(31, 0))
508 le32_get_bits(*((const __le32 *)(fwhdr) + 6), GENMASK(15, 8))
510 le32_get_bits(*((const __le32 *)(fwhdr) + 7), GENMASK(31, 24))
513 le32p_replace_bits((__le32 *)fwhdr + 7, val, GENMASK(15, 0)); in SET_FW_HDR_PART_SIZE()
518 le32p_replace_bits((__le32 *)(table) + 0, val, GENMASK(6, 0)); in SET_CTRL_INFO_MACID()
525 #define SET_CMC_TBL_MASK_DATARATE GENMASK(8, 0)
528 le32p_replace_bits((__le32 *)(table) + 1, val, GENMASK(8, 0)); in SET_CMC_TBL_DATARATE()
530 GENMASK(8, 0)); in SET_CMC_TBL_DATARATE()
539 #define SET_CMC_TBL_MASK_DATA_BW GENMASK(1, 0)
542 le32p_replace_bits((__le32 *)(table) + 1, val, GENMASK(11, 10)); in SET_CMC_TBL_DATA_BW()
544 GENMASK(11, 10)); in SET_CMC_TBL_DATA_BW()
546 #define SET_CMC_TBL_MASK_DATA_GI_LTF GENMASK(2, 0)
549 le32p_replace_bits((__le32 *)(table) + 1, val, GENMASK(14, 12)); in SET_CMC_TBL_DATA_GI_LTF()
551 GENMASK(14, 12)); in SET_CMC_TBL_DATA_GI_LTF()
560 #define SET_CMC_TBL_MASK_ARFR_CTRL GENMASK(3, 0)
563 le32p_replace_bits((__le32 *)(table) + 1, val, GENMASK(19, 16)); in SET_CMC_TBL_ARFR_CTRL()
565 GENMASK(19, 16)); in SET_CMC_TBL_ARFR_CTRL()
616 #define SET_CMC_TBL_MASK_AMPDU_DENSITY GENMASK(3, 0)
619 le32p_replace_bits((__le32 *)(table) + 1, val, GENMASK(31, 28)); in SET_CMC_TBL_AMPDU_DENSITY()
621 GENMASK(31, 28)); in SET_CMC_TBL_AMPDU_DENSITY()
623 #define SET_CMC_TBL_MASK_DATA_RTY_LOWEST_RATE GENMASK(8, 0)
626 le32p_replace_bits((__le32 *)(table) + 2, val, GENMASK(8, 0)); in SET_CMC_TBL_DATA_RTY_LOWEST_RATE()
628 GENMASK(8, 0)); in SET_CMC_TBL_DATA_RTY_LOWEST_RATE()
651 #define SET_CMC_TBL_MASK_RTS_TXCNT_LMT GENMASK(3, 0)
654 le32p_replace_bits((__le32 *)(table) + 2, val, GENMASK(15, 12)); in SET_CMC_TBL_RTS_TXCNT_LMT()
656 GENMASK(15, 12)); in SET_CMC_TBL_RTS_TXCNT_LMT()
658 #define SET_CMC_TBL_MASK_RTSRATE GENMASK(8, 0)
661 le32p_replace_bits((__le32 *)(table) + 2, val, GENMASK(24, 16)); in SET_CMC_TBL_RTSRATE()
663 GENMASK(24, 16)); in SET_CMC_TBL_RTSRATE()
672 #define SET_CMC_TBL_MASK_RTS_RTY_LOWEST_RATE GENMASK(3, 0)
675 le32p_replace_bits((__le32 *)(table) + 2, val, GENMASK(31, 28)); in SET_CMC_TBL_RTS_RTY_LOWEST_RATE()
677 GENMASK(31, 28)); in SET_CMC_TBL_RTS_RTY_LOWEST_RATE()
679 #define SET_CMC_TBL_MASK_DATA_TX_CNT_LMT GENMASK(5, 0)
682 le32p_replace_bits((__le32 *)(table) + 3, val, GENMASK(5, 0)); in SET_CMC_TBL_DATA_TX_CNT_LMT()
684 GENMASK(5, 0)); in SET_CMC_TBL_DATA_TX_CNT_LMT()
714 #define SET_CMC_TBL_MASK_CCA_RTS GENMASK(1, 0)
717 le32p_replace_bits((__le32 *)(table) + 3, val, GENMASK(11, 10)); in SET_CMC_TBL_CCA_RTS()
719 GENMASK(11, 10)); in SET_CMC_TBL_CCA_RTS()
728 #define SET_CMC_TBL_MASK_RTS_DROP_DATA_MODE GENMASK(1, 0)
731 le32p_replace_bits((__le32 *)(table) + 3, val, GENMASK(14, 13)); in SET_CMC_TBL_RTS_DROP_DATA_MODE()
733 GENMASK(14, 13)); in SET_CMC_TBL_RTS_DROP_DATA_MODE()
735 #define SET_CMC_TBL_MASK_AMPDU_MAX_LEN GENMASK(10, 0)
738 le32p_replace_bits((__le32 *)(table) + 3, val, GENMASK(26, 16)); in SET_CMC_TBL_AMPDU_MAX_LEN()
740 GENMASK(26, 16)); in SET_CMC_TBL_AMPDU_MAX_LEN()
749 #define SET_CMC_TBL_MASK_AMPDU_MAX_TIME GENMASK(3, 0)
752 le32p_replace_bits((__le32 *)(table) + 3, val, GENMASK(31, 28)); in SET_CMC_TBL_AMPDU_MAX_TIME()
754 GENMASK(31, 28)); in SET_CMC_TBL_AMPDU_MAX_TIME()
756 #define SET_CMC_TBL_MASK_MAX_AGG_NUM GENMASK(7, 0)
759 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(7, 0)); in SET_CMC_TBL_MAX_AGG_NUM()
761 GENMASK(7, 0)); in SET_CMC_TBL_MAX_AGG_NUM()
763 #define SET_CMC_TBL_MASK_BA_BMAP GENMASK(1, 0)
766 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(9, 8)); in SET_CMC_TBL_BA_BMAP()
768 GENMASK(9, 8)); in SET_CMC_TBL_BA_BMAP()
770 #define SET_CMC_TBL_MASK_VO_LFTIME_SEL GENMASK(2, 0)
773 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(18, 16)); in SET_CMC_TBL_VO_LFTIME_SEL()
775 GENMASK(18, 16)); in SET_CMC_TBL_VO_LFTIME_SEL()
777 #define SET_CMC_TBL_MASK_VI_LFTIME_SEL GENMASK(2, 0)
780 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(21, 19)); in SET_CMC_TBL_VI_LFTIME_SEL()
782 GENMASK(21, 19)); in SET_CMC_TBL_VI_LFTIME_SEL()
784 #define SET_CMC_TBL_MASK_BE_LFTIME_SEL GENMASK(2, 0)
787 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(24, 22)); in SET_CMC_TBL_BE_LFTIME_SEL()
789 GENMASK(24, 22)); in SET_CMC_TBL_BE_LFTIME_SEL()
791 #define SET_CMC_TBL_MASK_BK_LFTIME_SEL GENMASK(2, 0)
794 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(27, 25)); in SET_CMC_TBL_BK_LFTIME_SEL()
796 GENMASK(27, 25)); in SET_CMC_TBL_BK_LFTIME_SEL()
798 #define SET_CMC_TBL_MASK_SECTYPE GENMASK(3, 0)
801 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(31, 28)); in SET_CMC_TBL_SECTYPE()
803 GENMASK(31, 28)); in SET_CMC_TBL_SECTYPE()
805 #define SET_CMC_TBL_MASK_MULTI_PORT_ID GENMASK(2, 0)
808 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(2, 0)); in SET_CMC_TBL_MULTI_PORT_ID()
810 GENMASK(2, 0)); in SET_CMC_TBL_MULTI_PORT_ID()
819 #define SET_CMC_TBL_MASK_MBSSID GENMASK(3, 0)
822 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(7, 4)); in SET_CMC_TBL_MBSSID()
824 GENMASK(7, 4)); in SET_CMC_TBL_MBSSID()
833 #define SET_CMC_TBL_MASK_TXPWR_MODE GENMASK(2, 0)
836 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(11, 9)); in SET_CMC_TBL_TXPWR_MODE()
838 GENMASK(11, 9)); in SET_CMC_TBL_TXPWR_MODE()
917 #define SET_CMC_TBL_MASK_CTRL_CNT GENMASK(3, 0)
920 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(31, 28)); in SET_CMC_TBL_CTRL_CNT()
922 GENMASK(31, 28)); in SET_CMC_TBL_CTRL_CNT()
924 #define SET_CMC_TBL_MASK_RESP_REF_RATE GENMASK(8, 0)
927 le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(8, 0)); in SET_CMC_TBL_RESP_REF_RATE()
929 GENMASK(8, 0)); in SET_CMC_TBL_RESP_REF_RATE()
945 #define SET_CMC_TBL_MASK_NTX_PATH_EN GENMASK(3, 0)
948 le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(19, 16)); in SET_CMC_TBL_NTX_PATH_EN()
950 GENMASK(19, 16)); in SET_CMC_TBL_NTX_PATH_EN()
952 #define SET_CMC_TBL_MASK_PATH_MAP_A GENMASK(1, 0)
955 le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(21, 20)); in SET_CMC_TBL_PATH_MAP_A()
957 GENMASK(21, 20)); in SET_CMC_TBL_PATH_MAP_A()
959 #define SET_CMC_TBL_MASK_PATH_MAP_B GENMASK(1, 0)
962 le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(23, 22)); in SET_CMC_TBL_PATH_MAP_B()
964 GENMASK(23, 22)); in SET_CMC_TBL_PATH_MAP_B()
966 #define SET_CMC_TBL_MASK_PATH_MAP_C GENMASK(1, 0)
969 le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(25, 24)); in SET_CMC_TBL_PATH_MAP_C()
971 GENMASK(25, 24)); in SET_CMC_TBL_PATH_MAP_C()
973 #define SET_CMC_TBL_MASK_PATH_MAP_D GENMASK(1, 0)
976 le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(27, 26)); in SET_CMC_TBL_PATH_MAP_D()
978 GENMASK(27, 26)); in SET_CMC_TBL_PATH_MAP_D()
1009 #define SET_CMC_TBL_MASK_NOMINAL_PKT_PADDING GENMASK(1, 0)
1012 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(1, 0)); in SET_CMC_TBL_NOMINAL_PKT_PADDING_V1()
1014 GENMASK(1, 0)); in SET_CMC_TBL_NOMINAL_PKT_PADDING_V1()
1019 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(3, 2)); in SET_CMC_TBL_NOMINAL_PKT_PADDING40_V1()
1021 GENMASK(3, 2)); in SET_CMC_TBL_NOMINAL_PKT_PADDING40_V1()
1026 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(5, 4)); in SET_CMC_TBL_NOMINAL_PKT_PADDING80_V1()
1028 GENMASK(5, 4)); in SET_CMC_TBL_NOMINAL_PKT_PADDING80_V1()
1033 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(7, 6)); in SET_CMC_TBL_NOMINAL_PKT_PADDING160_V1()
1035 GENMASK(7, 6)); in SET_CMC_TBL_NOMINAL_PKT_PADDING160_V1()
1038 #define SET_CMC_TBL_MASK_ADDR_CAM_INDEX GENMASK(7, 0)
1041 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(7, 0)); in SET_CMC_TBL_ADDR_CAM_INDEX()
1043 GENMASK(7, 0)); in SET_CMC_TBL_ADDR_CAM_INDEX()
1045 #define SET_CMC_TBL_MASK_PAID GENMASK(8, 0)
1048 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(16, 8)); in SET_CMC_TBL_PAID()
1050 GENMASK(16, 8)); in SET_CMC_TBL_PAID()
1059 #define SET_CMC_TBL_MASK_DOPPLER_CTRL GENMASK(1, 0)
1062 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(19, 18)); in SET_CMC_TBL_DOPPLER_CTRL()
1064 GENMASK(19, 18)); in SET_CMC_TBL_DOPPLER_CTRL()
1068 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(21, 20)); in SET_CMC_TBL_NOMINAL_PKT_PADDING()
1070 GENMASK(21, 20)); in SET_CMC_TBL_NOMINAL_PKT_PADDING()
1075 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(23, 22)); in SET_CMC_TBL_NOMINAL_PKT_PADDING40()
1077 GENMASK(23, 22)); in SET_CMC_TBL_NOMINAL_PKT_PADDING40()
1079 #define SET_CMC_TBL_MASK_TXPWR_TOLERENCE GENMASK(3, 0)
1082 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(27, 24)); in SET_CMC_TBL_TXPWR_TOLERENCE()
1084 GENMASK(27, 24)); in SET_CMC_TBL_TXPWR_TOLERENCE()
1089 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(31, 30)); in SET_CMC_TBL_NOMINAL_PKT_PADDING80()
1091 GENMASK(31, 30)); in SET_CMC_TBL_NOMINAL_PKT_PADDING80()
1093 #define SET_CMC_TBL_MASK_NC GENMASK(2, 0)
1096 le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(2, 0)); in SET_CMC_TBL_NC()
1098 GENMASK(2, 0)); in SET_CMC_TBL_NC()
1100 #define SET_CMC_TBL_MASK_NR GENMASK(2, 0)
1103 le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(5, 3)); in SET_CMC_TBL_NR()
1105 GENMASK(5, 3)); in SET_CMC_TBL_NR()
1107 #define SET_CMC_TBL_MASK_NG GENMASK(1, 0)
1110 le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(7, 6)); in SET_CMC_TBL_NG()
1112 GENMASK(7, 6)); in SET_CMC_TBL_NG()
1114 #define SET_CMC_TBL_MASK_CB GENMASK(1, 0)
1117 le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(9, 8)); in SET_CMC_TBL_CB()
1119 GENMASK(9, 8)); in SET_CMC_TBL_CB()
1121 #define SET_CMC_TBL_MASK_CS GENMASK(1, 0)
1124 le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(11, 10)); in SET_CMC_TBL_CS()
1126 GENMASK(11, 10)); in SET_CMC_TBL_CS()
1156 #define SET_CMC_TBL_MASK_CSI_FIX_RATE GENMASK(8, 0)
1159 le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(24, 16)); in SET_CMC_TBL_CSI_FIX_RATE()
1161 GENMASK(24, 16)); in SET_CMC_TBL_CSI_FIX_RATE()
1163 #define SET_CMC_TBL_MASK_CSI_GI_LTF GENMASK(2, 0)
1166 le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(27, 25)); in SET_CMC_TBL_CSI_GI_LTF()
1168 GENMASK(27, 25)); in SET_CMC_TBL_CSI_GI_LTF()
1173 le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(29, 28)); in SET_CMC_TBL_NOMINAL_PKT_PADDING160()
1175 GENMASK(29, 28)); in SET_CMC_TBL_NOMINAL_PKT_PADDING160()
1178 #define SET_CMC_TBL_MASK_CSI_BW GENMASK(1, 0)
1181 le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(31, 30)); in SET_CMC_TBL_CSI_BW()
1183 GENMASK(31, 30)); in SET_CMC_TBL_CSI_BW()
1188 le32p_replace_bits((__le32 *)(table) + 0, val, GENMASK(6, 0)); in SET_DCTL_MACID_V1()
1196 #define SET_DCTL_MASK_QOS_FIELD_V1 GENMASK(7, 0)
1199 le32p_replace_bits((__le32 *)(table) + 1, val, GENMASK(7, 0)); in SET_DCTL_QOS_FIELD_V1()
1201 GENMASK(7, 0)); in SET_DCTL_QOS_FIELD_V1()
1204 #define SET_DCTL_MASK_SET_DCTL_HW_EXSEQ_MACID GENMASK(6, 0)
1207 le32p_replace_bits((__le32 *)(table) + 1, val, GENMASK(14, 8)); in SET_DCTL_HW_EXSEQ_MACID_V1()
1209 GENMASK(14, 8)); in SET_DCTL_HW_EXSEQ_MACID_V1()
1220 #define SET_DCTL_MASK_AES_IV_L GENMASK(15, 0)
1223 le32p_replace_bits((__le32 *)(table) + 1, val, GENMASK(31, 16)); in SET_DCTL_AES_IV_L_V1()
1225 GENMASK(31, 16)); in SET_DCTL_AES_IV_L_V1()
1228 #define SET_DCTL_MASK_AES_IV_H GENMASK(31, 0)
1231 le32p_replace_bits((__le32 *)(table) + 2, val, GENMASK(31, 0)); in SET_DCTL_AES_IV_H_V1()
1233 GENMASK(31, 0)); in SET_DCTL_AES_IV_H_V1()
1236 #define SET_DCTL_MASK_SEQ0 GENMASK(11, 0)
1239 le32p_replace_bits((__le32 *)(table) + 3, val, GENMASK(11, 0)); in SET_DCTL_SEQ0_V1()
1241 GENMASK(11, 0)); in SET_DCTL_SEQ0_V1()
1244 #define SET_DCTL_MASK_SEQ1 GENMASK(11, 0)
1247 le32p_replace_bits((__le32 *)(table) + 3, val, GENMASK(23, 12)); in SET_DCTL_SEQ1_V1()
1249 GENMASK(23, 12)); in SET_DCTL_SEQ1_V1()
1252 #define SET_DCTL_MASK_AMSDU_MAX_LEN GENMASK(2, 0)
1255 le32p_replace_bits((__le32 *)(table) + 3, val, GENMASK(26, 24)); in SET_DCTL_AMSDU_MAX_LEN_V1()
1257 GENMASK(26, 24)); in SET_DCTL_AMSDU_MAX_LEN_V1()
1284 #define SET_DCTL_MASK_SEQ2 GENMASK(11, 0)
1287 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(11, 0)); in SET_DCTL_SEQ2_V1()
1289 GENMASK(11, 0)); in SET_DCTL_SEQ2_V1()
1292 #define SET_DCTL_MASK_SEQ3 GENMASK(11, 0)
1295 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(23, 12)); in SET_DCTL_SEQ3_V1()
1297 GENMASK(23, 12)); in SET_DCTL_SEQ3_V1()
1300 #define SET_DCTL_MASK_TGT_IND GENMASK(3, 0)
1303 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(27, 24)); in SET_DCTL_TGT_IND_V1()
1305 GENMASK(27, 24)); in SET_DCTL_TGT_IND_V1()
1316 #define SET_DCTL_MASK_HTC_LB GENMASK(2, 0)
1319 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(31, 29)); in SET_DCTL_HTC_LB_V1()
1321 GENMASK(31, 29)); in SET_DCTL_HTC_LB_V1()
1324 #define SET_DCTL_MASK_MHDR_LEN GENMASK(4, 0)
1327 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(4, 0)); in SET_DCTL_MHDR_LEN_V1()
1329 GENMASK(4, 0)); in SET_DCTL_MHDR_LEN_V1()
1340 #define SET_DCTL_MASK_VLAN_TAG_SEL GENMASK(1, 0)
1343 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(7, 6)); in SET_DCTL_VLAN_TAG_SEL_V1()
1345 GENMASK(7, 6)); in SET_DCTL_VLAN_TAG_SEL_V1()
1356 #define SET_DCTL_MASK_SEC_KEY_ID GENMASK(1, 0)
1359 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(10, 9)); in SET_DCTL_SEC_KEY_ID_V1()
1361 GENMASK(10, 9)); in SET_DCTL_SEC_KEY_ID_V1()
1372 #define SET_DCTL_MASK_SEC_ENT_MODE GENMASK(1, 0)
1375 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(17, 16)); in SET_DCTL_SEC_ENT_MODE_V1()
1377 GENMASK(17, 16)); in SET_DCTL_SEC_ENT_MODE_V1()
1380 #define SET_DCTL_MASK_SEC_ENTX_KEYID GENMASK(1, 0)
1383 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(19, 18)); in SET_DCTL_SEC_ENT0_KEYID_V1()
1385 GENMASK(19, 18)); in SET_DCTL_SEC_ENT0_KEYID_V1()
1390 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(21, 20)); in SET_DCTL_SEC_ENT1_KEYID_V1()
1392 GENMASK(21, 20)); in SET_DCTL_SEC_ENT1_KEYID_V1()
1397 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(23, 22)); in SET_DCTL_SEC_ENT2_KEYID_V1()
1399 GENMASK(23, 22)); in SET_DCTL_SEC_ENT2_KEYID_V1()
1404 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(25, 24)); in SET_DCTL_SEC_ENT3_KEYID_V1()
1406 GENMASK(25, 24)); in SET_DCTL_SEC_ENT3_KEYID_V1()
1411 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(27, 26)); in SET_DCTL_SEC_ENT4_KEYID_V1()
1413 GENMASK(27, 26)); in SET_DCTL_SEC_ENT4_KEYID_V1()
1418 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(29, 28)); in SET_DCTL_SEC_ENT5_KEYID_V1()
1420 GENMASK(29, 28)); in SET_DCTL_SEC_ENT5_KEYID_V1()
1425 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(31, 30)); in SET_DCTL_SEC_ENT6_KEYID_V1()
1427 GENMASK(31, 30)); in SET_DCTL_SEC_ENT6_KEYID_V1()
1430 #define SET_DCTL_MASK_SEC_ENT_VALID GENMASK(7, 0)
1433 le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(7, 0)); in SET_DCTL_SEC_ENT_VALID_V1()
1435 GENMASK(7, 0)); in SET_DCTL_SEC_ENT_VALID_V1()
1438 #define SET_DCTL_MASK_SEC_ENTX GENMASK(7, 0)
1441 le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(15, 8)); in SET_DCTL_SEC_ENT0_V1()
1443 GENMASK(15, 8)); in SET_DCTL_SEC_ENT0_V1()
1448 le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(23, 16)); in SET_DCTL_SEC_ENT1_V1()
1450 GENMASK(23, 16)); in SET_DCTL_SEC_ENT1_V1()
1455 le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(31, 24)); in SET_DCTL_SEC_ENT2_V1()
1457 GENMASK(31, 24)); in SET_DCTL_SEC_ENT2_V1()
1462 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(7, 0)); in SET_DCTL_SEC_ENT3_V1()
1464 GENMASK(7, 0)); in SET_DCTL_SEC_ENT3_V1()
1469 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(15, 8)); in SET_DCTL_SEC_ENT4_V1()
1471 GENMASK(15, 8)); in SET_DCTL_SEC_ENT4_V1()
1476 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(23, 16)); in SET_DCTL_SEC_ENT5_V1()
1478 GENMASK(23, 16)); in SET_DCTL_SEC_ENT5_V1()
1483 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(31, 24)); in SET_DCTL_SEC_ENT6_V1()
1485 GENMASK(31, 24)); in SET_DCTL_SEC_ENT6_V1()
1490 le32p_replace_bits((__le32 *)h2c, val, GENMASK(7, 0)); in SET_BCN_UPD_PORT()
1495 le32p_replace_bits((__le32 *)h2c, val, GENMASK(15, 8)); in SET_BCN_UPD_MBSSID()
1500 le32p_replace_bits((__le32 *)h2c, val, GENMASK(23, 16)); in SET_BCN_UPD_BAND()
1505 le32p_replace_bits((__le32 *)h2c, (val - 24) | BIT(7), GENMASK(31, 24)); in SET_BCN_UPD_GRP_IE_OFST()
1510 le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(7, 0)); in SET_BCN_UPD_MACID()
1515 le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(9, 8)); in SET_BCN_UPD_SSN_SEL()
1520 le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(11, 10)); in SET_BCN_UPD_SSN_MODE()
1525 le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(20, 12)); in SET_BCN_UPD_RATE()
1530 le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(23, 21)); in SET_BCN_UPD_TXPWR()
1540 le32p_replace_bits((__le32 *)(h2c) + 2, val, GENMASK(4, 1)); in SET_BCN_UPD_NTX_PATH_EN()
1545 le32p_replace_bits((__le32 *)(h2c) + 2, val, GENMASK(6, 5)); in SET_BCN_UPD_PATH_MAP_A()
1550 le32p_replace_bits((__le32 *)(h2c) + 2, val, GENMASK(8, 7)); in SET_BCN_UPD_PATH_MAP_B()
1555 le32p_replace_bits((__le32 *)(h2c) + 2, val, GENMASK(10, 9)); in SET_BCN_UPD_PATH_MAP_C()
1560 le32p_replace_bits((__le32 *)(h2c) + 2, val, GENMASK(12, 11)); in SET_BCN_UPD_PATH_MAP_D()
1585 le32p_replace_bits((__le32 *)(h2c) + 2, val, GENMASK(31, 17)); in SET_BCN_UPD_CSA_OFST()
1590 le32p_replace_bits((__le32 *)h2c, val, GENMASK(7, 0)); in SET_FWROLE_MAINTAIN_MACID()
1595 le32p_replace_bits((__le32 *)h2c, val, GENMASK(9, 8)); in SET_FWROLE_MAINTAIN_SELF_ROLE()
1600 le32p_replace_bits((__le32 *)h2c, val, GENMASK(12, 10)); in SET_FWROLE_MAINTAIN_UPD_MODE()
1605 le32p_replace_bits((__le32 *)h2c, val, GENMASK(16, 13)); in SET_FWROLE_MAINTAIN_WIFI_ROLE()
1610 le32p_replace_bits((__le32 *)h2c, val, GENMASK(7, 0)); in SET_JOININFO_MACID()
1625 le32p_replace_bits((__le32 *)h2c, val, GENMASK(11, 10)); in SET_JOININFO_WMM()
1640 le32p_replace_bits((__le32 *)h2c, val, GENMASK(15, 14)); in SET_JOININFO_DLBW()
1645 le32p_replace_bits((__le32 *)h2c, val, GENMASK(17, 16)); in SET_JOININFO_TF_MAC_PAD()
1650 le32p_replace_bits((__le32 *)h2c, val, GENMASK(20, 18)); in SET_JOININFO_DL_T_PE()
1655 le32p_replace_bits((__le32 *)h2c, val, GENMASK(23, 21)); in SET_JOININFO_PORT_ID()
1660 le32p_replace_bits((__le32 *)h2c, val, GENMASK(25, 24)); in SET_JOININFO_NET_TYPE()
1665 le32p_replace_bits((__le32 *)h2c, val, GENMASK(29, 26)); in SET_JOININFO_WIFI_ROLE()
1670 le32p_replace_bits((__le32 *)h2c, val, GENMASK(31, 30)); in SET_JOININFO_SELF_ROLE()
1675 le32p_replace_bits((__le32 *)h2c, val, GENMASK(7, 0)); in SET_GENERAL_PKT_MACID()
1680 le32p_replace_bits((__le32 *)h2c, val, GENMASK(15, 8)); in SET_GENERAL_PKT_PROBRSP_ID()
1685 le32p_replace_bits((__le32 *)h2c, val, GENMASK(23, 16)); in SET_GENERAL_PKT_PSPOLL_ID()
1690 le32p_replace_bits((__le32 *)h2c, val, GENMASK(31, 24)); in SET_GENERAL_PKT_NULL_ID()
1695 le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(7, 0)); in SET_GENERAL_PKT_QOS_NULL_ID()
1700 le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(15, 8)); in SET_GENERAL_PKT_CTS2SELF_ID()
1705 le32p_replace_bits((__le32 *)h2c, val, GENMASK(7, 0)); in SET_LOG_CFG_LEVEL()
1710 le32p_replace_bits((__le32 *)h2c, val, GENMASK(15, 8)); in SET_LOG_CFG_PATH()
1715 le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(31, 0)); in SET_LOG_CFG_COMP()
1720 le32p_replace_bits((__le32 *)(h2c) + 2, val, GENMASK(31, 0)); in SET_LOG_CFG_COMP_EXT()
1735 le32p_replace_bits((__le32 *)h2c, val, GENMASK(3, 2)); in SET_BA_CAM_ENTRY_IDX()
1740 le32p_replace_bits((__le32 *)h2c, val, GENMASK(7, 4)); in SET_BA_CAM_TID()
1745 le32p_replace_bits((__le32 *)h2c, val, GENMASK(15, 8)); in SET_BA_CAM_MACID()
1750 le32p_replace_bits((__le32 *)h2c, val, GENMASK(19, 16)); in SET_BA_CAM_BMAP_SIZE()
1755 le32p_replace_bits((__le32 *)h2c, val, GENMASK(31, 20)); in SET_BA_CAM_SSN()
1760 le32p_replace_bits((__le32 *)h2c + 1, val, GENMASK(7, 0)); in SET_BA_CAM_UID()
1775 le32p_replace_bits((__le32 *)h2c + 1, val, GENMASK(31, 28)); in SET_BA_CAM_ENTRY_IDX_V1()
1780 le32p_replace_bits((__le32 *)h2c, val, GENMASK(7, 0)); in SET_LPS_PARM_MACID()
1785 le32p_replace_bits((__le32 *)h2c, val, GENMASK(15, 8)); in SET_LPS_PARM_PSMODE()
1790 le32p_replace_bits((__le32 *)h2c, val, GENMASK(19, 16)); in SET_LPS_PARM_RLBM()
1795 le32p_replace_bits((__le32 *)h2c, val, GENMASK(23, 20)); in SET_LPS_PARM_SMARTPS()
1800 le32p_replace_bits((__le32 *)h2c, val, GENMASK(31, 24)); in SET_LPS_PARM_AWAKEINTERVAL()
1825 le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(15, 8)); in SET_LPS_PARM_LASTRPWM()
1830 le32p_replace_bits((__le32 *)cmd, val, GENMASK(31, 0)); in RTW89_SET_FWCMD_CPU_EXCEPTION_TYPE()
1835 le32p_replace_bits((__le32 *)cmd, val, GENMASK(7, 0)); in RTW89_SET_FWCMD_PKT_DROP_SEL()
1840 le32p_replace_bits((__le32 *)cmd, val, GENMASK(15, 8)); in RTW89_SET_FWCMD_PKT_DROP_MACID()
1845 le32p_replace_bits((__le32 *)cmd, val, GENMASK(23, 16)); in RTW89_SET_FWCMD_PKT_DROP_BAND()
1850 le32p_replace_bits((__le32 *)cmd, val, GENMASK(31, 24)); in RTW89_SET_FWCMD_PKT_DROP_PORT()
1855 le32p_replace_bits((__le32 *)cmd + 1, val, GENMASK(7, 0)); in RTW89_SET_FWCMD_PKT_DROP_MBSSID()
1860 le32p_replace_bits((__le32 *)cmd + 1, val, GENMASK(15, 8)); in RTW89_SET_FWCMD_PKT_DROP_ROLE_A_INFO_TF_TRS()
1913 u8p_replace_bits((u8 *)(cmd) + 0, val, GENMASK(7, 0)); in RTW89_SET_FWCMD_CXHDR_TYPE()
1918 u8p_replace_bits((u8 *)(cmd) + 1, val, GENMASK(7, 0)); in RTW89_SET_FWCMD_CXHDR_LEN()
1923 u8p_replace_bits((u8 *)(cmd) + 2, val, GENMASK(7, 0)); in RTW89_SET_FWCMD_CXINIT_ANT_TYPE()
1928 u8p_replace_bits((u8 *)(cmd) + 3, val, GENMASK(7, 0)); in RTW89_SET_FWCMD_CXINIT_ANT_NUM()
1933 u8p_replace_bits((u8 *)(cmd) + 4, val, GENMASK(7, 0)); in RTW89_SET_FWCMD_CXINIT_ANT_ISO()
1948 u8p_replace_bits((u8 *)(cmd) + 6, val, GENMASK(7, 0)); in RTW89_SET_FWCMD_CXINIT_MOD_RFE()
1953 u8p_replace_bits((u8 *)(cmd) + 7, val, GENMASK(7, 0)); in RTW89_SET_FWCMD_CXINIT_MOD_CV()
1973 u8p_replace_bits((u8 *)(cmd) + 10, val, GENMASK(7, 0)); in RTW89_SET_FWCMD_CXINIT_WL_GCH()
2003 u8p_replace_bits((u8 *)(cmd) + 2, val, GENMASK(7, 0)); in RTW89_SET_FWCMD_CXROLE_CONNECT_CNT()
2008 u8p_replace_bits((u8 *)(cmd) + 3, val, GENMASK(7, 0)); in RTW89_SET_FWCMD_CXROLE_LINK_MODE()
2078 u8p_replace_bits((u8 *)cmd + (6 + (12 + offset) * n), val, GENMASK(3, 1)); in RTW89_SET_FWCMD_CXROLE_ACT_PID()
2093 u8p_replace_bits((u8 *)cmd + (6 + (12 + offset) * n), val, GENMASK(7, 6)); in RTW89_SET_FWCMD_CXROLE_ACT_BAND()
2103 u8p_replace_bits((u8 *)cmd + (7 + (12 + offset) * n), val, GENMASK(7, 1)); in RTW89_SET_FWCMD_CXROLE_ACT_BW()
2108 u8p_replace_bits((u8 *)cmd + (8 + (12 + offset) * n), val, GENMASK(7, 0)); in RTW89_SET_FWCMD_CXROLE_ACT_ROLE()
2113 u8p_replace_bits((u8 *)cmd + (9 + (12 + offset) * n), val, GENMASK(7, 0)); in RTW89_SET_FWCMD_CXROLE_ACT_CH()
2118 le16p_replace_bits((__le16 *)((u8 *)cmd + (10 + (12 + offset) * n)), val, GENMASK(15, 0)); in RTW89_SET_FWCMD_CXROLE_ACT_TX_LVL()
2123 le16p_replace_bits((__le16 *)((u8 *)cmd + (12 + (12 + offset) * n)), val, GENMASK(15, 0)); in RTW89_SET_FWCMD_CXROLE_ACT_RX_LVL()
2128 le16p_replace_bits((__le16 *)((u8 *)cmd + (14 + (12 + offset) * n)), val, GENMASK(15, 0)); in RTW89_SET_FWCMD_CXROLE_ACT_TX_RATE()
2133 le16p_replace_bits((__le16 *)((u8 *)cmd + (16 + (12 + offset) * n)), val, GENMASK(15, 0)); in RTW89_SET_FWCMD_CXROLE_ACT_RX_RATE()
2138 le32p_replace_bits((__le32 *)((u8 *)cmd + (20 + (12 + offset) * n)), val, GENMASK(31, 0)); in RTW89_SET_FWCMD_CXROLE_ACT_NOA_DUR()
2143 le32p_replace_bits((__le32 *)((u8 *)cmd + offset), val, GENMASK(31, 0)); in RTW89_SET_FWCMD_CXROLE_MROLE_TYPE()
2148 le32p_replace_bits((__le32 *)((u8 *)cmd + offset + 4), val, GENMASK(31, 0)); in RTW89_SET_FWCMD_CXROLE_MROLE_NOA()
2163 le32p_replace_bits((__le32 *)((u8 *)cmd + offset + 8), val, GENMASK(3, 2)); in RTW89_SET_FWCMD_CXROLE_DBCC_2G_PHY()
2188 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, GENMASK(18, 3)); in RTW89_SET_FWCMD_CXCTRL_TRACE_STEP()
2193 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, GENMASK(1, 0)); in RTW89_SET_FWCMD_CXRFK_STATE()
2198 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, GENMASK(5, 2)); in RTW89_SET_FWCMD_CXRFK_PATH_MAP()
2203 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, GENMASK(7, 6)); in RTW89_SET_FWCMD_CXRFK_PHY_MAP()
2208 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, GENMASK(9, 8)); in RTW89_SET_FWCMD_CXRFK_BAND()
2213 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, GENMASK(17, 10)); in RTW89_SET_FWCMD_CXRFK_TYPE()
2218 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(7, 0)); in RTW89_SET_FWCMD_PACKET_OFLD_PKT_IDX()
2223 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(10, 8)); in RTW89_SET_FWCMD_PACKET_OFLD_PKT_OP()
2228 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(31, 16)); in RTW89_SET_FWCMD_PACKET_OFLD_PKT_LENGTH()
2233 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(7, 0)); in RTW89_SET_FWCMD_SCANOFLD_CH_NUM()
2238 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(15, 8)); in RTW89_SET_FWCMD_SCANOFLD_CH_SIZE()
2243 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(7, 0)); in RTW89_SET_FWCMD_CHINFO_PERIOD()
2248 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(15, 8)); in RTW89_SET_FWCMD_CHINFO_DWELL()
2253 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(23, 16)); in RTW89_SET_FWCMD_CHINFO_CENTER_CH()
2258 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(31, 24)); in RTW89_SET_FWCMD_CHINFO_PRI_CH()
2263 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(2, 0)); in RTW89_SET_FWCMD_CHINFO_BW()
2268 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(7, 3)); in RTW89_SET_FWCMD_CHINFO_ACTION()
2273 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(11, 8)); in RTW89_SET_FWCMD_CHINFO_NUM_PKT()
2288 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(15, 14)); in RTW89_SET_FWCMD_CHINFO_BAND()
2293 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(23, 16)); in RTW89_SET_FWCMD_CHINFO_PKT_ID()
2318 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 8), val, GENMASK(7, 0)); in RTW89_SET_FWCMD_CHINFO_PKT0()
2323 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 8), val, GENMASK(15, 8)); in RTW89_SET_FWCMD_CHINFO_PKT1()
2328 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 8), val, GENMASK(23, 16)); in RTW89_SET_FWCMD_CHINFO_PKT2()
2333 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 8), val, GENMASK(31, 24)); in RTW89_SET_FWCMD_CHINFO_PKT3()
2338 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 12), val, GENMASK(7, 0)); in RTW89_SET_FWCMD_CHINFO_PKT4()
2343 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 12), val, GENMASK(15, 8)); in RTW89_SET_FWCMD_CHINFO_PKT5()
2348 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 12), val, GENMASK(23, 16)); in RTW89_SET_FWCMD_CHINFO_PKT6()
2353 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 12), val, GENMASK(31, 24)); in RTW89_SET_FWCMD_CHINFO_PKT7()
2358 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 16), val, GENMASK(15, 0)); in RTW89_SET_FWCMD_CHINFO_POWER_IDX()
2363 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(7, 0)); in RTW89_SET_FWCMD_SCANOFLD_MACID()
2368 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(15, 8)); in RTW89_SET_FWCMD_SCANOFLD_NORM_CY()
2373 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(18, 16)); in RTW89_SET_FWCMD_SCANOFLD_PORT_ID()
2383 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(21, 20)); in RTW89_SET_FWCMD_SCANOFLD_OPERATION()
2388 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(23, 22)); in RTW89_SET_FWCMD_SCANOFLD_TARGET_CH_BAND()
2408 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(4, 3)); in RTW89_SET_FWCMD_SCANOFLD_SCAN_TYPE()
2413 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(7, 5)); in RTW89_SET_FWCMD_SCANOFLD_TARGET_CH_BW()
2418 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(15, 8)); in RTW89_SET_FWCMD_SCANOFLD_TARGET_PRI_CH()
2424 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(23, 16)); in RTW89_SET_FWCMD_SCANOFLD_TARGET_CENTRAL_CH()
2429 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(31, 24)); in RTW89_SET_FWCMD_SCANOFLD_PROBE_REQ_PKT_ID()
2434 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 8), val, GENMASK(15, 0)); in RTW89_SET_FWCMD_SCANOFLD_NORM_PD()
2439 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 8), val, GENMASK(23, 16)); in RTW89_SET_FWCMD_SCANOFLD_SLOW_PD()
2444 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 12), val, GENMASK(31, 0)); in RTW89_SET_FWCMD_SCANOFLD_TSF_HIGH()
2449 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 16), val, GENMASK(31, 0)); in RTW89_SET_FWCMD_SCANOFLD_TSF_SLOW()
2454 le32p_replace_bits((__le32 *)cmd, val, GENMASK(7, 0)); in RTW89_SET_FWCMD_P2P_MACID()
2459 le32p_replace_bits((__le32 *)cmd, val, GENMASK(11, 8)); in RTW89_SET_FWCMD_P2P_P2PID()
2464 le32p_replace_bits((__le32 *)cmd, val, GENMASK(15, 12)); in RTW89_SET_FWCMD_P2P_NOAID()
2469 le32p_replace_bits((__le32 *)cmd, val, GENMASK(19, 16)); in RTW89_SET_FWCMD_P2P_ACT()
2499 le32p_replace_bits((__le32 *)(cmd) + 4, val, GENMASK(7, 0)); in RTW89_SET_FWCMD_NOA_COUNT()
2509 le32p_replace_bits((__le32 *)(cmd) + 4, ctwnd, GENMASK(23, 8)); in RTW89_SET_FWCMD_NOA_CTWINDOW()
2524 le32p_replace_bits((__le32 *)cmd, val, GENMASK(4, 2)); in RTW89_SET_FWCMD_TSF32_TOGL_PORT()
2529 le32p_replace_bits((__le32 *)cmd, val, GENMASK(31, 16)); in RTW89_SET_FWCMD_TSF32_TOGL_EARLY()
2535 le32_get_bits(*((const __le32 *)c2h), GENMASK(1, 0))
2537 le32_get_bits(*((const __le32 *)c2h), GENMASK(7, 2))
2539 le32_get_bits(*((const __le32 *)c2h), GENMASK(15, 8))
2541 le32_get_bits(*((const __le32 *)(c2h) + 1), GENMASK(13, 0))
2547 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(1, 0))
2549 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(7, 2))
2551 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(15, 8))
2553 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(23, 16))
2555 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(31, 24))
2558 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(1, 0))
2560 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(7, 2))
2562 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(15, 8))
2564 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(23, 16))
2567 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(15, 0))
2569 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(23, 16))
2571 le32_get_bits(*((const __le32 *)(c2h) + 3), GENMASK(6, 0))
2573 le32_get_bits(*((const __le32 *)(c2h) + 3), GENMASK(9, 8))
2575 le32_get_bits(*((const __le32 *)(c2h) + 3), GENMASK(12, 10))
2577 le32_get_bits(*((const __le32 *)(c2h) + 3), GENMASK(14, 13))
2582 #define RTW89_RA_RATE_MASK_NSS GENMASK(6, 4)
2583 #define RTW89_RA_RATE_MASK_MCS GENMASK(3, 0)
2584 #define RTW89_RA_RATE_MASK_HT_MCS GENMASK(4, 0)
2585 #define RTW89_MK_HT_RATE(nss, mcs) (FIELD_PREP(GENMASK(4, 3), nss) | \
2586 FIELD_PREP(GENMASK(2, 0), mcs))
2589 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(7, 0))
2591 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(10, 8))
2593 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(31, 16))
2596 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(7, 0))
2598 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(19, 16))
2600 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(23, 20))
2602 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(31, 24))
2604 le32_get_bits(*((const __le32 *)(c2h) + 5), GENMASK(3, 0))
2606 le32_get_bits(*((const __le32 *)(c2h) + 5), GENMASK(7, 4))
2608 le32_get_bits(*((const __le32 *)(c2h) + 5), GENMASK(25, 24))
2655 #define H2C_HDR_CAT GENMASK(1, 0)
2656 #define H2C_HDR_CLASS GENMASK(7, 2)
2657 #define H2C_HDR_FUNC GENMASK(15, 8)
2658 #define H2C_HDR_DEL_TYPE GENMASK(19, 16)
2659 #define H2C_HDR_H2C_SEQ GENMASK(31, 24)
2660 #define H2C_HDR_TOTAL_LEN GENMASK(13, 0)
2744 #define RTW89_WCPU_BASE_MASK GENMASK(27, 0)