15 static int rtw89_switch_efuse_bank(struct rtw89_dev *rtwdev,  in rtw89_switch_efuse_bank()  argument
20 	if (rtwdev->chip->chip_id != RTL8852A)  in rtw89_switch_efuse_bank()
23 	val = rtw89_read32_mask(rtwdev, R_AX_EFUSE_CTRL_1,  in rtw89_switch_efuse_bank()
28 	rtw89_write32_mask(rtwdev, R_AX_EFUSE_CTRL_1, B_AX_EF_CELL_SEL_MASK,  in rtw89_switch_efuse_bank()
31 	val = rtw89_read32_mask(rtwdev, R_AX_EFUSE_CTRL_1,  in rtw89_switch_efuse_bank()
39 static void rtw89_enable_otp_burst_mode(struct rtw89_dev *rtwdev, bool en)  in rtw89_enable_otp_burst_mode()  argument
42 		rtw89_write32_set(rtwdev, R_AX_EFUSE_CTRL_1_V1, B_AX_EF_BURST);  in rtw89_enable_otp_burst_mode()
44 		rtw89_write32_clr(rtwdev, R_AX_EFUSE_CTRL_1_V1, B_AX_EF_BURST);  in rtw89_enable_otp_burst_mode()
47 static void rtw89_enable_efuse_pwr_cut_ddv(struct rtw89_dev *rtwdev)  in rtw89_enable_efuse_pwr_cut_ddv()  argument
49 	enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id;  in rtw89_enable_efuse_pwr_cut_ddv()
50 	struct rtw89_hal *hal = &rtwdev->hal;  in rtw89_enable_efuse_pwr_cut_ddv()
55 	rtw89_write8_set(rtwdev, R_AX_PMC_DBG_CTRL2, B_AX_SYSON_DIS_PMCR_AX_WRMSK);  in rtw89_enable_efuse_pwr_cut_ddv()
56 	rtw89_write16_set(rtwdev, R_AX_SYS_ISO_CTRL, B_AX_PWC_EV2EF_B14);  in rtw89_enable_efuse_pwr_cut_ddv()
60 	rtw89_write16_set(rtwdev, R_AX_SYS_ISO_CTRL, B_AX_PWC_EV2EF_B15);  in rtw89_enable_efuse_pwr_cut_ddv()
61 	rtw89_write16_clr(rtwdev, R_AX_SYS_ISO_CTRL, B_AX_ISO_EB2CORE);  in rtw89_enable_efuse_pwr_cut_ddv()
63 		rtw89_enable_otp_burst_mode(rtwdev, true);  in rtw89_enable_efuse_pwr_cut_ddv()
66 static void rtw89_disable_efuse_pwr_cut_ddv(struct rtw89_dev *rtwdev)  in rtw89_disable_efuse_pwr_cut_ddv()  argument
68 	enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id;  in rtw89_disable_efuse_pwr_cut_ddv()
69 	struct rtw89_hal *hal = &rtwdev->hal;  in rtw89_disable_efuse_pwr_cut_ddv()
75 		rtw89_enable_otp_burst_mode(rtwdev, false);  in rtw89_disable_efuse_pwr_cut_ddv()
77 	rtw89_write16_set(rtwdev, R_AX_SYS_ISO_CTRL, B_AX_ISO_EB2CORE);  in rtw89_disable_efuse_pwr_cut_ddv()
78 	rtw89_write16_clr(rtwdev, R_AX_SYS_ISO_CTRL, B_AX_PWC_EV2EF_B15);  in rtw89_disable_efuse_pwr_cut_ddv()
82 	rtw89_write16_clr(rtwdev, R_AX_SYS_ISO_CTRL, B_AX_PWC_EV2EF_B14);  in rtw89_disable_efuse_pwr_cut_ddv()
83 	rtw89_write8_clr(rtwdev, R_AX_PMC_DBG_CTRL2, B_AX_SYSON_DIS_PMCR_AX_WRMSK);  in rtw89_disable_efuse_pwr_cut_ddv()
86 static int rtw89_dump_physical_efuse_map_ddv(struct rtw89_dev *rtwdev, u8 *map,  in rtw89_dump_physical_efuse_map_ddv()  argument
93 	rtw89_enable_efuse_pwr_cut_ddv(rtwdev);  in rtw89_dump_physical_efuse_map_ddv()
97 		rtw89_write32(rtwdev, R_AX_EFUSE_CTRL, efuse_ctl & ~B_AX_EF_RDY);  in rtw89_dump_physical_efuse_map_ddv()
101 					       true, rtwdev, R_AX_EFUSE_CTRL);  in rtw89_dump_physical_efuse_map_ddv()
108 	rtw89_disable_efuse_pwr_cut_ddv(rtwdev);  in rtw89_dump_physical_efuse_map_ddv()
113 static int rtw89_dump_physical_efuse_map_dav(struct rtw89_dev *rtwdev, u8 *map,  in rtw89_dump_physical_efuse_map_dav()  argument
122 		ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_CTRL, 0x40, FULL_BIT_MASK);  in rtw89_dump_physical_efuse_map_dav()
125 		ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_LOW_ADDR,  in rtw89_dump_physical_efuse_map_dav()
129 		ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_CTRL, addr >> 8,  in rtw89_dump_physical_efuse_map_dav()
133 		ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_CTRL, 0,  in rtw89_dump_physical_efuse_map_dav()
141 					       rtwdev, XTAL_SI_CTRL, &val8);  in rtw89_dump_physical_efuse_map_dav()
143 			rtw89_warn(rtwdev, "failed to read dav efuse\n");  in rtw89_dump_physical_efuse_map_dav()
147 		ret = rtw89_mac_read_xtal_si(rtwdev, XTAL_SI_READ_VAL, &val8);  in rtw89_dump_physical_efuse_map_dav()
156 static int rtw89_dump_physical_efuse_map(struct rtw89_dev *rtwdev, u8 *map,  in rtw89_dump_physical_efuse_map()  argument
164 	rtw89_switch_efuse_bank(rtwdev, RTW89_EFUSE_BANK_WIFI);  in rtw89_dump_physical_efuse_map()
167 		ret = rtw89_dump_physical_efuse_map_dav(rtwdev, map, dump_addr, dump_size);  in rtw89_dump_physical_efuse_map()
171 		ret = rtw89_dump_physical_efuse_map_ddv(rtwdev, map, dump_addr, dump_size);  in rtw89_dump_physical_efuse_map()
187 static int rtw89_dump_logical_efuse_map(struct rtw89_dev *rtwdev, u8 *phy_map,  in rtw89_dump_logical_efuse_map()  argument
190 	u32 physical_size = rtwdev->chip->physical_efuse_size;  in rtw89_dump_logical_efuse_map()
191 	u32 logical_size = rtwdev->chip->logical_efuse_size;  in rtw89_dump_logical_efuse_map()
192 	u8 sec_ctrl_size = rtwdev->chip->sec_ctrl_efuse_size;  in rtw89_dump_logical_efuse_map()
230 int rtw89_parse_efuse_map(struct rtw89_dev *rtwdev)  in rtw89_parse_efuse_map()  argument
232 	u32 phy_size = rtwdev->chip->physical_efuse_size;  in rtw89_parse_efuse_map()
233 	u32 log_size = rtwdev->chip->logical_efuse_size;  in rtw89_parse_efuse_map()
234 	u32 dav_phy_size = rtwdev->chip->dav_phy_efuse_size;  in rtw89_parse_efuse_map()
235 	u32 dav_log_size = rtwdev->chip->dav_log_efuse_size;  in rtw89_parse_efuse_map()
243 	if (rtw89_read16(rtwdev, R_AX_SYS_WL_EFUSE_CTRL) & B_AX_AUTOLOAD_SUS)  in rtw89_parse_efuse_map()
244 		rtwdev->efuse.valid = true;  in rtw89_parse_efuse_map()
246 		rtw89_warn(rtwdev, "failed to check efuse autoload\n");  in rtw89_parse_efuse_map()
260 	ret = rtw89_dump_physical_efuse_map(rtwdev, phy_map, 0, phy_size, false);  in rtw89_parse_efuse_map()
262 		rtw89_warn(rtwdev, "failed to dump efuse physical map\n");  in rtw89_parse_efuse_map()
265 	ret = rtw89_dump_physical_efuse_map(rtwdev, dav_phy_map, 0, dav_phy_size, true);  in rtw89_parse_efuse_map()
267 		rtw89_warn(rtwdev, "failed to dump efuse dav physical map\n");  in rtw89_parse_efuse_map()
272 	ret = rtw89_dump_logical_efuse_map(rtwdev, phy_map, log_map);  in rtw89_parse_efuse_map()
274 		rtw89_warn(rtwdev, "failed to dump efuse logical map\n");  in rtw89_parse_efuse_map()
277 	ret = rtw89_dump_logical_efuse_map(rtwdev, dav_phy_map, dav_log_map);  in rtw89_parse_efuse_map()
279 		rtw89_warn(rtwdev, "failed to dump efuse dav logical map\n");  in rtw89_parse_efuse_map()
283 	rtw89_hex_dump(rtwdev, RTW89_DBG_FW, "log_map: ", log_map, full_log_size);  in rtw89_parse_efuse_map()
285 	ret = rtwdev->chip->ops->read_efuse(rtwdev, log_map);  in rtw89_parse_efuse_map()
287 		rtw89_warn(rtwdev, "failed to read efuse map\n");  in rtw89_parse_efuse_map()
299 int rtw89_parse_phycap_map(struct rtw89_dev *rtwdev)  in rtw89_parse_phycap_map()  argument
301 	u32 phycap_addr = rtwdev->chip->phycap_addr;  in rtw89_parse_phycap_map()
302 	u32 phycap_size = rtwdev->chip->phycap_size;  in rtw89_parse_phycap_map()
313 	ret = rtw89_dump_physical_efuse_map(rtwdev, phycap_map,  in rtw89_parse_phycap_map()
316 		rtw89_warn(rtwdev, "failed to dump phycap map\n");  in rtw89_parse_phycap_map()
320 	ret = rtwdev->chip->ops->read_phycap(rtwdev, phycap_map);  in rtw89_parse_phycap_map()
322 		rtw89_warn(rtwdev, "failed to read phycap map\n");  in rtw89_parse_phycap_map()