Lines Matching refs:rtw_write32_mask
361 rtw_write32_mask(rtwdev, 0x1d58, 0xff8, 0x1ff); in rtw8822c_dac_bb_setting()
362 rtw_write32_mask(rtwdev, 0x1a00, 0x3, 0x2); in rtw8822c_dac_bb_setting()
363 rtw_write32_mask(rtwdev, 0x1a14, 0x300, 0x3); in rtw8822c_dac_bb_setting()
365 rtw_write32_mask(rtwdev, 0x180c, 0x3, 0x0); in rtw8822c_dac_bb_setting()
366 rtw_write32_mask(rtwdev, 0x410c, 0x3, 0x0); in rtw8822c_dac_bb_setting()
371 rtw_write32_mask(rtwdev, 0x1e24, BIT(31), 0x0); in rtw8822c_dac_bb_setting()
372 rtw_write32_mask(rtwdev, 0x1e28, 0xf, 0x3); in rtw8822c_dac_bb_setting()
400 rtw_write32_mask(rtwdev, base_addr + 0x30, BIT(30), 0x0); in rtw8822c_dac_cal_adc()
505 rtw_write32_mask(rtwdev, base_addr + 0xbc, 0xf0000000, 0x0); in rtw8822c_dac_cal_step2()
506 rtw_write32_mask(rtwdev, base_addr + 0xc0, 0xf, 0x8); in rtw8822c_dac_cal_step2()
507 rtw_write32_mask(rtwdev, base_addr + 0xd8, 0xf0000000, 0x0); in rtw8822c_dac_cal_step2()
508 rtw_write32_mask(rtwdev, base_addr + 0xdc, 0xf, 0x8); in rtw8822c_dac_cal_step2()
568 rtw_write32_mask(rtwdev, base_addr + 0xbc, 0xf0000000, ic & 0xf); in rtw8822c_dac_cal_step3()
569 rtw_write32_mask(rtwdev, base_addr + 0xc0, 0xf, (ic & 0xf0) >> 4); in rtw8822c_dac_cal_step3()
573 rtw_write32_mask(rtwdev, base_addr + 0xd8, 0xf0000000, qc & 0xf); in rtw8822c_dac_cal_step3()
574 rtw_write32_mask(rtwdev, base_addr + 0xdc, 0xf, (qc & 0xf0) >> 4); in rtw8822c_dac_cal_step3()
577 rtw_write32_mask(rtwdev, base_addr + 0xbc, 0xe, 0x6); in rtw8822c_dac_cal_step3()
590 rtw_write32_mask(rtwdev, base_addr + 0xbc, 0xe, 0x3); in rtw8822c_dac_cal_step3()
630 rtw_write32_mask(rtwdev, base_addr + 0xbc, 0x1, 0x0); in rtw8822c_dac_cal_step4()
631 rtw_write32_mask(rtwdev, base_addr + 0x30, BIT(30), 0x1); in rtw8822c_dac_cal_step4()
645 rtw_write32_mask(rtwdev, w_addr, 0xf0000000, i); in rtw8822c_dac_cal_backup_vec()
708 rtw_write32_mask(rtwdev, 0x1860, 0xfc000000, 0x3c); in rtw8822c_dac_cal_backup()
713 rtw_write32_mask(rtwdev, 0x4160, 0xfc000000, 0x3c); in rtw8822c_dac_cal_backup()
732 rtw_write32_mask(rtwdev, REG_DCKA_I_0, 0xf0000000, val); in rtw8822c_dac_cal_restore_dck()
734 rtw_write32_mask(rtwdev, REG_DCKA_I_1, 0xf, val); in rtw8822c_dac_cal_restore_dck()
738 rtw_write32_mask(rtwdev, REG_DCKA_Q_0, 0xf0000000, val); in rtw8822c_dac_cal_restore_dck()
740 rtw_write32_mask(rtwdev, REG_DCKA_Q_1, 0xf, val); in rtw8822c_dac_cal_restore_dck()
744 rtw_write32_mask(rtwdev, REG_DCKB_I_0, 0xf0000000, val); in rtw8822c_dac_cal_restore_dck()
746 rtw_write32_mask(rtwdev, REG_DCKB_I_1, 0xf, val); in rtw8822c_dac_cal_restore_dck()
750 rtw_write32_mask(rtwdev, REG_DCKB_Q_0, 0xf0000000, val); in rtw8822c_dac_cal_restore_dck()
752 rtw_write32_mask(rtwdev, REG_DCKB_Q_1, 0xf, val); in rtw8822c_dac_cal_restore_dck()
759 rtw_write32_mask(rtwdev, 0x18b0, BIT(27), 0x0); in rtw8822c_dac_cal_restore_prepare()
760 rtw_write32_mask(rtwdev, 0x18cc, BIT(27), 0x0); in rtw8822c_dac_cal_restore_prepare()
761 rtw_write32_mask(rtwdev, 0x41b0, BIT(27), 0x0); in rtw8822c_dac_cal_restore_prepare()
762 rtw_write32_mask(rtwdev, 0x41cc, BIT(27), 0x0); in rtw8822c_dac_cal_restore_prepare()
764 rtw_write32_mask(rtwdev, 0x1830, BIT(30), 0x0); in rtw8822c_dac_cal_restore_prepare()
765 rtw_write32_mask(rtwdev, 0x1860, 0xfc000000, 0x3c); in rtw8822c_dac_cal_restore_prepare()
766 rtw_write32_mask(rtwdev, 0x18b4, BIT(0), 0x1); in rtw8822c_dac_cal_restore_prepare()
767 rtw_write32_mask(rtwdev, 0x18d0, BIT(0), 0x1); in rtw8822c_dac_cal_restore_prepare()
769 rtw_write32_mask(rtwdev, 0x4130, BIT(30), 0x0); in rtw8822c_dac_cal_restore_prepare()
770 rtw_write32_mask(rtwdev, 0x4160, 0xfc000000, 0x3c); in rtw8822c_dac_cal_restore_prepare()
771 rtw_write32_mask(rtwdev, 0x41b4, BIT(0), 0x1); in rtw8822c_dac_cal_restore_prepare()
772 rtw_write32_mask(rtwdev, 0x41d0, BIT(0), 0x1); in rtw8822c_dac_cal_restore_prepare()
774 rtw_write32_mask(rtwdev, 0x18b0, 0xf00, 0x0); in rtw8822c_dac_cal_restore_prepare()
775 rtw_write32_mask(rtwdev, 0x18c0, BIT(14), 0x0); in rtw8822c_dac_cal_restore_prepare()
776 rtw_write32_mask(rtwdev, 0x18cc, 0xf00, 0x0); in rtw8822c_dac_cal_restore_prepare()
777 rtw_write32_mask(rtwdev, 0x18dc, BIT(14), 0x0); in rtw8822c_dac_cal_restore_prepare()
779 rtw_write32_mask(rtwdev, 0x18b0, BIT(0), 0x0); in rtw8822c_dac_cal_restore_prepare()
780 rtw_write32_mask(rtwdev, 0x18cc, BIT(0), 0x0); in rtw8822c_dac_cal_restore_prepare()
781 rtw_write32_mask(rtwdev, 0x18b0, BIT(0), 0x1); in rtw8822c_dac_cal_restore_prepare()
782 rtw_write32_mask(rtwdev, 0x18cc, BIT(0), 0x1); in rtw8822c_dac_cal_restore_prepare()
786 rtw_write32_mask(rtwdev, 0x18c0, 0x38000, 0x7); in rtw8822c_dac_cal_restore_prepare()
787 rtw_write32_mask(rtwdev, 0x18dc, 0x38000, 0x7); in rtw8822c_dac_cal_restore_prepare()
788 rtw_write32_mask(rtwdev, 0x41c0, 0x38000, 0x7); in rtw8822c_dac_cal_restore_prepare()
789 rtw_write32_mask(rtwdev, 0x41dc, 0x38000, 0x7); in rtw8822c_dac_cal_restore_prepare()
791 rtw_write32_mask(rtwdev, 0x18b8, BIT(26) | BIT(25), 0x1); in rtw8822c_dac_cal_restore_prepare()
792 rtw_write32_mask(rtwdev, 0x18d4, BIT(26) | BIT(25), 0x1); in rtw8822c_dac_cal_restore_prepare()
794 rtw_write32_mask(rtwdev, 0x41b0, 0xf00, 0x0); in rtw8822c_dac_cal_restore_prepare()
795 rtw_write32_mask(rtwdev, 0x41c0, BIT(14), 0x0); in rtw8822c_dac_cal_restore_prepare()
796 rtw_write32_mask(rtwdev, 0x41cc, 0xf00, 0x0); in rtw8822c_dac_cal_restore_prepare()
797 rtw_write32_mask(rtwdev, 0x41dc, BIT(14), 0x0); in rtw8822c_dac_cal_restore_prepare()
799 rtw_write32_mask(rtwdev, 0x41b0, BIT(0), 0x0); in rtw8822c_dac_cal_restore_prepare()
800 rtw_write32_mask(rtwdev, 0x41cc, BIT(0), 0x0); in rtw8822c_dac_cal_restore_prepare()
801 rtw_write32_mask(rtwdev, 0x41b0, BIT(0), 0x1); in rtw8822c_dac_cal_restore_prepare()
802 rtw_write32_mask(rtwdev, 0x41cc, BIT(0), 0x1); in rtw8822c_dac_cal_restore_prepare()
804 rtw_write32_mask(rtwdev, 0x41b8, BIT(26) | BIT(25), 0x1); in rtw8822c_dac_cal_restore_prepare()
805 rtw_write32_mask(rtwdev, 0x41d4, BIT(26) | BIT(25), 0x1); in rtw8822c_dac_cal_restore_prepare()
814 rtw_write32_mask(rtwdev, toggle_addr, BIT(26) | BIT(25), 0x0); in rtw8822c_dac_cal_restore_wait()
815 rtw_write32_mask(rtwdev, toggle_addr, BIT(26) | BIT(25), 0x2); in rtw8822c_dac_cal_restore_wait()
843 rtw_write32_mask(rtwdev, w_i + 0x4, BIT(2), 0x0); in rtw8822c_dac_cal_restore_path()
845 rtw_write32_mask(rtwdev, w_i + 0x4, 0xff8, value); in rtw8822c_dac_cal_restore_path()
846 rtw_write32_mask(rtwdev, w_i, 0xf0000000, i); in rtw8822c_dac_cal_restore_path()
847 rtw_write32_mask(rtwdev, w_i + 0x4, BIT(2), 0x1); in rtw8822c_dac_cal_restore_path()
850 rtw_write32_mask(rtwdev, w_i + 0x4, BIT(2), 0x0); in rtw8822c_dac_cal_restore_path()
856 rtw_write32_mask(rtwdev, w_q + 0x4, BIT(2), 0x0); in rtw8822c_dac_cal_restore_path()
858 rtw_write32_mask(rtwdev, w_q + 0x4, 0xff8, value); in rtw8822c_dac_cal_restore_path()
859 rtw_write32_mask(rtwdev, w_q, 0xf0000000, i); in rtw8822c_dac_cal_restore_path()
860 rtw_write32_mask(rtwdev, w_q + 0x4, BIT(2), 0x1); in rtw8822c_dac_cal_restore_path()
862 rtw_write32_mask(rtwdev, w_q + 0x4, BIT(2), 0x0); in rtw8822c_dac_cal_restore_path()
864 rtw_write32_mask(rtwdev, w_i + 0x8, BIT(26) | BIT(25), 0x0); in rtw8822c_dac_cal_restore_path()
865 rtw_write32_mask(rtwdev, w_q + 0x8, BIT(26) | BIT(25), 0x0); in rtw8822c_dac_cal_restore_path()
866 rtw_write32_mask(rtwdev, w_i + 0x4, BIT(0), 0x0); in rtw8822c_dac_cal_restore_path()
867 rtw_write32_mask(rtwdev, w_q + 0x4, BIT(0), 0x0); in rtw8822c_dac_cal_restore_path()
911 rtw_write32_mask(rtwdev, 0x1830, BIT(30), 0x1); in rtw8822c_dac_cal_restore()
912 rtw_write32_mask(rtwdev, 0x4130, BIT(30), 0x1); in rtw8822c_dac_cal_restore()
915 rtw_write32_mask(rtwdev, 0x18b0, BIT(27), 0x1); in rtw8822c_dac_cal_restore()
916 rtw_write32_mask(rtwdev, 0x18cc, BIT(27), 0x1); in rtw8822c_dac_cal_restore()
917 rtw_write32_mask(rtwdev, 0x41b0, BIT(27), 0x1); in rtw8822c_dac_cal_restore()
918 rtw_write32_mask(rtwdev, 0x41cc, BIT(27), 0x1); in rtw8822c_dac_cal_restore()
975 rtw_write32_mask(rtwdev, 0x4130, BIT(30), 0x1); in rtw8822c_rf_dac_cal()
1071 rtw_write32_mask(rtwdev, REG_DIS_DPD, DIS_DPD_MASK, DIS_DPD_RATEALL); in rtw8822c_power_trim()
1166 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SEL_PATH, path); in rtw8822c_rfk_power_save()
1167 rtw_write32_mask(rtwdev, REG_DPD_CTL1_S0, BIT_PS_EN, in rtw8822c_rfk_power_save()
1219 rtw_write32_mask(rtwdev, REG_TX_FIFO, BIT_STOP_TX, 0x2); in rtw8822c_txgapk_tx_pause()
1233 rtw_write32_mask(rtwdev, REG_ENFN, BIT_IQK_DPK_EN, 0x1); in rtw8822c_txgapk_bb_dpk()
1234 rtw_write32_mask(rtwdev, REG_CH_DELAY_EXTR2, in rtw8822c_txgapk_bb_dpk()
1236 rtw_write32_mask(rtwdev, REG_CH_DELAY_EXTR2, in rtw8822c_txgapk_bb_dpk()
1238 rtw_write32_mask(rtwdev, REG_CH_DELAY_EXTR2, BIT_EN_IOQ_IQK_DPK, 0x1); in rtw8822c_txgapk_bb_dpk()
1239 rtw_write32_mask(rtwdev, REG_CH_DELAY_EXTR2, BIT_TST_IQK2SET_SRC, 0x0); in rtw8822c_txgapk_bb_dpk()
1240 rtw_write32_mask(rtwdev, REG_CCA_OFF, BIT_CCA_ON_BY_PW, 0x1ff); in rtw8822c_txgapk_bb_dpk()
1243 rtw_write32_mask(rtwdev, REG_RFTXEN_GCK_A, in rtw8822c_txgapk_bb_dpk()
1245 rtw_write32_mask(rtwdev, REG_3WIRE, BIT_DIS_SHARERX_TXGAT, 0x1); in rtw8822c_txgapk_bb_dpk()
1246 rtw_write32_mask(rtwdev, REG_DIS_SHARE_RX_A, in rtw8822c_txgapk_bb_dpk()
1248 rtw_write32_mask(rtwdev, REG_3WIRE, BIT_3WIRE_EN, 0x0); in rtw8822c_txgapk_bb_dpk()
1250 rtw_write32_mask(rtwdev, REG_RFTXEN_GCK_B, in rtw8822c_txgapk_bb_dpk()
1252 rtw_write32_mask(rtwdev, REG_3WIRE2, in rtw8822c_txgapk_bb_dpk()
1254 rtw_write32_mask(rtwdev, REG_DIS_SHARE_RX_B, in rtw8822c_txgapk_bb_dpk()
1256 rtw_write32_mask(rtwdev, REG_3WIRE2, BIT_3WIRE_EN, 0x0); in rtw8822c_txgapk_bb_dpk()
1258 rtw_write32_mask(rtwdev, REG_CCKSB, BIT_BBMODE, 0x2); in rtw8822c_txgapk_bb_dpk()
1276 rtw_write32_mask(rtwdev, REG_IQK_CTRL, MASKDWORD, MASKDWORD); in rtw8822c_txgapk_afe_dpk()
1277 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x700f0001); in rtw8822c_txgapk_afe_dpk()
1278 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x700f0001); in rtw8822c_txgapk_afe_dpk()
1279 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x701f0001); in rtw8822c_txgapk_afe_dpk()
1280 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x702f0001); in rtw8822c_txgapk_afe_dpk()
1281 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x703f0001); in rtw8822c_txgapk_afe_dpk()
1282 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x704f0001); in rtw8822c_txgapk_afe_dpk()
1283 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x705f0001); in rtw8822c_txgapk_afe_dpk()
1284 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x706f0001); in rtw8822c_txgapk_afe_dpk()
1285 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x707f0001); in rtw8822c_txgapk_afe_dpk()
1286 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x708f0001); in rtw8822c_txgapk_afe_dpk()
1287 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x709f0001); in rtw8822c_txgapk_afe_dpk()
1288 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70af0001); in rtw8822c_txgapk_afe_dpk()
1289 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70bf0001); in rtw8822c_txgapk_afe_dpk()
1290 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70cf0001); in rtw8822c_txgapk_afe_dpk()
1291 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70df0001); in rtw8822c_txgapk_afe_dpk()
1292 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70ef0001); in rtw8822c_txgapk_afe_dpk()
1293 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70ff0001); in rtw8822c_txgapk_afe_dpk()
1294 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70ff0001); in rtw8822c_txgapk_afe_dpk()
1311 rtw_write32_mask(rtwdev, REG_IQK_CTRL, MASKDWORD, 0xffa1005e); in rtw8822c_txgapk_afe_dpk_restore()
1312 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x700b8041); in rtw8822c_txgapk_afe_dpk_restore()
1313 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70144041); in rtw8822c_txgapk_afe_dpk_restore()
1314 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70244041); in rtw8822c_txgapk_afe_dpk_restore()
1315 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70344041); in rtw8822c_txgapk_afe_dpk_restore()
1316 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70444041); in rtw8822c_txgapk_afe_dpk_restore()
1317 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x705b8041); in rtw8822c_txgapk_afe_dpk_restore()
1318 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70644041); in rtw8822c_txgapk_afe_dpk_restore()
1319 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x707b8041); in rtw8822c_txgapk_afe_dpk_restore()
1320 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x708b8041); in rtw8822c_txgapk_afe_dpk_restore()
1321 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x709b8041); in rtw8822c_txgapk_afe_dpk_restore()
1322 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70ab8041); in rtw8822c_txgapk_afe_dpk_restore()
1323 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70bb8041); in rtw8822c_txgapk_afe_dpk_restore()
1324 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70cb8041); in rtw8822c_txgapk_afe_dpk_restore()
1325 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70db8041); in rtw8822c_txgapk_afe_dpk_restore()
1326 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70eb8041); in rtw8822c_txgapk_afe_dpk_restore()
1327 rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70fb8041); in rtw8822c_txgapk_afe_dpk_restore()
1338 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SEL_PATH, 0x0); in rtw8822c_txgapk_bb_dpk_restore()
1339 rtw_write32_mask(rtwdev, REG_IQK_CTL1, BIT_TX_CFIR, 0x0); in rtw8822c_txgapk_bb_dpk_restore()
1340 rtw_write32_mask(rtwdev, REG_SINGLE_TONE_SW, BIT_IRQ_TEST_MODE, 0x0); in rtw8822c_txgapk_bb_dpk_restore()
1341 rtw_write32_mask(rtwdev, REG_R_CONFIG, MASKBYTE0, 0x00); in rtw8822c_txgapk_bb_dpk_restore()
1342 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SEL_PATH, 0x1); in rtw8822c_txgapk_bb_dpk_restore()
1343 rtw_write32_mask(rtwdev, REG_IQK_CTL1, BIT_TX_CFIR, 0x0); in rtw8822c_txgapk_bb_dpk_restore()
1344 rtw_write32_mask(rtwdev, REG_SINGLE_TONE_SW, BIT_IRQ_TEST_MODE, 0x0); in rtw8822c_txgapk_bb_dpk_restore()
1345 rtw_write32_mask(rtwdev, REG_R_CONFIG, MASKBYTE0, 0x00); in rtw8822c_txgapk_bb_dpk_restore()
1346 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SEL_PATH, 0x0); in rtw8822c_txgapk_bb_dpk_restore()
1347 rtw_write32_mask(rtwdev, REG_CCA_OFF, BIT_CCA_ON_BY_PW, 0x0); in rtw8822c_txgapk_bb_dpk_restore()
1350 rtw_write32_mask(rtwdev, REG_RFTXEN_GCK_A, in rtw8822c_txgapk_bb_dpk_restore()
1352 rtw_write32_mask(rtwdev, REG_3WIRE, BIT_DIS_SHARERX_TXGAT, 0x0); in rtw8822c_txgapk_bb_dpk_restore()
1353 rtw_write32_mask(rtwdev, REG_DIS_SHARE_RX_A, in rtw8822c_txgapk_bb_dpk_restore()
1355 rtw_write32_mask(rtwdev, REG_3WIRE, BIT_3WIRE_EN, 0x3); in rtw8822c_txgapk_bb_dpk_restore()
1357 rtw_write32_mask(rtwdev, REG_RFTXEN_GCK_B, in rtw8822c_txgapk_bb_dpk_restore()
1359 rtw_write32_mask(rtwdev, REG_3WIRE2, in rtw8822c_txgapk_bb_dpk_restore()
1361 rtw_write32_mask(rtwdev, REG_DIS_SHARE_RX_B, in rtw8822c_txgapk_bb_dpk_restore()
1363 rtw_write32_mask(rtwdev, REG_3WIRE2, BIT_3WIRE_EN, 0x3); in rtw8822c_txgapk_bb_dpk_restore()
1366 rtw_write32_mask(rtwdev, REG_CCKSB, BIT_BBMODE, 0x0); in rtw8822c_txgapk_bb_dpk_restore()
1367 rtw_write32_mask(rtwdev, REG_IQK_CTL1, BIT_CFIR_EN, 0x5); in rtw8822c_txgapk_bb_dpk_restore()
1386 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SEL_PATH, path); in _rtw8822c_txgapk_write_gain_bb_table()
1390 rtw_write32_mask(rtwdev, REG_TABLE_SEL, BIT_Q_GAIN_SEL, 0x0); in _rtw8822c_txgapk_write_gain_bb_table()
1393 rtw_write32_mask(rtwdev, REG_TABLE_SEL, BIT_Q_GAIN_SEL, 0x2); in _rtw8822c_txgapk_write_gain_bb_table()
1396 rtw_write32_mask(rtwdev, REG_TABLE_SEL, BIT_Q_GAIN_SEL, 0x3); in _rtw8822c_txgapk_write_gain_bb_table()
1399 rtw_write32_mask(rtwdev, REG_TABLE_SEL, BIT_Q_GAIN_SEL, 0x4); in _rtw8822c_txgapk_write_gain_bb_table()
1405 rtw_write32_mask(rtwdev, REG_TX_GAIN_SET, MASKBYTE0, 0x88); in _rtw8822c_txgapk_write_gain_bb_table()
1422 rtw_write32_mask(rtwdev, REG_TABLE_SEL, BIT_Q_GAIN, tmp_3f); in _rtw8822c_txgapk_write_gain_bb_table()
1423 rtw_write32_mask(rtwdev, REG_TABLE_SEL, BIT_I_GAIN, gain); in _rtw8822c_txgapk_write_gain_bb_table()
1424 rtw_write32_mask(rtwdev, REG_TABLE_SEL, BIT_GAIN_RST, 0x1); in _rtw8822c_txgapk_write_gain_bb_table()
1425 rtw_write32_mask(rtwdev, REG_TABLE_SEL, BIT_GAIN_RST, 0x0); in _rtw8822c_txgapk_write_gain_bb_table()
1467 rtw_write32_mask(rtwdev, REG_ANTMAP0, BIT_ANT_PATH, path + 1); in rtw8822c_txgapk_read_offset()
1468 rtw_write32_mask(rtwdev, REG_TXLGMAP, MASKDWORD, 0xe4e40000); in rtw8822c_txgapk_read_offset()
1469 rtw_write32_mask(rtwdev, REG_TXANTSEG, BIT_ANTSEG, 0x3); in rtw8822c_txgapk_read_offset()
1470 rtw_write32_mask(rtwdev, path_setting[path], MASK20BITS, 0x33312); in rtw8822c_txgapk_read_offset()
1471 rtw_write32_mask(rtwdev, path_setting[path], BIT_PATH_EN, 0x1); in rtw8822c_txgapk_read_offset()
1472 rtw_write32_mask(rtwdev, set_pi[path], BITS_RFC_DIRECT, 0x0); in rtw8822c_txgapk_read_offset()
1475 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SEL_PATH, path); in rtw8822c_txgapk_read_offset()
1476 rtw_write32_mask(rtwdev, REG_IQKSTAT, MASKBYTE0, 0x0); in rtw8822c_txgapk_read_offset()
1478 rtw_write32_mask(rtwdev, REG_TX_TONE_IDX, MASKBYTE0, 0x018); in rtw8822c_txgapk_read_offset()
1481 rtw_write32_mask(rtwdev, REG_R_CONFIG, MASKBYTE0, BIT_2G_SWING); in rtw8822c_txgapk_read_offset()
1483 rtw_write32_mask(rtwdev, REG_R_CONFIG, MASKBYTE0, BIT_5G_SWING); in rtw8822c_txgapk_read_offset()
1486 rtw_write32_mask(rtwdev, REG_NCTL0, MASKDWORD, cfg1_1b00[path]); in rtw8822c_txgapk_read_offset()
1487 rtw_write32_mask(rtwdev, REG_NCTL0, MASKDWORD, cfg2_1b00[path]); in rtw8822c_txgapk_read_offset()
1493 rtw_write32_mask(rtwdev, set_pi[path], BITS_RFC_DIRECT, 0x2); in rtw8822c_txgapk_read_offset()
1494 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SEL_PATH, path); in rtw8822c_txgapk_read_offset()
1495 rtw_write32_mask(rtwdev, REG_RXSRAM_CTL, BIT_RPT_EN, 0x1); in rtw8822c_txgapk_read_offset()
1496 rtw_write32_mask(rtwdev, REG_RXSRAM_CTL, BIT_RPT_SEL, 0x12); in rtw8822c_txgapk_read_offset()
1497 rtw_write32_mask(rtwdev, REG_TX_GAIN_SET, BIT_GAPK_RPT_IDX, 0x3); in rtw8822c_txgapk_read_offset()
1509 rtw_write32_mask(rtwdev, REG_TX_GAIN_SET, BIT_GAPK_RPT_IDX, 0x4); in rtw8822c_txgapk_read_offset()
1540 rtw_write32_mask(rtwdev, in rtw8822c_txgapk_calculate_offset()
1542 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SEL_PATH, path); in rtw8822c_txgapk_calculate_offset()
1543 rtw_write32_mask(rtwdev, REG_R_CONFIG, BIT_IQ_SWITCH, 0x3f); in rtw8822c_txgapk_calculate_offset()
1544 rtw_write32_mask(rtwdev, REG_IQK_CTL1, BIT_TX_CFIR, 0x0); in rtw8822c_txgapk_calculate_offset()
1555 rtw_write32_mask(rtwdev, REG_IQKSTAT, MASKBYTE0, 0x00); in rtw8822c_txgapk_calculate_offset()
1556 rtw_write32_mask(rtwdev, REG_TABLE_SEL, BIT_Q_GAIN_SEL, 0x0); in rtw8822c_txgapk_calculate_offset()
1562 rtw_write32_mask(rtwdev, in rtw8822c_txgapk_calculate_offset()
1564 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SEL_PATH, path); in rtw8822c_txgapk_calculate_offset()
1565 rtw_write32_mask(rtwdev, REG_R_CONFIG, BIT_IQ_SWITCH, 0x3f); in rtw8822c_txgapk_calculate_offset()
1566 rtw_write32_mask(rtwdev, REG_IQK_CTL1, BIT_TX_CFIR, 0x0); in rtw8822c_txgapk_calculate_offset()
1580 rtw_write32_mask(rtwdev, REG_IQKSTAT, MASKBYTE0, 0x0); in rtw8822c_txgapk_calculate_offset()
1583 rtw_write32_mask(rtwdev, in rtw8822c_txgapk_calculate_offset()
1586 rtw_write32_mask(rtwdev, in rtw8822c_txgapk_calculate_offset()
1589 rtw_write32_mask(rtwdev, in rtw8822c_txgapk_calculate_offset()
1731 rtw_write32_mask(rtwdev, in rtw8822c_txgapk_save_all_tx_gain_table()
1756 rtw_write32_mask(rtwdev, in rtw8822c_txgapk_save_all_tx_gain_table()
1863 rtw_write32_mask(rtwdev, REG_DIS_DPD, DIS_DPD_MASK, DIS_DPD_RATEALL); in rtw8822c_phy_set_param()
1871 rtw_write32_mask(rtwdev, REG_ANAPAR_XTAL_0, 0xfffc00, in rtw8822c_phy_set_param()
2164 rtw_write32_mask(rtwdev, REG_RSTB, BIT_RSTB_3WIRE, 0x1); in rtw8822c_rstb_3wire()
2165 rtw_write32_mask(rtwdev, REG_ANAPAR_A, BIT_ANAPAR_UPDATE, 0x1); in rtw8822c_rstb_3wire()
2166 rtw_write32_mask(rtwdev, REG_ANAPAR_B, BIT_ANAPAR_UPDATE, 0x1); in rtw8822c_rstb_3wire()
2168 rtw_write32_mask(rtwdev, REG_RSTB, BIT_RSTB_3WIRE, 0x0); in rtw8822c_rstb_3wire()
2243 rtw_write32_mask(rtwdev, REG_RXIGI, 0x7f, igi - 2); in rtw8822c_toggle_igi()
2244 rtw_write32_mask(rtwdev, REG_RXIGI, 0x7f00, igi - 2); in rtw8822c_toggle_igi()
2245 rtw_write32_mask(rtwdev, REG_RXIGI, 0x7f, igi); in rtw8822c_toggle_igi()
2246 rtw_write32_mask(rtwdev, REG_RXIGI, 0x7f00, igi); in rtw8822c_toggle_igi()
2257 rtw_write32_mask(rtwdev, REG_CCAMSK, 0x3F000000, 0xF); in rtw8822c_set_channel_bb()
2261 rtw_write32_mask(rtwdev, REG_RXAGCCTL0, BITS_RXAGC_CCK, in rtw8822c_set_channel_bb()
2263 rtw_write32_mask(rtwdev, REG_RXAGCCTL, BITS_RXAGC_CCK, in rtw8822c_set_channel_bb()
2265 rtw_write32_mask(rtwdev, REG_RXAGCCTL0, BITS_RXAGC_OFDM, in rtw8822c_set_channel_bb()
2267 rtw_write32_mask(rtwdev, REG_RXAGCCTL, BITS_RXAGC_OFDM, in rtw8822c_set_channel_bb()
2271 rtw_write32_mask(rtwdev, REG_RXAGCCTL0, BITS_RXAGC_CCK, in rtw8822c_set_channel_bb()
2273 rtw_write32_mask(rtwdev, REG_RXAGCCTL, BITS_RXAGC_CCK, in rtw8822c_set_channel_bb()
2275 rtw_write32_mask(rtwdev, REG_RXAGCCTL0, BITS_RXAGC_OFDM, in rtw8822c_set_channel_bb()
2277 rtw_write32_mask(rtwdev, REG_RXAGCCTL, BITS_RXAGC_OFDM, in rtw8822c_set_channel_bb()
2282 rtw_write32_mask(rtwdev, REG_SCOTRK, 0xfff, 0x969); in rtw8822c_set_channel_bb()
2284 rtw_write32_mask(rtwdev, REG_SCOTRK, 0xfff, 0x96a); in rtw8822c_set_channel_bb()
2286 rtw_write32_mask(rtwdev, REG_SCOTRK, 0xfff, 0x9aa); in rtw8822c_set_channel_bb()
2288 rtw_write32_mask(rtwdev, REG_TXF0, MASKHWORD, 0x3da0); in rtw8822c_set_channel_bb()
2289 rtw_write32_mask(rtwdev, REG_TXF1, MASKDWORD, in rtw8822c_set_channel_bb()
2291 rtw_write32_mask(rtwdev, REG_TXF2, MASKLWORD, 0x6aa3); in rtw8822c_set_channel_bb()
2292 rtw_write32_mask(rtwdev, REG_TXF3, MASKHWORD, 0xaa7b); in rtw8822c_set_channel_bb()
2293 rtw_write32_mask(rtwdev, REG_TXF4, MASKLWORD, 0xf3d7); in rtw8822c_set_channel_bb()
2294 rtw_write32_mask(rtwdev, REG_TXF5, MASKDWORD, 0x0); in rtw8822c_set_channel_bb()
2295 rtw_write32_mask(rtwdev, REG_TXF6, MASKDWORD, in rtw8822c_set_channel_bb()
2297 rtw_write32_mask(rtwdev, REG_TXF7, MASKDWORD, 0xffff); in rtw8822c_set_channel_bb()
2299 rtw_write32_mask(rtwdev, REG_TXF0, MASKHWORD, 0x5284); in rtw8822c_set_channel_bb()
2300 rtw_write32_mask(rtwdev, REG_TXF1, MASKDWORD, in rtw8822c_set_channel_bb()
2302 rtw_write32_mask(rtwdev, REG_TXF2, MASKLWORD, 0x0a88); in rtw8822c_set_channel_bb()
2303 rtw_write32_mask(rtwdev, REG_TXF3, MASKHWORD, 0xacc4); in rtw8822c_set_channel_bb()
2304 rtw_write32_mask(rtwdev, REG_TXF4, MASKLWORD, 0xc8b2); in rtw8822c_set_channel_bb()
2305 rtw_write32_mask(rtwdev, REG_TXF5, MASKDWORD, in rtw8822c_set_channel_bb()
2307 rtw_write32_mask(rtwdev, REG_TXF6, MASKDWORD, in rtw8822c_set_channel_bb()
2309 rtw_write32_mask(rtwdev, REG_TXF7, MASKDWORD, in rtw8822c_set_channel_bb()
2313 rtw_write32_mask(rtwdev, REG_TXDFIR0, 0x70, 0x3); in rtw8822c_set_channel_bb()
2315 rtw_write32_mask(rtwdev, REG_TXDFIR0, 0x70, 0x1); in rtw8822c_set_channel_bb()
2321 rtw_write32_mask(rtwdev, REG_CCAMSK, 0x3F000000, 0x22); in rtw8822c_set_channel_bb()
2322 rtw_write32_mask(rtwdev, REG_TXDFIR0, 0x70, 0x3); in rtw8822c_set_channel_bb()
2324 rtw_write32_mask(rtwdev, REG_RXAGCCTL0, BITS_RXAGC_OFDM, in rtw8822c_set_channel_bb()
2326 rtw_write32_mask(rtwdev, REG_RXAGCCTL, BITS_RXAGC_OFDM, in rtw8822c_set_channel_bb()
2329 rtw_write32_mask(rtwdev, REG_RXAGCCTL0, BITS_RXAGC_OFDM, in rtw8822c_set_channel_bb()
2331 rtw_write32_mask(rtwdev, REG_RXAGCCTL, BITS_RXAGC_OFDM, in rtw8822c_set_channel_bb()
2334 rtw_write32_mask(rtwdev, REG_RXAGCCTL0, BITS_RXAGC_OFDM, in rtw8822c_set_channel_bb()
2336 rtw_write32_mask(rtwdev, REG_RXAGCCTL, BITS_RXAGC_OFDM, in rtw8822c_set_channel_bb()
2341 rtw_write32_mask(rtwdev, REG_SCOTRK, 0xfff, 0x494); in rtw8822c_set_channel_bb()
2343 rtw_write32_mask(rtwdev, REG_SCOTRK, 0xfff, 0x493); in rtw8822c_set_channel_bb()
2345 rtw_write32_mask(rtwdev, REG_SCOTRK, 0xfff, 0x453); in rtw8822c_set_channel_bb()
2347 rtw_write32_mask(rtwdev, REG_SCOTRK, 0xfff, 0x452); in rtw8822c_set_channel_bb()
2349 rtw_write32_mask(rtwdev, REG_SCOTRK, 0xfff, 0x412); in rtw8822c_set_channel_bb()
2351 rtw_write32_mask(rtwdev, REG_SCOTRK, 0xfff, 0x411); in rtw8822c_set_channel_bb()
2356 rtw_write32_mask(rtwdev, REG_DFIRBW, 0x3FF0, 0x19B); in rtw8822c_set_channel_bb()
2357 rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xf, 0x0); in rtw8822c_set_channel_bb()
2358 rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xffc0, 0x0); in rtw8822c_set_channel_bb()
2359 rtw_write32_mask(rtwdev, REG_TXCLK, 0x700, 0x7); in rtw8822c_set_channel_bb()
2360 rtw_write32_mask(rtwdev, REG_TXCLK, 0x700000, 0x6); in rtw8822c_set_channel_bb()
2361 rtw_write32_mask(rtwdev, REG_CCK_SOURCE, BIT_NBI_EN, 0x0); in rtw8822c_set_channel_bb()
2362 rtw_write32_mask(rtwdev, REG_SBD, BITS_SUBTUNE, 0x1); in rtw8822c_set_channel_bb()
2363 rtw_write32_mask(rtwdev, REG_PT_CHSMO, BIT_PT_OPT, 0x0); in rtw8822c_set_channel_bb()
2366 rtw_write32_mask(rtwdev, REG_CCKSB, BIT(4), in rtw8822c_set_channel_bb()
2368 rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xf, 0x5); in rtw8822c_set_channel_bb()
2369 rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xc0, 0x0); in rtw8822c_set_channel_bb()
2370 rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xff00, in rtw8822c_set_channel_bb()
2372 rtw_write32_mask(rtwdev, REG_CCK_SOURCE, BIT_NBI_EN, 0x1); in rtw8822c_set_channel_bb()
2373 rtw_write32_mask(rtwdev, REG_SBD, BITS_SUBTUNE, 0x1); in rtw8822c_set_channel_bb()
2374 rtw_write32_mask(rtwdev, REG_PT_CHSMO, BIT_PT_OPT, 0x1); in rtw8822c_set_channel_bb()
2377 rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xf, 0xa); in rtw8822c_set_channel_bb()
2378 rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xc0, 0x0); in rtw8822c_set_channel_bb()
2379 rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xff00, in rtw8822c_set_channel_bb()
2381 rtw_write32_mask(rtwdev, REG_SBD, BITS_SUBTUNE, 0x6); in rtw8822c_set_channel_bb()
2382 rtw_write32_mask(rtwdev, REG_PT_CHSMO, BIT_PT_OPT, 0x1); in rtw8822c_set_channel_bb()
2385 rtw_write32_mask(rtwdev, REG_DFIRBW, 0x3FF0, 0x2AB); in rtw8822c_set_channel_bb()
2386 rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xf, 0x0); in rtw8822c_set_channel_bb()
2387 rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xffc0, 0x1); in rtw8822c_set_channel_bb()
2388 rtw_write32_mask(rtwdev, REG_TXCLK, 0x700, 0x4); in rtw8822c_set_channel_bb()
2389 rtw_write32_mask(rtwdev, REG_TXCLK, 0x700000, 0x4); in rtw8822c_set_channel_bb()
2390 rtw_write32_mask(rtwdev, REG_CCK_SOURCE, BIT_NBI_EN, 0x0); in rtw8822c_set_channel_bb()
2391 rtw_write32_mask(rtwdev, REG_SBD, BITS_SUBTUNE, 0x1); in rtw8822c_set_channel_bb()
2392 rtw_write32_mask(rtwdev, REG_PT_CHSMO, BIT_PT_OPT, 0x0); in rtw8822c_set_channel_bb()
2395 rtw_write32_mask(rtwdev, REG_DFIRBW, 0x3FF0, 0x2AB); in rtw8822c_set_channel_bb()
2396 rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xf, 0x0); in rtw8822c_set_channel_bb()
2397 rtw_write32_mask(rtwdev, REG_TXBWCTL, 0xffc0, 0x2); in rtw8822c_set_channel_bb()
2398 rtw_write32_mask(rtwdev, REG_TXCLK, 0x700, 0x6); in rtw8822c_set_channel_bb()
2399 rtw_write32_mask(rtwdev, REG_TXCLK, 0x700000, 0x5); in rtw8822c_set_channel_bb()
2400 rtw_write32_mask(rtwdev, REG_CCK_SOURCE, BIT_NBI_EN, 0x0); in rtw8822c_set_channel_bb()
2401 rtw_write32_mask(rtwdev, REG_SBD, BITS_SUBTUNE, 0x1); in rtw8822c_set_channel_bb()
2402 rtw_write32_mask(rtwdev, REG_PT_CHSMO, BIT_PT_OPT, 0x0); in rtw8822c_set_channel_bb()
2419 rtw_write32_mask(rtwdev, REG_CCANRX, 0x00060000, 0x0); in rtw8822c_config_cck_rx_path()
2420 rtw_write32_mask(rtwdev, REG_CCANRX, 0x00600000, 0x0); in rtw8822c_config_cck_rx_path()
2422 rtw_write32_mask(rtwdev, REG_CCANRX, 0x00600000, 0x1); in rtw8822c_config_cck_rx_path()
2423 rtw_write32_mask(rtwdev, REG_CCANRX, 0x00060000, 0x1); in rtw8822c_config_cck_rx_path()
2427 rtw_write32_mask(rtwdev, REG_RXCCKSEL, 0x0f000000, 0x0); in rtw8822c_config_cck_rx_path()
2429 rtw_write32_mask(rtwdev, REG_RXCCKSEL, 0x0f000000, 0x5); in rtw8822c_config_cck_rx_path()
2431 rtw_write32_mask(rtwdev, REG_RXCCKSEL, 0x0f000000, 0x1); in rtw8822c_config_cck_rx_path()
2437 rtw_write32_mask(rtwdev, REG_RXFNCTL, 0x300, 0x0); in rtw8822c_config_ofdm_rx_path()
2438 rtw_write32_mask(rtwdev, REG_RXFNCTL, 0x600000, 0x0); in rtw8822c_config_ofdm_rx_path()
2439 rtw_write32_mask(rtwdev, REG_AGCSWSH, BIT(17), 0x0); in rtw8822c_config_ofdm_rx_path()
2440 rtw_write32_mask(rtwdev, REG_ANTWTPD, BIT(20), 0x0); in rtw8822c_config_ofdm_rx_path()
2441 rtw_write32_mask(rtwdev, REG_MRCM, BIT(24), 0x0); in rtw8822c_config_ofdm_rx_path()
2443 rtw_write32_mask(rtwdev, REG_RXFNCTL, 0x300, 0x1); in rtw8822c_config_ofdm_rx_path()
2444 rtw_write32_mask(rtwdev, REG_RXFNCTL, 0x600000, 0x1); in rtw8822c_config_ofdm_rx_path()
2445 rtw_write32_mask(rtwdev, REG_AGCSWSH, BIT(17), 0x1); in rtw8822c_config_ofdm_rx_path()
2446 rtw_write32_mask(rtwdev, REG_ANTWTPD, BIT(20), 0x1); in rtw8822c_config_ofdm_rx_path()
2447 rtw_write32_mask(rtwdev, REG_MRCM, BIT(24), 0x1); in rtw8822c_config_ofdm_rx_path()
2450 rtw_write32_mask(rtwdev, 0x824, 0x0f000000, rx_path); in rtw8822c_config_ofdm_rx_path()
2451 rtw_write32_mask(rtwdev, 0x824, 0x000f0000, rx_path); in rtw8822c_config_ofdm_rx_path()
2464 rtw_write32_mask(rtwdev, REG_RXCCKSEL, 0xf0000000, 0x8); in rtw8822c_config_cck_tx_path()
2466 rtw_write32_mask(rtwdev, REG_RXCCKSEL, 0xf0000000, 0x4); in rtw8822c_config_cck_tx_path()
2469 rtw_write32_mask(rtwdev, REG_RXCCKSEL, 0xf0000000, 0xc); in rtw8822c_config_cck_tx_path()
2471 rtw_write32_mask(rtwdev, REG_RXCCKSEL, 0xf0000000, 0x8); in rtw8822c_config_cck_tx_path()
2480 rtw_write32_mask(rtwdev, REG_ANTMAP0, 0xff, 0x11); in rtw8822c_config_ofdm_tx_path()
2481 rtw_write32_mask(rtwdev, REG_TXLGMAP, 0xff, 0x0); in rtw8822c_config_ofdm_tx_path()
2483 rtw_write32_mask(rtwdev, REG_ANTMAP0, 0xff, 0x12); in rtw8822c_config_ofdm_tx_path()
2484 rtw_write32_mask(rtwdev, REG_TXLGMAP, 0xff, 0x0); in rtw8822c_config_ofdm_tx_path()
2487 rtw_write32_mask(rtwdev, REG_ANTMAP0, 0xff, 0x33); in rtw8822c_config_ofdm_tx_path()
2488 rtw_write32_mask(rtwdev, REG_TXLGMAP, 0xffff, 0x0404); in rtw8822c_config_ofdm_tx_path()
2490 rtw_write32_mask(rtwdev, REG_ANTMAP0, 0xff, 0x32); in rtw8822c_config_ofdm_tx_path()
2491 rtw_write32_mask(rtwdev, REG_TXLGMAP, 0xffff, 0x0400); in rtw8822c_config_ofdm_tx_path()
2493 rtw_write32_mask(rtwdev, REG_ANTMAP0, 0xff, 0x31); in rtw8822c_config_ofdm_tx_path()
2494 rtw_write32_mask(rtwdev, REG_TXLGMAP, 0xffff, 0x0400); in rtw8822c_config_ofdm_tx_path()
2514 rtw_write32_mask(rtwdev, REG_ORITXCODE, MASK20BITS, 0x33312); in rtw8822c_config_trx_mode()
2516 rtw_write32_mask(rtwdev, REG_ORITXCODE, MASK20BITS, 0x11111); in rtw8822c_config_trx_mode()
2518 rtw_write32_mask(rtwdev, REG_ORITXCODE2, MASK20BITS, 0x33312); in rtw8822c_config_trx_mode()
2520 rtw_write32_mask(rtwdev, REG_ORITXCODE2, MASK20BITS, 0x11111); in rtw8822c_config_trx_mode()
2723 rtw_write32_mask(rtwdev, 0x1c90, BIT(15), 0); in rtw8822c_set_write_tx_power_ref()
2724 rtw_write32_mask(rtwdev, txref_cck[path], 0x7f0000, in rtw8822c_set_write_tx_power_ref()
2728 rtw_write32_mask(rtwdev, 0x1c90, BIT(15), 0); in rtw8822c_set_write_tx_power_ref()
2729 rtw_write32_mask(rtwdev, txref_ofdm[path], 0x1fc00, in rtw8822c_set_write_tx_power_ref()
2751 rtw_write32_mask(rtwdev, 0x1c90, BIT(15), 0x0); in rtw8822c_set_tx_power_diff()
2752 rtw_write32_mask(rtwdev, offset_txagc + rate_idx, MASKDWORD, in rtw8822c_set_tx_power_diff()
2890 rtw_write32_mask(rtwdev, REG_CCANRX, BIT_CCK_FA_RST, 0); in rtw8822c_false_alarm_statistics()
2891 rtw_write32_mask(rtwdev, REG_CCANRX, BIT_CCK_FA_RST, 2); in rtw8822c_false_alarm_statistics()
2892 rtw_write32_mask(rtwdev, REG_CCANRX, BIT_OFDM_FA_RST, 0); in rtw8822c_false_alarm_statistics()
2893 rtw_write32_mask(rtwdev, REG_CCANRX, BIT_OFDM_FA_RST, 2); in rtw8822c_false_alarm_statistics()
3187 rtw_write32_mask(rtwdev, p->addr, p->bitmask, p->data); in rtw8822c_parse_tbl_dpk()
3197 rtw_write32_mask(rtwdev, 0x70, BIT(26), 0x1); in rtw8822c_dpk_set_gnt_wl()
3211 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0xc); in rtw8822c_dpk_restore_registers()
3212 rtw_write32_mask(rtwdev, REG_RXSRAM_CTL, BIT_DPD_CLK, 0x4); in rtw8822c_dpk_restore_registers()
3310 rtw_write32_mask(rtwdev, 0x1e70, 0xf, 0x2); in rtw8822c_dpk_tx_pause()
3345 rtw_write32_mask(rtwdev, REG_DPD_LUT0, BIT_GLOSS_DB, 0x4); in rtw8822c_dpk_pre_setting()
3346 rtw_write32_mask(rtwdev, REG_IQK_CTL1, BIT_TX_CFIR, 0x3); in rtw8822c_dpk_pre_setting()
3348 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0xc); in rtw8822c_dpk_pre_setting()
3424 rtw_write32_mask(rtwdev, REG_DPD_CTL0, BIT(12), 0x1); in rtw8822c_dpk_one_shot()
3425 rtw_write32_mask(rtwdev, REG_DPD_CTL0, BIT(12), 0x0); in rtw8822c_dpk_one_shot()
3426 rtw_write32_mask(rtwdev, REG_RXSRAM_CTL, BIT_RPT_SEL, 0x0); in rtw8822c_dpk_one_shot()
3433 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, in rtw8822c_dpk_one_shot()
3435 rtw_write32_mask(rtwdev, REG_R_CONFIG, BIT_IQ_SWITCH, 0x9); in rtw8822c_dpk_one_shot()
3445 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, in rtw8822c_dpk_one_shot()
3447 rtw_write32_mask(rtwdev, REG_R_CONFIG, BIT_IQ_SWITCH, 0x0); in rtw8822c_dpk_one_shot()
3461 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0xc); in rtw8822c_dpk_dgain_read()
3462 rtw_write32_mask(rtwdev, REG_RXSRAM_CTL, 0x00ff0000, 0x0); in rtw8822c_dpk_dgain_read()
3484 rtw_write32_mask(rtwdev, 0x1b48, BIT(14), 0x0); in rtw8822c_dpk_pas_read()
3532 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0x8 | (path << 1)); in rtw8822c_dpk_gainloss_result()
3533 rtw_write32_mask(rtwdev, 0x1b48, BIT(14), 0x1); in rtw8822c_dpk_gainloss_result()
3538 rtw_write32_mask(rtwdev, 0x1b48, BIT(14), 0x0); in rtw8822c_dpk_gainloss_result()
3768 rtw_write32_mask(rtwdev, REG_DPD_CTL0, BIT(24), 0x0); in rtw8822c_dpk_get_coef()
3771 rtw_write32_mask(rtwdev, REG_DPD_CTL0, BIT(24), 0x1); in rtw8822c_dpk_get_coef()
3824 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0x8 | (path << 1)); in rtw8822c_dpk_fill_result()
3881 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0x8 | (path << 1)); in rtw8822c_dpk_by_path()
3897 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0x8 | (path << 1)); in rtw8822c_dpk_cal_gs()
3898 rtw_write32_mask(rtwdev, REG_IQK_CTL1, BIT_BYPASS_DPD, 0x0); in rtw8822c_dpk_cal_gs()
3899 rtw_write32_mask(rtwdev, REG_IQK_CTL1, BIT_TX_CFIR, 0x0); in rtw8822c_dpk_cal_gs()
3900 rtw_write32_mask(rtwdev, REG_R_CONFIG, BIT_IQ_SWITCH, 0x9); in rtw8822c_dpk_cal_gs()
3901 rtw_write32_mask(rtwdev, REG_R_CONFIG, BIT_INNER_LB, 0x1); in rtw8822c_dpk_cal_gs()
3902 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0xc); in rtw8822c_dpk_cal_gs()
3903 rtw_write32_mask(rtwdev, REG_RXSRAM_CTL, BIT_DPD_CLK, 0xf); in rtw8822c_dpk_cal_gs()
3906 rtw_write32_mask(rtwdev, REG_DPD_CTL0_S0, BIT_GS_PWSF, in rtw8822c_dpk_cal_gs()
3908 rtw_write32_mask(rtwdev, REG_DPD_CTL1_S0, BIT_DPD_EN, 0x1); in rtw8822c_dpk_cal_gs()
3910 rtw_write32_mask(rtwdev, REG_DPD_CTL0_S1, BIT_GS_PWSF, in rtw8822c_dpk_cal_gs()
3912 rtw_write32_mask(rtwdev, REG_DPD_CTL1_S1, BIT_DPD_EN, 0x1); in rtw8822c_dpk_cal_gs()
3933 rtw_write32_mask(rtwdev, REG_DPD_CTL0, MASKBYTE3, 0x8 | path); in rtw8822c_dpk_cal_gs()
3937 rtw_write32_mask(rtwdev, REG_DPD_CTL15, MASKBYTE3, 0x0); in rtw8822c_dpk_cal_gs()
3938 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0x8 | (path << 1)); in rtw8822c_dpk_cal_gs()
3939 rtw_write32_mask(rtwdev, REG_R_CONFIG, BIT_IQ_SWITCH, 0x0); in rtw8822c_dpk_cal_gs()
3940 rtw_write32_mask(rtwdev, REG_R_CONFIG, BIT_INNER_LB, 0x0); in rtw8822c_dpk_cal_gs()
3941 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0xc); in rtw8822c_dpk_cal_gs()
3944 rtw_write32_mask(rtwdev, REG_DPD_CTL0_S0, BIT_GS_PWSF, 0x5b); in rtw8822c_dpk_cal_gs()
3946 rtw_write32_mask(rtwdev, REG_DPD_CTL0_S1, BIT_GS_PWSF, 0x5b); in rtw8822c_dpk_cal_gs()
3948 rtw_write32_mask(rtwdev, REG_RXSRAM_CTL, BIT_RPT_SEL, 0x0); in rtw8822c_dpk_cal_gs()
3955 rtw_write32_mask(rtwdev, REG_DPD_CTL0_S0, BIT_GS_PWSF, tmp_gs); in rtw8822c_dpk_cal_gs()
3957 rtw_write32_mask(rtwdev, REG_DPD_CTL0_S1, BIT_GS_PWSF, tmp_gs); in rtw8822c_dpk_cal_gs()
3969 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0x0000000c); in rtw8822c_dpk_cal_coef1()
3977 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0x0000000c); in rtw8822c_dpk_cal_coef1()
3982 rtw_write32_mask(rtwdev, 0x1b18 + offset[path], MASKHWORD, in rtw8822c_dpk_cal_coef1()
3984 rtw_write32_mask(rtwdev, REG_DPD_CTL0_S0 + offset[path], in rtw8822c_dpk_cal_coef1()
3986 rtw_write32_mask(rtwdev, REG_DPD_CTL0_S0 + offset[path], in rtw8822c_dpk_cal_coef1()
3988 rtw_write32_mask(rtwdev, REG_DPD_CTL0_S0 + offset[path], in rtw8822c_dpk_cal_coef1()
3990 rtw_write32_mask(rtwdev, REG_DPD_CTL1_S0 + offset[path], in rtw8822c_dpk_cal_coef1()
4001 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0x8 | (path << 1)); in rtw8822c_dpk_on()
4002 rtw_write32_mask(rtwdev, REG_IQK_CTL1, BIT_TX_CFIR, 0x0); in rtw8822c_dpk_on()
4034 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, in rtw8822c_dpk_result_reset()
4036 rtw_write32_mask(rtwdev, 0x1b58, 0x0000007f, 0x0); in rtw8822c_dpk_result_reset()
4082 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0xc); in rtw8822c_dpk_enable_disable()
4084 rtw_write32_mask(rtwdev, REG_DPD_CTL1_S0, BIT_DPD_EN, in rtw8822c_dpk_enable_disable()
4086 rtw_write32_mask(rtwdev, REG_DPD_CTL1_S1, BIT_DPD_EN, in rtw8822c_dpk_enable_disable()
4090 rtw_write32_mask(rtwdev, REG_DPD_CTL1_S0, mask, 0x0); in rtw8822c_dpk_enable_disable()
4094 rtw_write32_mask(rtwdev, REG_DPD_CTL1_S1, mask, 0x0); in rtw8822c_dpk_enable_disable()
4110 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, in rtw8822c_dpk_reload_data()
4124 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0xc); in rtw8822c_dpk_reload_data()
4127 rtw_write32_mask(rtwdev, REG_DPD_CTL0_S0, BIT_GS_PWSF, in rtw8822c_dpk_reload_data()
4130 rtw_write32_mask(rtwdev, REG_DPD_CTL0_S1, BIT_GS_PWSF, in rtw8822c_dpk_reload_data()
4229 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, in rtw8822c_dpk_track()
4231 rtw_write32_mask(rtwdev, 0x1b58, GENMASK(6, 0), in rtw8822c_dpk_track()
4247 rtw_write32_mask(rtwdev, REG_ANAPAR_XTAL_0, BIT_XCAP_0, val); in rtw8822c_set_crystal_cap_reg()
4399 rtw_write32_mask(rtwdev, in rtw8822c_phy_cck_pd_set_reg()
4403 rtw_write32_mask(rtwdev, in rtw8822c_phy_cck_pd_set_reg()
4450 rtw_write32_mask(rtwdev, 0x18a0, PWR_TRACK_MASK, in rtw8822c_pwrtrack_set()
4454 rtw_write32_mask(rtwdev, 0x41a0, PWR_TRACK_MASK, in rtw8822c_pwrtrack_set()