Lines Matching refs:rtwdev
20 static void rtw8822b_config_trx_mode(struct rtw_dev *rtwdev, u8 tx_path,
29 static int rtw8822b_read_efuse(struct rtw_dev *rtwdev, u8 *log_map) in rtw8822b_read_efuse() argument
31 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8822b_read_efuse()
55 switch (rtw_hci_type(rtwdev)) { in rtw8822b_read_efuse()
67 static void rtw8822b_phy_rfe_init(struct rtw_dev *rtwdev) in rtw8822b_phy_rfe_init() argument
70 rtw_write32_mask(rtwdev, 0x64, BIT(29) | BIT(28), 0x3); in rtw8822b_phy_rfe_init()
71 rtw_write32_mask(rtwdev, 0x4c, BIT(26) | BIT(25), 0x0); in rtw8822b_phy_rfe_init()
72 rtw_write32_mask(rtwdev, 0x40, BIT(2), 0x1); in rtw8822b_phy_rfe_init()
75 rtw_write32_mask(rtwdev, 0x1990, 0x3f, 0x30); in rtw8822b_phy_rfe_init()
76 rtw_write32_mask(rtwdev, 0x1990, (BIT(11) | BIT(10)), 0x3); in rtw8822b_phy_rfe_init()
79 rtw_write32_mask(rtwdev, 0x974, 0x3f, 0x3f); in rtw8822b_phy_rfe_init()
80 rtw_write32_mask(rtwdev, 0x974, (BIT(11) | BIT(10)), 0x3); in rtw8822b_phy_rfe_init()
91 static u8 rtw8822b_get_swing_index(struct rtw_dev *rtwdev) in rtw8822b_get_swing_index() argument
96 swing = rtw_read32_mask(rtwdev, 0xc1c, 0xffe00000); in rtw8822b_get_swing_index()
106 static void rtw8822b_pwrtrack_init(struct rtw_dev *rtwdev) in rtw8822b_pwrtrack_init() argument
108 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in rtw8822b_pwrtrack_init()
109 u8 swing_idx = rtw8822b_get_swing_index(rtwdev); in rtw8822b_pwrtrack_init()
117 for (path = RF_PATH_A; path < rtwdev->hal.rf_path_num; path++) { in rtw8822b_pwrtrack_init()
123 dm_info->thermal_meter_k = rtwdev->efuse.thermal_meter_k; in rtw8822b_pwrtrack_init()
126 static void rtw8822b_phy_bf_init(struct rtw_dev *rtwdev) in rtw8822b_phy_bf_init() argument
128 rtw_bf_phy_init(rtwdev); in rtw8822b_phy_bf_init()
130 rtw_write32(rtwdev, 0x1C94, 0xAFFFAFFF); in rtw8822b_phy_bf_init()
133 static void rtw8822b_phy_set_param(struct rtw_dev *rtwdev) in rtw8822b_phy_set_param() argument
135 struct rtw_hal *hal = &rtwdev->hal; in rtw8822b_phy_set_param()
140 rtw_write8_set(rtwdev, REG_SYS_FUNC_EN, in rtw8822b_phy_set_param()
142 rtw_write8_set(rtwdev, REG_RF_CTRL, in rtw8822b_phy_set_param()
144 rtw_write32_set(rtwdev, REG_WLRF1, BIT_WLRF1_BBRF_EN); in rtw8822b_phy_set_param()
147 rtw_write32_clr(rtwdev, REG_RXPSEL, BIT_RX_PSEL_RST); in rtw8822b_phy_set_param()
149 rtw_phy_load_tables(rtwdev); in rtw8822b_phy_set_param()
151 crystal_cap = rtwdev->efuse.crystal_cap & 0x3F; in rtw8822b_phy_set_param()
152 rtw_write32_mask(rtwdev, 0x24, 0x7e000000, crystal_cap); in rtw8822b_phy_set_param()
153 rtw_write32_mask(rtwdev, 0x28, 0x7e, crystal_cap); in rtw8822b_phy_set_param()
156 rtw_write32_set(rtwdev, REG_RXPSEL, BIT_RX_PSEL_RST); in rtw8822b_phy_set_param()
159 rtw8822b_config_trx_mode(rtwdev, hal->antenna_tx, hal->antenna_rx, in rtw8822b_phy_set_param()
161 rtw_phy_init(rtwdev); in rtw8822b_phy_set_param()
163 rtw8822b_phy_rfe_init(rtwdev); in rtw8822b_phy_set_param()
164 rtw8822b_pwrtrack_init(rtwdev); in rtw8822b_phy_set_param()
166 rtw8822b_phy_bf_init(rtwdev); in rtw8822b_phy_set_param()
221 static int rtw8822b_mac_init(struct rtw_dev *rtwdev) in rtw8822b_mac_init() argument
226 rtw_write8_clr(rtwdev, REG_SW_AMPDU_BURST_MODE_CTRL, BIT_PRE_TX_CMD); in rtw8822b_mac_init()
227 rtw_write8(rtwdev, REG_AMPDU_MAX_TIME_V1, WLAN_AMPDU_MAX_TIME); in rtw8822b_mac_init()
228 rtw_write8_set(rtwdev, REG_TX_HANG_CTRL, BIT_EN_EOF_V1); in rtw8822b_mac_init()
232 rtw_write32(rtwdev, REG_PROT_MODE_CTRL, value32); in rtw8822b_mac_init()
233 rtw_write16(rtwdev, REG_BAR_MODE_CTRL + 2, in rtw8822b_mac_init()
235 rtw_write8(rtwdev, REG_FAST_EDCA_VOVI_SETTING, FAST_EDCA_VO_TH); in rtw8822b_mac_init()
236 rtw_write8(rtwdev, REG_FAST_EDCA_VOVI_SETTING + 2, FAST_EDCA_VI_TH); in rtw8822b_mac_init()
237 rtw_write8(rtwdev, REG_FAST_EDCA_BEBK_SETTING, FAST_EDCA_BE_TH); in rtw8822b_mac_init()
238 rtw_write8(rtwdev, REG_FAST_EDCA_BEBK_SETTING + 2, FAST_EDCA_BK_TH); in rtw8822b_mac_init()
240 rtw_write8_clr(rtwdev, REG_TIMER0_SRC_SEL, BIT_TSFT_SEL_TIMER0); in rtw8822b_mac_init()
241 rtw_write16(rtwdev, REG_TXPAUSE, 0x0000); in rtw8822b_mac_init()
242 rtw_write8(rtwdev, REG_SLOT, WLAN_SLOT_TIME); in rtw8822b_mac_init()
243 rtw_write8(rtwdev, REG_PIFS, WLAN_PIFS_TIME); in rtw8822b_mac_init()
244 rtw_write32(rtwdev, REG_SIFS, WLAN_SIFS_CFG); in rtw8822b_mac_init()
245 rtw_write16(rtwdev, REG_EDCA_VO_PARAM + 2, WLAN_VO_TXOP_LIMIT); in rtw8822b_mac_init()
246 rtw_write16(rtwdev, REG_EDCA_VI_PARAM + 2, WLAN_VI_TXOP_LIMIT); in rtw8822b_mac_init()
247 rtw_write32(rtwdev, REG_RD_NAV_NXT, WLAN_NAV_CFG); in rtw8822b_mac_init()
248 rtw_write16(rtwdev, REG_RXTSF_OFFSET_CCK, WLAN_RX_TSF_CFG); in rtw8822b_mac_init()
250 rtw_write8_set(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION); in rtw8822b_mac_init()
252 rtw_write32(rtwdev, REG_TBTT_PROHIBIT, WLAN_TBTT_TIME); in rtw8822b_mac_init()
253 rtw_write8(rtwdev, REG_DRVERLYINT, WLAN_DRV_EARLY_INT); in rtw8822b_mac_init()
254 rtw_write8(rtwdev, REG_BCNDMATIM, WLAN_BCN_DMA_TIME); in rtw8822b_mac_init()
255 rtw_write8_clr(rtwdev, REG_TX_PTCL_CTRL + 1, BIT_SIFS_BK_EN >> 8); in rtw8822b_mac_init()
257 rtw_write32(rtwdev, REG_RXFLTMAP0, WLAN_RX_FILTER0); in rtw8822b_mac_init()
258 rtw_write16(rtwdev, REG_RXFLTMAP2, WLAN_RX_FILTER2); in rtw8822b_mac_init()
259 rtw_write32(rtwdev, REG_RCR, WLAN_RCR_CFG); in rtw8822b_mac_init()
260 rtw_write8(rtwdev, REG_RX_PKT_LIMIT, WLAN_RXPKT_MAX_SZ_512); in rtw8822b_mac_init()
261 rtw_write8(rtwdev, REG_TCR + 2, WLAN_TX_FUNC_CFG2); in rtw8822b_mac_init()
262 rtw_write8(rtwdev, REG_TCR + 1, WLAN_TX_FUNC_CFG1); in rtw8822b_mac_init()
263 rtw_write32(rtwdev, REG_WMAC_OPTION_FUNCTION + 8, WLAN_MAC_OPT_FUNC2); in rtw8822b_mac_init()
264 rtw_write8(rtwdev, REG_WMAC_OPTION_FUNCTION + 4, WLAN_MAC_OPT_NORM_FUNC1); in rtw8822b_mac_init()
265 rtw_write8_set(rtwdev, REG_SND_PTCL_CTRL, in rtw8822b_mac_init()
271 static void rtw8822b_set_channel_rfe_efem(struct rtw_dev *rtwdev, u8 channel) in rtw8822b_set_channel_rfe_efem() argument
273 struct rtw_hal *hal = &rtwdev->hal; in rtw8822b_set_channel_rfe_efem()
276 rtw_write32s_mask(rtwdev, REG_RFESEL0, 0xffffff, 0x705770); in rtw8822b_set_channel_rfe_efem()
277 rtw_write32s_mask(rtwdev, REG_RFESEL8, MASKBYTE1, 0x57); in rtw8822b_set_channel_rfe_efem()
278 rtw_write32s_mask(rtwdev, REG_RFECTL, BIT(4), 0); in rtw8822b_set_channel_rfe_efem()
280 rtw_write32s_mask(rtwdev, REG_RFESEL0, 0xffffff, 0x177517); in rtw8822b_set_channel_rfe_efem()
281 rtw_write32s_mask(rtwdev, REG_RFESEL8, MASKBYTE1, 0x75); in rtw8822b_set_channel_rfe_efem()
282 rtw_write32s_mask(rtwdev, REG_RFECTL, BIT(5), 0); in rtw8822b_set_channel_rfe_efem()
285 rtw_write32s_mask(rtwdev, REG_RFEINV, BIT(11) | BIT(10) | 0x3f, 0x0); in rtw8822b_set_channel_rfe_efem()
290 rtw_write32s_mask(rtwdev, REG_TRSW, MASKLWORD, 0xa501); in rtw8822b_set_channel_rfe_efem()
293 rtw_write32s_mask(rtwdev, REG_TRSW, MASKLWORD, 0xa500); in rtw8822b_set_channel_rfe_efem()
296 rtw_write32s_mask(rtwdev, REG_TRSW, MASKLWORD, 0xa005); in rtw8822b_set_channel_rfe_efem()
300 static void rtw8822b_set_channel_rfe_ifem(struct rtw_dev *rtwdev, u8 channel) in rtw8822b_set_channel_rfe_ifem() argument
302 struct rtw_hal *hal = &rtwdev->hal; in rtw8822b_set_channel_rfe_ifem()
306 rtw_write32s_mask(rtwdev, REG_RFESEL0, 0xffffff, 0x745774); in rtw8822b_set_channel_rfe_ifem()
307 rtw_write32s_mask(rtwdev, REG_RFESEL8, MASKBYTE1, 0x57); in rtw8822b_set_channel_rfe_ifem()
310 rtw_write32s_mask(rtwdev, REG_RFESEL0, 0xffffff, 0x477547); in rtw8822b_set_channel_rfe_ifem()
311 rtw_write32s_mask(rtwdev, REG_RFESEL8, MASKBYTE1, 0x75); in rtw8822b_set_channel_rfe_ifem()
314 rtw_write32s_mask(rtwdev, REG_RFEINV, BIT(11) | BIT(10) | 0x3f, 0x0); in rtw8822b_set_channel_rfe_ifem()
320 rtw_write32s_mask(rtwdev, REG_TRSW, MASKLWORD, 0xa501); in rtw8822b_set_channel_rfe_ifem()
323 rtw_write32s_mask(rtwdev, REG_TRSW, MASKLWORD, 0xa500); in rtw8822b_set_channel_rfe_ifem()
326 rtw_write32s_mask(rtwdev, REG_TRSW, MASKLWORD, 0xa005); in rtw8822b_set_channel_rfe_ifem()
329 rtw_write32s_mask(rtwdev, REG_TRSW, MASKLWORD, 0xa5a5); in rtw8822b_set_channel_rfe_ifem()
378 void (*rtw_set_channel_rfe)(struct rtw_dev *rtwdev, u8 channel);
402 static void rtw8822b_set_channel_cca(struct rtw_dev *rtwdev, u8 channel, u8 bw, in rtw8822b_set_channel_cca() argument
405 struct rtw_hal *hal = &rtwdev->hal; in rtw8822b_set_channel_cca()
406 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8822b_set_channel_cca()
460 rtw_write32_mask(rtwdev, REG_CCASEL, MASKDWORD, reg82c); in rtw8822b_set_channel_cca()
461 rtw_write32_mask(rtwdev, REG_PDMFTH, MASKDWORD, reg830); in rtw8822b_set_channel_cca()
462 rtw_write32_mask(rtwdev, REG_CCA2ND, MASKDWORD, reg838); in rtw8822b_set_channel_cca()
465 rtw_write32_mask(rtwdev, REG_L1WT, MASKDWORD, 0x9194b2b9); in rtw8822b_set_channel_cca()
468 rtw_write32_mask(rtwdev, REG_CCA2ND, 0xf0, 0x4); in rtw8822b_set_channel_cca()
479 static void rtw8822b_set_channel_rf(struct rtw_dev *rtwdev, u8 channel, u8 bw) in rtw8822b_set_channel_rf() argument
494 struct rtw_hal *hal = &rtwdev->hal; in rtw8822b_set_channel_rf()
497 rf_reg18 = rtw_read_rf(rtwdev, RF_PATH_A, 0x18, RFREG_MASK); in rtw8822b_set_channel_rf()
535 rtw_write_rf(rtwdev, RF_PATH_A, RF_MALSEL, RFBE_MASK, rf_reg_be); in rtw8822b_set_channel_rf()
539 rtw_write_rf(rtwdev, RF_PATH_A, RF_LUTDBG, BIT(18), 0x1); in rtw8822b_set_channel_rf()
541 rtw_write_rf(rtwdev, RF_PATH_A, RF_LUTDBG, BIT(18), 0x0); in rtw8822b_set_channel_rf()
543 rtw_write_rf(rtwdev, RF_PATH_A, 0x18, RFREG_MASK, rf_reg18); in rtw8822b_set_channel_rf()
545 rtw_write_rf(rtwdev, RF_PATH_B, 0x18, RFREG_MASK, rf_reg18); in rtw8822b_set_channel_rf()
547 rtw_write_rf(rtwdev, RF_PATH_A, RF_XTALX2, BIT(19), 0); in rtw8822b_set_channel_rf()
548 rtw_write_rf(rtwdev, RF_PATH_A, RF_XTALX2, BIT(19), 1); in rtw8822b_set_channel_rf()
556 static void rtw8822b_toggle_igi(struct rtw_dev *rtwdev) in rtw8822b_toggle_igi() argument
558 struct rtw_hal *hal = &rtwdev->hal; in rtw8822b_toggle_igi()
561 igi = rtw_read32_mask(rtwdev, REG_RXIGI_A, 0x7f); in rtw8822b_toggle_igi()
562 rtw_write32_mask(rtwdev, REG_RXIGI_A, 0x7f, igi - 2); in rtw8822b_toggle_igi()
563 rtw_write32_mask(rtwdev, REG_RXIGI_A, 0x7f, igi); in rtw8822b_toggle_igi()
564 rtw_write32_mask(rtwdev, REG_RXIGI_B, 0x7f, igi - 2); in rtw8822b_toggle_igi()
565 rtw_write32_mask(rtwdev, REG_RXIGI_B, 0x7f, igi); in rtw8822b_toggle_igi()
567 rtw_write32_mask(rtwdev, REG_RXPSEL, MASKBYTE0, 0x0); in rtw8822b_toggle_igi()
568 rtw_write32_mask(rtwdev, REG_RXPSEL, MASKBYTE0, in rtw8822b_toggle_igi()
572 static void rtw8822b_set_channel_rxdfir(struct rtw_dev *rtwdev, u8 bw) in rtw8822b_set_channel_rxdfir() argument
576 rtw_write32_mask(rtwdev, REG_ACBB0, BIT(29) | BIT(28), 0x1); in rtw8822b_set_channel_rxdfir()
577 rtw_write32_mask(rtwdev, REG_ACBBRXFIR, BIT(29) | BIT(28), 0x0); in rtw8822b_set_channel_rxdfir()
578 rtw_write32s_mask(rtwdev, REG_TXDFIR, BIT(31), 0x0); in rtw8822b_set_channel_rxdfir()
581 rtw_write32_mask(rtwdev, REG_ACBB0, BIT(29) | BIT(28), 0x2); in rtw8822b_set_channel_rxdfir()
582 rtw_write32_mask(rtwdev, REG_ACBBRXFIR, BIT(29) | BIT(28), 0x1); in rtw8822b_set_channel_rxdfir()
583 rtw_write32s_mask(rtwdev, REG_TXDFIR, BIT(31), 0x0); in rtw8822b_set_channel_rxdfir()
586 rtw_write32_mask(rtwdev, REG_ACBB0, BIT(29) | BIT(28), 0x2); in rtw8822b_set_channel_rxdfir()
587 rtw_write32_mask(rtwdev, REG_ACBBRXFIR, BIT(29) | BIT(28), 0x2); in rtw8822b_set_channel_rxdfir()
588 rtw_write32s_mask(rtwdev, REG_TXDFIR, BIT(31), 0x1); in rtw8822b_set_channel_rxdfir()
592 static void rtw8822b_set_channel_bb(struct rtw_dev *rtwdev, u8 channel, u8 bw, in rtw8822b_set_channel_bb() argument
595 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8822b_set_channel_bb()
600 rtw_write32_mask(rtwdev, REG_RXPSEL, BIT(28), 0x1); in rtw8822b_set_channel_bb()
601 rtw_write32_mask(rtwdev, REG_CCK_CHECK, BIT(7), 0x0); in rtw8822b_set_channel_bb()
602 rtw_write32_mask(rtwdev, REG_ENTXCCK, BIT(18), 0x0); in rtw8822b_set_channel_bb()
603 rtw_write32_mask(rtwdev, REG_RXCCAMSK, 0x0000FC00, 15); in rtw8822b_set_channel_bb()
605 rtw_write32_mask(rtwdev, REG_ACGG2TBL, 0x1f, 0x0); in rtw8822b_set_channel_bb()
606 rtw_write32_mask(rtwdev, REG_CLKTRK, 0x1ffe0000, 0x96a); in rtw8822b_set_channel_bb()
608 rtw_write32_mask(rtwdev, REG_TXSF2, MASKDWORD, 0x00006577); in rtw8822b_set_channel_bb()
609 rtw_write32_mask(rtwdev, REG_TXSF6, MASKLWORD, 0x0000); in rtw8822b_set_channel_bb()
611 rtw_write32_mask(rtwdev, REG_TXSF2, MASKDWORD, 0x384f6577); in rtw8822b_set_channel_bb()
612 rtw_write32_mask(rtwdev, REG_TXSF6, MASKLWORD, 0x1525); in rtw8822b_set_channel_bb()
615 rtw_write32_mask(rtwdev, REG_RFEINV, 0x300, 0x2); in rtw8822b_set_channel_bb()
617 rtw_write32_mask(rtwdev, REG_ENTXCCK, BIT(18), 0x1); in rtw8822b_set_channel_bb()
618 rtw_write32_mask(rtwdev, REG_CCK_CHECK, BIT(7), 0x1); in rtw8822b_set_channel_bb()
619 rtw_write32_mask(rtwdev, REG_RXPSEL, BIT(28), 0x0); in rtw8822b_set_channel_bb()
620 rtw_write32_mask(rtwdev, REG_RXCCAMSK, 0x0000FC00, 34); in rtw8822b_set_channel_bb()
623 rtw_write32_mask(rtwdev, REG_ACGG2TBL, 0x1f, 0x1); in rtw8822b_set_channel_bb()
625 rtw_write32_mask(rtwdev, REG_ACGG2TBL, 0x1f, 0x2); in rtw8822b_set_channel_bb()
627 rtw_write32_mask(rtwdev, REG_ACGG2TBL, 0x1f, 0x3); in rtw8822b_set_channel_bb()
630 rtw_write32_mask(rtwdev, REG_CLKTRK, 0x1ffe0000, 0x494); in rtw8822b_set_channel_bb()
632 rtw_write32_mask(rtwdev, REG_CLKTRK, 0x1ffe0000, 0x453); in rtw8822b_set_channel_bb()
634 rtw_write32_mask(rtwdev, REG_CLKTRK, 0x1ffe0000, 0x452); in rtw8822b_set_channel_bb()
636 rtw_write32_mask(rtwdev, REG_CLKTRK, 0x1ffe0000, 0x412); in rtw8822b_set_channel_bb()
638 rtw_write32_mask(rtwdev, 0xcbc, 0x300, 0x1); in rtw8822b_set_channel_bb()
644 val32 = rtw_read32_mask(rtwdev, REG_ADCCLK, MASKDWORD); in rtw8822b_set_channel_bb()
647 rtw_write32_mask(rtwdev, REG_ADCCLK, MASKDWORD, val32); in rtw8822b_set_channel_bb()
649 rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 0x1); in rtw8822b_set_channel_bb()
653 rtw_write32_set(rtwdev, REG_RXSB, BIT(4)); in rtw8822b_set_channel_bb()
655 rtw_write32_clr(rtwdev, REG_RXSB, BIT(4)); in rtw8822b_set_channel_bb()
657 val32 = rtw_read32_mask(rtwdev, REG_ADCCLK, MASKDWORD); in rtw8822b_set_channel_bb()
660 rtw_write32_mask(rtwdev, REG_ADCCLK, MASKDWORD, val32); in rtw8822b_set_channel_bb()
662 rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 0x1); in rtw8822b_set_channel_bb()
665 val32 = rtw_read32_mask(rtwdev, REG_ADCCLK, MASKDWORD); in rtw8822b_set_channel_bb()
668 rtw_write32_mask(rtwdev, REG_ADCCLK, MASKDWORD, val32); in rtw8822b_set_channel_bb()
670 rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 0x1); in rtw8822b_set_channel_bb()
673 rtw_write32_mask(rtwdev, REG_L1PKWT, 0x0000f000, 0x6); in rtw8822b_set_channel_bb()
674 rtw_write32_mask(rtwdev, REG_ADC40, BIT(10), 0x1); in rtw8822b_set_channel_bb()
678 val32 = rtw_read32_mask(rtwdev, REG_ADCCLK, MASKDWORD); in rtw8822b_set_channel_bb()
681 rtw_write32_mask(rtwdev, REG_ADCCLK, MASKDWORD, val32); in rtw8822b_set_channel_bb()
683 rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 0x0); in rtw8822b_set_channel_bb()
684 rtw_write32_mask(rtwdev, REG_ADC40, BIT(31), 0x1); in rtw8822b_set_channel_bb()
687 val32 = rtw_read32_mask(rtwdev, REG_ADCCLK, MASKDWORD); in rtw8822b_set_channel_bb()
690 rtw_write32_mask(rtwdev, REG_ADCCLK, MASKDWORD, val32); in rtw8822b_set_channel_bb()
692 rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 0x0); in rtw8822b_set_channel_bb()
693 rtw_write32_mask(rtwdev, REG_ADC40, BIT(31), 0x1); in rtw8822b_set_channel_bb()
698 static void rtw8822b_set_channel(struct rtw_dev *rtwdev, u8 channel, u8 bw, in rtw8822b_set_channel() argument
701 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8822b_set_channel()
710 rtw8822b_set_channel_bb(rtwdev, channel, bw, primary_chan_idx); in rtw8822b_set_channel()
711 rtw_set_channel_mac(rtwdev, channel, bw, primary_chan_idx); in rtw8822b_set_channel()
712 rtw8822b_set_channel_rf(rtwdev, channel, bw); in rtw8822b_set_channel()
713 rtw8822b_set_channel_rxdfir(rtwdev, bw); in rtw8822b_set_channel()
714 rtw8822b_toggle_igi(rtwdev); in rtw8822b_set_channel()
715 rtw8822b_set_channel_cca(rtwdev, channel, bw, rfe_info); in rtw8822b_set_channel()
716 (*rfe_info->rtw_set_channel_rfe)(rtwdev, channel); in rtw8822b_set_channel()
719 static void rtw8822b_config_trx_mode(struct rtw_dev *rtwdev, u8 tx_path, in rtw8822b_config_trx_mode() argument
722 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8822b_config_trx_mode()
724 u8 ch = rtwdev->hal.current_channel; in rtw8822b_config_trx_mode()
735 rtw_write32_mask(rtwdev, REG_AGCTR_A, MASKLWORD, 0x3231); in rtw8822b_config_trx_mode()
737 rtw_write32_mask(rtwdev, REG_AGCTR_A, MASKLWORD, 0x1111); in rtw8822b_config_trx_mode()
740 rtw_write32_mask(rtwdev, REG_AGCTR_B, MASKLWORD, 0x3231); in rtw8822b_config_trx_mode()
742 rtw_write32_mask(rtwdev, REG_AGCTR_B, MASKLWORD, 0x1111); in rtw8822b_config_trx_mode()
744 rtw_write32_mask(rtwdev, REG_CDDTXP, (BIT(19) | BIT(18)), 0x3); in rtw8822b_config_trx_mode()
745 rtw_write32_mask(rtwdev, REG_TXPSEL, (BIT(29) | BIT(28)), 0x1); in rtw8822b_config_trx_mode()
746 rtw_write32_mask(rtwdev, REG_TXPSEL, BIT(30), 0x1); in rtw8822b_config_trx_mode()
749 rtw_write32_mask(rtwdev, REG_CDDTXP, 0xfff00000, 0x001); in rtw8822b_config_trx_mode()
750 rtw_write32_mask(rtwdev, REG_ADCINI, 0xf0000000, 0x8); in rtw8822b_config_trx_mode()
752 rtw_write32_mask(rtwdev, REG_CDDTXP, 0xfff00000, 0x002); in rtw8822b_config_trx_mode()
753 rtw_write32_mask(rtwdev, REG_ADCINI, 0xf0000000, 0x4); in rtw8822b_config_trx_mode()
757 rtw_write32_mask(rtwdev, REG_TXPSEL1, 0xfff0, 0x01); in rtw8822b_config_trx_mode()
759 rtw_write32_mask(rtwdev, REG_TXPSEL1, 0xfff0, 0x43); in rtw8822b_config_trx_mode()
762 rtw_write32_mask(rtwdev, REG_TXPSEL, MASKBYTE0, tx_path_sel); in rtw8822b_config_trx_mode()
765 if (is_tx2_path || rtwdev->mp_mode) { in rtw8822b_config_trx_mode()
766 rtw_write32_mask(rtwdev, REG_CDDTXP, 0xfff00000, 0x043); in rtw8822b_config_trx_mode()
767 rtw_write32_mask(rtwdev, REG_ADCINI, 0xf0000000, 0xc); in rtw8822b_config_trx_mode()
771 rtw_write32_mask(rtwdev, REG_RXDESC, BIT(22), 0x0); in rtw8822b_config_trx_mode()
772 rtw_write32_mask(rtwdev, REG_RXDESC, BIT(18), 0x0); in rtw8822b_config_trx_mode()
775 rtw_write32_mask(rtwdev, REG_ADCINI, 0x0f000000, 0x0); in rtw8822b_config_trx_mode()
777 rtw_write32_mask(rtwdev, REG_ADCINI, 0x0f000000, 0x5); in rtw8822b_config_trx_mode()
780 rtw_write32_mask(rtwdev, REG_RXPSEL, MASKBYTE0, rx_path_sel); in rtw8822b_config_trx_mode()
783 rtw_write32_mask(rtwdev, REG_ANTWT, BIT(16), 0x0); in rtw8822b_config_trx_mode()
784 rtw_write32_mask(rtwdev, REG_HTSTFWT, BIT(28), 0x0); in rtw8822b_config_trx_mode()
785 rtw_write32_mask(rtwdev, REG_MRC, BIT(23), 0x0); in rtw8822b_config_trx_mode()
787 rtw_write32_mask(rtwdev, REG_ANTWT, BIT(16), 0x1); in rtw8822b_config_trx_mode()
788 rtw_write32_mask(rtwdev, REG_HTSTFWT, BIT(28), 0x1); in rtw8822b_config_trx_mode()
789 rtw_write32_mask(rtwdev, REG_MRC, BIT(23), 0x1); in rtw8822b_config_trx_mode()
795 rtw_write_rf(rtwdev, RF_PATH_A, RF_LUTWE, RFREG_MASK, 0x80000); in rtw8822b_config_trx_mode()
796 rtw_write_rf(rtwdev, RF_PATH_A, RF_LUTWA, RFREG_MASK, 0x00001); in rtw8822b_config_trx_mode()
799 rf_reg33 = rtw_read_rf(rtwdev, RF_PATH_A, 0x33, RFREG_MASK); in rtw8822b_config_trx_mode()
808 rtw_write_rf(rtwdev, RF_PATH_A, RF_LUTWE, RFREG_MASK, 0x80000); in rtw8822b_config_trx_mode()
809 rtw_write_rf(rtwdev, RF_PATH_A, RF_LUTWA, RFREG_MASK, 0x00001); in rtw8822b_config_trx_mode()
810 rtw_write_rf(rtwdev, RF_PATH_A, RF_LUTWD1, RFREG_MASK, 0x00034); in rtw8822b_config_trx_mode()
811 rtw_write_rf(rtwdev, RF_PATH_A, RF_LUTWD0, RFREG_MASK, 0x4080c); in rtw8822b_config_trx_mode()
812 rtw_write_rf(rtwdev, RF_PATH_A, RF_LUTWE, RFREG_MASK, 0x00000); in rtw8822b_config_trx_mode()
813 rtw_write_rf(rtwdev, RF_PATH_A, RF_LUTWE, RFREG_MASK, 0x00000); in rtw8822b_config_trx_mode()
815 rtw8822b_toggle_igi(rtwdev); in rtw8822b_config_trx_mode()
816 rtw8822b_set_channel_cca(rtwdev, 1, RTW_CHANNEL_WIDTH_20, rfe_info); in rtw8822b_config_trx_mode()
817 (*rfe_info->rtw_set_channel_rfe)(rtwdev, ch); in rtw8822b_config_trx_mode()
820 static void query_phy_status_page0(struct rtw_dev *rtwdev, u8 *phy_status, in query_phy_status_page0() argument
823 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in query_phy_status_page0()
836 static void query_phy_status_page1(struct rtw_dev *rtwdev, u8 *phy_status, in query_phy_status_page1() argument
839 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in query_phy_status_page1()
880 for (path = 0; path <= rtwdev->hal.rf_path_num; path++) { in query_phy_status_page1()
898 static void query_phy_status(struct rtw_dev *rtwdev, u8 *phy_status, in query_phy_status() argument
907 query_phy_status_page0(rtwdev, phy_status, pkt_stat); in query_phy_status()
910 query_phy_status_page1(rtwdev, phy_status, pkt_stat); in query_phy_status()
913 rtw_warn(rtwdev, "unused phy status page (%d)\n", page); in query_phy_status()
918 static void rtw8822b_query_rx_desc(struct rtw_dev *rtwdev, u8 *rx_desc, in rtw8822b_query_rx_desc() argument
923 u32 desc_sz = rtwdev->chip->rx_pkt_desc_sz; in rtw8822b_query_rx_desc()
953 query_phy_status(rtwdev, phy_status, pkt_stat); in rtw8822b_query_rx_desc()
956 rtw_rx_fill_rx_status(rtwdev, pkt_stat, hdr, rx_status, phy_status); in rtw8822b_query_rx_desc()
960 rtw8822b_set_tx_power_index_by_rate(struct rtw_dev *rtwdev, u8 path, u8 rs) in rtw8822b_set_tx_power_index_by_rate() argument
962 struct rtw_hal *hal = &rtwdev->hal; in rtw8822b_set_tx_power_index_by_rate()
975 rtw_write32(rtwdev, offset_txagc[path] + rate_idx, in rtw8822b_set_tx_power_index_by_rate()
982 static void rtw8822b_set_tx_power_index(struct rtw_dev *rtwdev) in rtw8822b_set_tx_power_index() argument
984 struct rtw_hal *hal = &rtwdev->hal; in rtw8822b_set_tx_power_index()
989 rtw8822b_set_tx_power_index_by_rate(rtwdev, path, rs); in rtw8822b_set_tx_power_index()
1005 static int rtw8822b_set_antenna(struct rtw_dev *rtwdev, in rtw8822b_set_antenna() argument
1009 struct rtw_hal *hal = &rtwdev->hal; in rtw8822b_set_antenna()
1011 rtw_dbg(rtwdev, RTW_DBG_PHY, "config RF path, tx=0x%x rx=0x%x\n", in rtw8822b_set_antenna()
1015 rtw_warn(rtwdev, "unsupported tx path 0x%x\n", antenna_tx); in rtw8822b_set_antenna()
1020 rtw_warn(rtwdev, "unsupported rx path 0x%x\n", antenna_rx); in rtw8822b_set_antenna()
1027 rtw8822b_config_trx_mode(rtwdev, antenna_tx, antenna_rx, false); in rtw8822b_set_antenna()
1032 static void rtw8822b_cfg_ldo25(struct rtw_dev *rtwdev, bool enable) in rtw8822b_cfg_ldo25() argument
1036 ldo_pwr = rtw_read8(rtwdev, REG_LDO_EFUSE_CTRL + 3); in rtw8822b_cfg_ldo25()
1038 rtw_write8(rtwdev, REG_LDO_EFUSE_CTRL + 3, ldo_pwr); in rtw8822b_cfg_ldo25()
1041 static void rtw8822b_false_alarm_statistics(struct rtw_dev *rtwdev) in rtw8822b_false_alarm_statistics() argument
1043 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in rtw8822b_false_alarm_statistics()
1050 cck_enable = rtw_read32(rtwdev, 0x808) & BIT(28); in rtw8822b_false_alarm_statistics()
1051 cck_fa_cnt = rtw_read16(rtwdev, 0xa5c); in rtw8822b_false_alarm_statistics()
1052 ofdm_fa_cnt = rtw_read16(rtwdev, 0xf48); in rtw8822b_false_alarm_statistics()
1059 crc32_cnt = rtw_read32(rtwdev, 0xf04); in rtw8822b_false_alarm_statistics()
1062 crc32_cnt = rtw_read32(rtwdev, 0xf14); in rtw8822b_false_alarm_statistics()
1065 crc32_cnt = rtw_read32(rtwdev, 0xf10); in rtw8822b_false_alarm_statistics()
1068 crc32_cnt = rtw_read32(rtwdev, 0xf0c); in rtw8822b_false_alarm_statistics()
1072 cca32_cnt = rtw_read32(rtwdev, 0xf08); in rtw8822b_false_alarm_statistics()
1076 cca32_cnt = rtw_read32(rtwdev, 0xfcc); in rtw8822b_false_alarm_statistics()
1081 rtw_write32_set(rtwdev, 0x9a4, BIT(17)); in rtw8822b_false_alarm_statistics()
1082 rtw_write32_clr(rtwdev, 0x9a4, BIT(17)); in rtw8822b_false_alarm_statistics()
1083 rtw_write32_clr(rtwdev, 0xa2c, BIT(15)); in rtw8822b_false_alarm_statistics()
1084 rtw_write32_set(rtwdev, 0xa2c, BIT(15)); in rtw8822b_false_alarm_statistics()
1085 rtw_write32_set(rtwdev, 0xb58, BIT(0)); in rtw8822b_false_alarm_statistics()
1086 rtw_write32_clr(rtwdev, 0xb58, BIT(0)); in rtw8822b_false_alarm_statistics()
1089 static void rtw8822b_do_iqk(struct rtw_dev *rtwdev) in rtw8822b_do_iqk() argument
1097 rtw_fw_do_iqk(rtwdev, ¶); in rtw8822b_do_iqk()
1100 rf_reg = rtw_read_rf(rtwdev, RF_PATH_A, RF_DTXLOK, RFREG_MASK); in rtw8822b_do_iqk()
1105 rtw_write_rf(rtwdev, RF_PATH_A, RF_DTXLOK, RFREG_MASK, 0x0); in rtw8822b_do_iqk()
1107 reload = !!rtw_read32_mask(rtwdev, REG_IQKFAILMSK, BIT(16)); in rtw8822b_do_iqk()
1108 iqk_fail_mask = rtw_read32_mask(rtwdev, REG_IQKFAILMSK, GENMASK(7, 0)); in rtw8822b_do_iqk()
1109 rtw_dbg(rtwdev, RTW_DBG_PHY, in rtw8822b_do_iqk()
1114 static void rtw8822b_phy_calibration(struct rtw_dev *rtwdev) in rtw8822b_phy_calibration() argument
1116 rtw8822b_do_iqk(rtwdev); in rtw8822b_phy_calibration()
1119 static void rtw8822b_coex_cfg_init(struct rtw_dev *rtwdev) in rtw8822b_coex_cfg_init() argument
1122 rtw_write8_set(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION); in rtw8822b_coex_cfg_init()
1126 rtw_write8_mask(rtwdev, REG_BT_TDMA_TIME, BIT_MASK_SAMPLE_RATE, 0x5); in rtw8822b_coex_cfg_init()
1129 rtw_write8(rtwdev, REG_BT_STAT_CTRL, 0x1); in rtw8822b_coex_cfg_init()
1132 rtw_write32_set(rtwdev, REG_GPIO_MUXCFG, BIT_BT_PTA_EN); in rtw8822b_coex_cfg_init()
1133 rtw_write32_set(rtwdev, REG_GPIO_MUXCFG, BIT_PO_BT_PTA_PINS); in rtw8822b_coex_cfg_init()
1136 rtw_write8_set(rtwdev, REG_QUEUE_CTRL, BIT_PTA_WL_TX_EN); in rtw8822b_coex_cfg_init()
1138 rtw_write8_clr(rtwdev, REG_QUEUE_CTRL, BIT_PTA_EDCCA_EN); in rtw8822b_coex_cfg_init()
1140 rtw_write16_set(rtwdev, REG_BT_COEX_V2, BIT_GNT_BT_POLARITY); in rtw8822b_coex_cfg_init()
1143 static void rtw8822b_coex_cfg_ant_switch(struct rtw_dev *rtwdev, in rtw8822b_coex_cfg_ant_switch() argument
1146 struct rtw_coex *coex = &rtwdev->coex; in rtw8822b_coex_cfg_ant_switch()
1167 rtw_write8_mask(rtwdev, REG_LED_CFG + 2, BIT_DPDT_SEL_EN >> 16, 0x0); in rtw8822b_coex_cfg_ant_switch()
1169 rtw_write8_mask(rtwdev, REG_LED_CFG + 3, BIT_DPDT_WL_SEL >> 24, 0x1); in rtw8822b_coex_cfg_ant_switch()
1171 rtw_write8_mask(rtwdev, REG_RFE_CTRL8, BIT_MASK_RFE_SEL89, 0x77); in rtw8822b_coex_cfg_ant_switch()
1185 rtw_write8_mask(rtwdev, REG_RFE_INV8, BIT_MASK_RFE_INV89, regval); in rtw8822b_coex_cfg_ant_switch()
1189 rtw_write8_mask(rtwdev, REG_LED_CFG + 2, BIT_DPDT_SEL_EN >> 16, 0x0); in rtw8822b_coex_cfg_ant_switch()
1191 rtw_write8_mask(rtwdev, REG_LED_CFG + 3, BIT_DPDT_WL_SEL >> 24, 0x1); in rtw8822b_coex_cfg_ant_switch()
1193 rtw_write8_mask(rtwdev, REG_RFE_CTRL8, BIT_MASK_RFE_SEL89, 0x66); in rtw8822b_coex_cfg_ant_switch()
1196 rtw_write8_mask(rtwdev, REG_RFE_INV8, BIT_MASK_RFE_INV89, regval); in rtw8822b_coex_cfg_ant_switch()
1200 rtw_write8_mask(rtwdev, REG_LED_CFG + 2, BIT_DPDT_SEL_EN >> 16, 0x0); in rtw8822b_coex_cfg_ant_switch()
1202 rtw_write8_mask(rtwdev, REG_LED_CFG + 3, BIT_DPDT_WL_SEL >> 24, 0x1); in rtw8822b_coex_cfg_ant_switch()
1203 rtw_write8_mask(rtwdev, REG_RFE_CTRL8, BIT_MASK_RFE_SEL89, 0x88); in rtw8822b_coex_cfg_ant_switch()
1207 rtw_write8_mask(rtwdev, REG_LED_CFG + 2, BIT_DPDT_SEL_EN >> 16, 0x1); in rtw8822b_coex_cfg_ant_switch()
1210 rtw_write8_mask(rtwdev, REG_PAD_CTRL1, BIT_SW_DPDT_SEL_DATA, regval); in rtw8822b_coex_cfg_ant_switch()
1214 rtw_write8_mask(rtwdev, REG_LED_CFG + 2, BIT_DPDT_SEL_EN >> 16, 0x0); in rtw8822b_coex_cfg_ant_switch()
1216 rtw_write8_mask(rtwdev, REG_LED_CFG + 3, BIT_DPDT_WL_SEL >> 24, 0x1); in rtw8822b_coex_cfg_ant_switch()
1220 rtw_write8_mask(rtwdev, REG_LED_CFG + 2, BIT_DPDT_SEL_EN >> 16, 0x0); in rtw8822b_coex_cfg_ant_switch()
1222 rtw_write8_mask(rtwdev, REG_LED_CFG + 3, BIT_DPDT_WL_SEL >> 24, 0x0); in rtw8822b_coex_cfg_ant_switch()
1227 static void rtw8822b_coex_cfg_gnt_fix(struct rtw_dev *rtwdev) in rtw8822b_coex_cfg_gnt_fix() argument
1231 static void rtw8822b_coex_cfg_gnt_debug(struct rtw_dev *rtwdev) in rtw8822b_coex_cfg_gnt_debug() argument
1233 rtw_write8_mask(rtwdev, REG_PAD_CTRL1 + 2, BIT_BTGP_SPI_EN >> 16, 0); in rtw8822b_coex_cfg_gnt_debug()
1234 rtw_write8_mask(rtwdev, REG_PAD_CTRL1 + 3, BIT_BTGP_JTAG_EN >> 24, 0); in rtw8822b_coex_cfg_gnt_debug()
1235 rtw_write8_mask(rtwdev, REG_GPIO_MUXCFG + 2, BIT_FSPI_EN >> 16, 0); in rtw8822b_coex_cfg_gnt_debug()
1236 rtw_write8_mask(rtwdev, REG_PAD_CTRL1 + 1, BIT_LED1DIS >> 8, 0); in rtw8822b_coex_cfg_gnt_debug()
1237 rtw_write8_mask(rtwdev, REG_SYS_SDIO_CTRL + 3, BIT_DBG_GNT_WL_BT >> 24, 0); in rtw8822b_coex_cfg_gnt_debug()
1240 static void rtw8822b_coex_cfg_rfe_type(struct rtw_dev *rtwdev) in rtw8822b_coex_cfg_rfe_type() argument
1242 struct rtw_coex *coex = &rtwdev->coex; in rtw8822b_coex_cfg_rfe_type()
1244 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8822b_coex_cfg_rfe_type()
1247 coex_rfe->rfe_module_type = rtwdev->efuse.rfe_option; in rtw8822b_coex_cfg_rfe_type()
1259 rtw_coex_write_scbd(rtwdev, COEX_SCBD_EXTFEM, true); in rtw8822b_coex_cfg_rfe_type()
1262 rtw_coex_write_scbd(rtwdev, COEX_SCBD_EXTFEM, false); in rtw8822b_coex_cfg_rfe_type()
1274 rtw_write8(rtwdev, REG_RFE_CTRL_E, 0xff); in rtw8822b_coex_cfg_rfe_type()
1275 rtw_write8_mask(rtwdev, REG_RFESEL_CTRL + 1, 0x3, 0x0); in rtw8822b_coex_cfg_rfe_type()
1276 rtw_write8_mask(rtwdev, REG_RFE_INV16, BIT_RFE_BUF_EN, 0x0); in rtw8822b_coex_cfg_rfe_type()
1279 rtw_coex_write_indirect_reg(rtwdev, LTE_COEX_CTRL, BIT_LTE_COEX_EN, 0); in rtw8822b_coex_cfg_rfe_type()
1282 rtw_coex_write_indirect_reg(rtwdev, LTE_WL_TRX_CTRL, MASKLWORD, 0xffff); in rtw8822b_coex_cfg_rfe_type()
1285 rtw_coex_write_indirect_reg(rtwdev, LTE_BT_TRX_CTRL, MASKLWORD, 0xffff); in rtw8822b_coex_cfg_rfe_type()
1288 static void rtw8822b_coex_cfg_wl_tx_power(struct rtw_dev *rtwdev, u8 wl_pwr) in rtw8822b_coex_cfg_wl_tx_power() argument
1290 struct rtw_coex *coex = &rtwdev->coex; in rtw8822b_coex_cfg_wl_tx_power()
1307 rtw_write8_mask(rtwdev, reg_addr[i], 0xff, pwr); in rtw8822b_coex_cfg_wl_tx_power()
1310 static void rtw8822b_coex_cfg_wl_rx_gain(struct rtw_dev *rtwdev, bool low_gain) in rtw8822b_coex_cfg_wl_rx_gain() argument
1312 struct rtw_coex *coex = &rtwdev->coex; in rtw8822b_coex_cfg_wl_rx_gain()
1347 rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], Hi-Li Table On!\n"); in rtw8822b_coex_cfg_wl_rx_gain()
1349 rtw_write32(rtwdev, REG_RX_GAIN_EN, wl_rx_low_gain_on[i]); in rtw8822b_coex_cfg_wl_rx_gain()
1352 rtw_write_rf(rtwdev, RF_PATH_A, RF_RCKD, 0x2, 0x1); in rtw8822b_coex_cfg_wl_rx_gain()
1353 rtw_write_rf(rtwdev, RF_PATH_A, RF_RCK, 0x3f, 0x3f); in rtw8822b_coex_cfg_wl_rx_gain()
1354 rtw_write_rf(rtwdev, RF_PATH_B, RF_RCKD, 0x2, 0x1); in rtw8822b_coex_cfg_wl_rx_gain()
1355 rtw_write_rf(rtwdev, RF_PATH_B, RF_RCK, 0x3f, 0x3f); in rtw8822b_coex_cfg_wl_rx_gain()
1357 rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], Hi-Li Table Off!\n"); in rtw8822b_coex_cfg_wl_rx_gain()
1359 rtw_write32(rtwdev, 0x81c, wl_rx_low_gain_off[i]); in rtw8822b_coex_cfg_wl_rx_gain()
1362 rtw_write_rf(rtwdev, RF_PATH_A, RF_RCK, 0x3f, 0x4); in rtw8822b_coex_cfg_wl_rx_gain()
1363 rtw_write_rf(rtwdev, RF_PATH_A, RF_RCKD, 0x2, 0x0); in rtw8822b_coex_cfg_wl_rx_gain()
1364 rtw_write_rf(rtwdev, RF_PATH_B, RF_RCK, 0x3f, 0x4); in rtw8822b_coex_cfg_wl_rx_gain()
1365 rtw_write_rf(rtwdev, RF_PATH_B, RF_RCKD, 0x2, 0x0); in rtw8822b_coex_cfg_wl_rx_gain()
1369 static void rtw8822b_txagc_swing_offset(struct rtw_dev *rtwdev, u8 path, in rtw8822b_txagc_swing_offset() argument
1373 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in rtw8822b_txagc_swing_offset()
1405 rtw_warn(rtwdev, "swing index overflow\n"); in rtw8822b_txagc_swing_offset()
1412 static void rtw8822b_pwrtrack_set_pwr(struct rtw_dev *rtwdev, u8 path, in rtw8822b_pwrtrack_set_pwr() argument
1429 rtw8822b_txagc_swing_offset(rtwdev, path, pwr_idx_offset, in rtw8822b_pwrtrack_set_pwr()
1431 rtw_write32_mask(rtwdev, reg1, GENMASK(29, 25), txagc_idx); in rtw8822b_pwrtrack_set_pwr()
1432 rtw_write32_mask(rtwdev, reg2, GENMASK(31, 21), in rtw8822b_pwrtrack_set_pwr()
1436 static void rtw8822b_pwrtrack_set(struct rtw_dev *rtwdev, u8 path) in rtw8822b_pwrtrack_set() argument
1438 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in rtw8822b_pwrtrack_set()
1440 u8 channel = rtwdev->hal.current_channel; in rtw8822b_pwrtrack_set()
1441 u8 band_width = rtwdev->hal.current_band_width; in rtw8822b_pwrtrack_set()
1442 u8 regd = rtw_regd_get(rtwdev); in rtw8822b_pwrtrack_set()
1444 u8 max_pwr_idx = rtwdev->chip->max_power_index; in rtw8822b_pwrtrack_set()
1446 tx_pwr_idx = rtw_phy_get_tx_power_index(rtwdev, path, tx_rate, in rtw8822b_pwrtrack_set()
1453 rtw8822b_pwrtrack_set_pwr(rtwdev, path, pwr_idx_offset); in rtw8822b_pwrtrack_set()
1456 static void rtw8822b_phy_pwrtrack_path(struct rtw_dev *rtwdev, in rtw8822b_phy_pwrtrack_path() argument
1460 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in rtw8822b_phy_pwrtrack_path()
1465 delta = rtw_phy_pwrtrack_get_delta(rtwdev, RF_PATH_A); in rtw8822b_phy_pwrtrack_path()
1468 power_idx_cur = rtw_phy_pwrtrack_get_pwridx(rtwdev, swing_table, in rtw8822b_phy_pwrtrack_path()
1476 rtw8822b_pwrtrack_set(rtwdev, path); in rtw8822b_phy_pwrtrack_path()
1479 static void rtw8822b_phy_pwrtrack(struct rtw_dev *rtwdev) in rtw8822b_phy_pwrtrack() argument
1481 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in rtw8822b_phy_pwrtrack()
1485 rtw_phy_config_swing_table(rtwdev, &swing_table); in rtw8822b_phy_pwrtrack()
1487 if (rtwdev->efuse.thermal_meter[RF_PATH_A] == 0xff) in rtw8822b_phy_pwrtrack()
1490 thermal_value = rtw_read_rf(rtwdev, RF_PATH_A, RF_T_METER, 0xfc00); in rtw8822b_phy_pwrtrack()
1492 rtw_phy_pwrtrack_avg(rtwdev, thermal_value, RF_PATH_A); in rtw8822b_phy_pwrtrack()
1496 else if (!rtw_phy_pwrtrack_thermal_changed(rtwdev, thermal_value, in rtw8822b_phy_pwrtrack()
1500 for (path = 0; path < rtwdev->hal.rf_path_num; path++) in rtw8822b_phy_pwrtrack()
1501 rtw8822b_phy_pwrtrack_path(rtwdev, &swing_table, path); in rtw8822b_phy_pwrtrack()
1504 if (rtw_phy_pwrtrack_need_iqk(rtwdev)) in rtw8822b_phy_pwrtrack()
1505 rtw8822b_do_iqk(rtwdev); in rtw8822b_phy_pwrtrack()
1508 static void rtw8822b_pwr_track(struct rtw_dev *rtwdev) in rtw8822b_pwr_track() argument
1510 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8822b_pwr_track()
1511 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in rtw8822b_pwr_track()
1517 rtw_write_rf(rtwdev, RF_PATH_A, RF_T_METER, in rtw8822b_pwr_track()
1523 rtw8822b_phy_pwrtrack(rtwdev); in rtw8822b_pwr_track()
1527 static void rtw8822b_bf_config_bfee_su(struct rtw_dev *rtwdev, in rtw8822b_bf_config_bfee_su() argument
1532 rtw_bf_enable_bfee_su(rtwdev, vif, bfee); in rtw8822b_bf_config_bfee_su()
1534 rtw_bf_remove_bfee_su(rtwdev, bfee); in rtw8822b_bf_config_bfee_su()
1537 static void rtw8822b_bf_config_bfee_mu(struct rtw_dev *rtwdev, in rtw8822b_bf_config_bfee_mu() argument
1542 rtw_bf_enable_bfee_mu(rtwdev, vif, bfee); in rtw8822b_bf_config_bfee_mu()
1544 rtw_bf_remove_bfee_mu(rtwdev, bfee); in rtw8822b_bf_config_bfee_mu()
1547 static void rtw8822b_bf_config_bfee(struct rtw_dev *rtwdev, struct rtw_vif *vif, in rtw8822b_bf_config_bfee() argument
1551 rtw8822b_bf_config_bfee_su(rtwdev, vif, bfee, enable); in rtw8822b_bf_config_bfee()
1553 rtw8822b_bf_config_bfee_mu(rtwdev, vif, bfee, enable); in rtw8822b_bf_config_bfee()
1555 rtw_warn(rtwdev, "wrong bfee role\n"); in rtw8822b_bf_config_bfee()
1558 static void rtw8822b_adaptivity_init(struct rtw_dev *rtwdev) in rtw8822b_adaptivity_init() argument
1560 rtw_phy_set_edcca_th(rtwdev, RTW8822B_EDCCA_MAX, RTW8822B_EDCCA_MAX); in rtw8822b_adaptivity_init()
1563 rtw_write32_clr(rtwdev, REG_TX_PTCL_CTRL, BIT_DIS_EDCCA); in rtw8822b_adaptivity_init()
1564 rtw_write32_set(rtwdev, REG_RD_CTRL, BIT_EDCCA_MSK_CNTDOWN_EN); in rtw8822b_adaptivity_init()
1565 rtw_write32_mask(rtwdev, REG_EDCCA_SOURCE, BIT_SOURCE_OPTION, in rtw8822b_adaptivity_init()
1567 rtw_write32_mask(rtwdev, REG_EDCCA_POW_MA, BIT_MA_LEVEL, 0); in rtw8822b_adaptivity_init()
1570 rtw_write32_set(rtwdev, REG_EDCCA_DECISION, BIT_EDCCA_OPTION); in rtw8822b_adaptivity_init()
1573 static void rtw8822b_adaptivity(struct rtw_dev *rtwdev) in rtw8822b_adaptivity() argument
1575 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in rtw8822b_adaptivity()
1588 rtw_phy_set_edcca_th(rtwdev, l2h, h2l); in rtw8822b_adaptivity()