Lines Matching +full:txpower +full:-
1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2009-2014 Realtek Corporation.*/
41 spin_lock(&rtlpriv->locks.rf_lock); in rtl8723be_phy_query_rf_reg()
47 spin_unlock(&rtlpriv->locks.rf_lock); in rtl8723be_phy_query_rf_reg()
66 spin_lock(&rtlpriv->locks.rf_lock); in rtl8723be_phy_set_rf_reg()
78 spin_unlock(&rtlpriv->locks.rf_lock); in rtl8723be_phy_set_rf_reg()
102 u8 crystalcap = rtlpriv->efuse.crystalcap; in rtl8723be_phy_bb_config()
138 u32 cut_ver = ((rtlhal->version & CHIP_VER_RTL_MASK) in _rtl8723be_check_positive()
140 u32 intf = (rtlhal->interface == INTF_USB ? BIT(1) : BIT(0)); in _rtl8723be_check_positive()
142 u8 board_type = ((rtlhal->board_type & BIT(4)) >> 4) << 0 | /* _GLNA */ in _rtl8723be_check_positive()
143 ((rtlhal->board_type & BIT(3)) >> 3) << 1 | /* _GPA */ in _rtl8723be_check_positive()
144 ((rtlhal->board_type & BIT(7)) >> 7) << 2 | /* _ALNA */ in _rtl8723be_check_positive()
145 ((rtlhal->board_type & BIT(6)) >> 6) << 3 | /* _APA */ in _rtl8723be_check_positive()
146 ((rtlhal->board_type & BIT(2)) >> 2) << 4; /* _BT */ in _rtl8723be_check_positive()
152 rtlhal->package_type << 12 | in _rtl8723be_check_positive()
156 u32 driver2 = rtlhal->type_glna << 0 | in _rtl8723be_check_positive()
157 rtlhal->type_gpa << 8 | in _rtl8723be_check_positive()
158 rtlhal->type_alna << 16 | in _rtl8723be_check_positive()
159 rtlhal->type_apa << 24; in _rtl8723be_check_positive()
172 rtlhal->board_type, rtlhal->package_type); in _rtl8723be_check_positive()
242 struct rtl_phy *rtlphy = &rtlpriv->phy; in _rtl8723be_phy_init_tx_power_by_rate()
252 rtlphy->tx_power_by_rate_offset in _rtl8723be_phy_init_tx_power_by_rate()
283 struct rtl_phy *rtlphy = &rtlpriv->phy; in _rtl8723be_phy_set_txpower_by_rate_base()
295 rtlphy->txpwr_by_rate_base_24g[path][txnum][0] = value; in _rtl8723be_phy_set_txpower_by_rate_base()
298 rtlphy->txpwr_by_rate_base_24g[path][txnum][1] = value; in _rtl8723be_phy_set_txpower_by_rate_base()
301 rtlphy->txpwr_by_rate_base_24g[path][txnum][2] = value; in _rtl8723be_phy_set_txpower_by_rate_base()
304 rtlphy->txpwr_by_rate_base_24g[path][txnum][3] = value; in _rtl8723be_phy_set_txpower_by_rate_base()
325 struct rtl_phy *rtlphy = &rtlpriv->phy; in _rtl8723be_phy_get_txpower_by_rate_base()
337 value = rtlphy->txpwr_by_rate_base_24g[path][txnum][0]; in _rtl8723be_phy_get_txpower_by_rate_base()
340 value = rtlphy->txpwr_by_rate_base_24g[path][txnum][1]; in _rtl8723be_phy_get_txpower_by_rate_base()
343 value = rtlphy->txpwr_by_rate_base_24g[path][txnum][2]; in _rtl8723be_phy_get_txpower_by_rate_base()
346 value = rtlphy->txpwr_by_rate_base_24g[path][txnum][3]; in _rtl8723be_phy_get_txpower_by_rate_base()
366 struct rtl_phy *rtlphy = &rtlpriv->phy; in _rtl8723be_phy_store_txpower_by_rate_base()
372 rawvalue = (u16)(rtlphy->tx_power_by_rate_offset in _rtl8723be_phy_store_txpower_by_rate_base()
378 rawvalue = (u16)(rtlphy->tx_power_by_rate_offset in _rtl8723be_phy_store_txpower_by_rate_base()
386 rawvalue = (u16)(rtlphy->tx_power_by_rate_offset in _rtl8723be_phy_store_txpower_by_rate_base()
393 rawvalue = (u16)(rtlphy->tx_power_by_rate_offset in _rtl8723be_phy_store_txpower_by_rate_base()
400 rawvalue = (u16)(rtlphy->tx_power_by_rate_offset in _rtl8723be_phy_store_txpower_by_rate_base()
416 for (i = 3; i >= 0; --i) { in _phy_convert_txpower_dbm_to_relative_value()
424 temp_value - base_val : in _phy_convert_txpower_dbm_to_relative_value()
425 base_val - temp_value; in _phy_convert_txpower_dbm_to_relative_value()
439 struct rtl_phy *rtlphy = &rtlpriv->phy; in _rtl8723be_phy_convert_txpower_dbm_to_relative_value()
445 &rtlphy->tx_power_by_rate_offset[BAND_ON_2_4G][rfpath][RF_1TX][2], in _rtl8723be_phy_convert_txpower_dbm_to_relative_value()
448 &rtlphy->tx_power_by_rate_offset[BAND_ON_2_4G][rfpath][RF_1TX][3], in _rtl8723be_phy_convert_txpower_dbm_to_relative_value()
454 &rtlphy->tx_power_by_rate_offset[BAND_ON_2_4G][rfpath][RF_1TX][0], in _rtl8723be_phy_convert_txpower_dbm_to_relative_value()
457 &rtlphy->tx_power_by_rate_offset[BAND_ON_2_4G][rfpath][RF_1TX][1], in _rtl8723be_phy_convert_txpower_dbm_to_relative_value()
463 &rtlphy->tx_power_by_rate_offset[BAND_ON_2_4G][rfpath][RF_1TX][4], in _rtl8723be_phy_convert_txpower_dbm_to_relative_value()
466 &rtlphy->tx_power_by_rate_offset[BAND_ON_2_4G][rfpath][RF_1TX][5], in _rtl8723be_phy_convert_txpower_dbm_to_relative_value()
473 &rtlphy->tx_power_by_rate_offset[BAND_ON_2_4G][rfpath][RF_2TX][6], in _rtl8723be_phy_convert_txpower_dbm_to_relative_value()
477 &rtlphy->tx_power_by_rate_offset[BAND_ON_2_4G][rfpath][RF_2TX][7], in _rtl8723be_phy_convert_txpower_dbm_to_relative_value()
493 struct rtl_phy *rtlphy = &rtlpriv->phy; in _rtl8723be_phy_bb8723b_config_parafile()
498 if (rtlpriv->rtlhal.interface == INTF_USB) { in _rtl8723be_phy_bb8723b_config_parafile()
501 if (rtlpriv->btcoexist.btc_info.single_ant_path == 0) in _rtl8723be_phy_bb8723b_config_parafile()
514 if (!rtlefuse->autoload_failflag) { in _rtl8723be_phy_bb8723b_config_parafile()
515 rtlphy->pwrgroup_cnt = 0; in _rtl8723be_phy_bb8723b_config_parafile()
530 rtlphy->cck_high_power = (bool)(rtl_get_bbreg(hw, in _rtl8723be_phy_bb8723b_config_parafile()
669 index = (u8)((regaddr - 0xC20) / 4); in _rtl8723be_get_rate_section_index()
671 index = (u8)((regaddr - 0xE20) / 4); in _rtl8723be_get_rate_section_index()
683 struct rtl_phy *rtlphy = &rtlpriv->phy; in _rtl8723be_store_tx_power_by_rate()
690 if (rfpath > MAX_RF_PATH - 1) { in _rtl8723be_store_tx_power_by_rate()
695 if (txnum > MAX_RF_PATH - 1) { in _rtl8723be_store_tx_power_by_rate()
700 rtlphy->tx_power_by_rate_offset[band][rfpath][txnum][rate_section] = in _rtl8723be_store_tx_power_by_rate()
758 if (rtlhal->oem_id == RT_CID_819X_HP) in rtl8723be_phy_config_rf_with_headerfile()
775 struct rtl_phy *rtlphy = &rtlpriv->phy; in rtl8723be_phy_get_hw_reg_originalvalue()
777 rtlphy->default_initialgain[0] = in rtl8723be_phy_get_hw_reg_originalvalue()
779 rtlphy->default_initialgain[1] = in rtl8723be_phy_get_hw_reg_originalvalue()
781 rtlphy->default_initialgain[2] = in rtl8723be_phy_get_hw_reg_originalvalue()
783 rtlphy->default_initialgain[3] = in rtl8723be_phy_get_hw_reg_originalvalue()
788 rtlphy->default_initialgain[0], in rtl8723be_phy_get_hw_reg_originalvalue()
789 rtlphy->default_initialgain[1], in rtl8723be_phy_get_hw_reg_originalvalue()
790 rtlphy->default_initialgain[2], in rtl8723be_phy_get_hw_reg_originalvalue()
791 rtlphy->default_initialgain[3]); in rtl8723be_phy_get_hw_reg_originalvalue()
793 rtlphy->framesync = (u8)rtl_get_bbreg(hw, ROFDM0_RXDETECTOR3, in rtl8723be_phy_get_hw_reg_originalvalue()
795 rtlphy->framesync_c34 = rtl_get_bbreg(hw, ROFDM0_RXDETECTOR2, in rtl8723be_phy_get_hw_reg_originalvalue()
800 ROFDM0_RXDETECTOR3, rtlphy->framesync); in rtl8723be_phy_get_hw_reg_originalvalue()
880 struct rtl_phy *rtlphy = &rtlpriv->phy; in _rtl8723be_get_txpower_by_rate()
936 tx_pwr_diff = (u8)(rtlphy->tx_power_by_rate_offset[band][rfpath][tx_num] in _rtl8723be_get_txpower_by_rate()
947 u8 index = (channel - 1); in _rtl8723be_get_txpower_index()
948 u8 txpower = 0; in _rtl8723be_get_txpower_index() local
957 txpower = rtlefuse->txpwrlevel_cck[path][index]; in _rtl8723be_get_txpower_index()
959 txpower = rtlefuse->txpwrlevel_ht40_1s[path][index]; in _rtl8723be_get_txpower_index()
966 txpower += rtlefuse->txpwr_legacyhtdiff[0][TX_1S]; in _rtl8723be_get_txpower_index()
970 txpower += rtlefuse->txpwr_ht20diff[0][TX_1S]; in _rtl8723be_get_txpower_index()
972 txpower += rtlefuse->txpwr_ht20diff[0][TX_2S]; in _rtl8723be_get_txpower_index()
975 txpower += rtlefuse->txpwr_ht40diff[0][TX_1S]; in _rtl8723be_get_txpower_index()
977 txpower += rtlefuse->txpwr_ht40diff[0][TX_2S]; in _rtl8723be_get_txpower_index()
980 if (rtlefuse->eeprom_regulatory != 2) in _rtl8723be_get_txpower_index()
985 txpower += power_diff_byrate; in _rtl8723be_get_txpower_index()
987 if (txpower > MAX_POWER_INDEX) in _rtl8723be_get_txpower_index()
988 txpower = MAX_POWER_INDEX; in _rtl8723be_get_txpower_index()
990 return txpower; in _rtl8723be_get_txpower_index()
1126 if (!rtlefuse->txpwr_fromeprom) in rtl8723be_phy_set_txpower_level()
1132 rtl_priv(hw)->phy.current_chan_bw, in rtl8723be_phy_set_txpower_level()
1140 rtl_priv(hw)->phy.current_chan_bw, in rtl8723be_phy_set_txpower_level()
1148 rtl_priv(hw)->phy.current_chan_bw, in rtl8723be_phy_set_txpower_level()
1165 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_IO_CMD, in rtl8723be_phy_scan_operation_backup()
1171 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_IO_CMD, in rtl8723be_phy_scan_operation_backup()
1185 struct rtl_phy *rtlphy = &rtlpriv->phy; in rtl8723be_phy_set_bw_mode_callback()
1192 rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20 ? in rtl8723be_phy_set_bw_mode_callback()
1196 rtlphy->set_bwmode_inprogress = false; in rtl8723be_phy_set_bw_mode_callback()
1203 switch (rtlphy->current_chan_bw) { in rtl8723be_phy_set_bw_mode_callback()
1212 (mac->cur_40_prime_sc << 5); in rtl8723be_phy_set_bw_mode_callback()
1217 rtlphy->current_chan_bw); in rtl8723be_phy_set_bw_mode_callback()
1221 switch (rtlphy->current_chan_bw) { in rtl8723be_phy_set_bw_mode_callback()
1232 (mac->cur_40_prime_sc >> 1)); in rtl8723be_phy_set_bw_mode_callback()
1233 rtl_set_bbreg(hw, ROFDM1_LSTF, 0xC00, mac->cur_40_prime_sc); in rtl8723be_phy_set_bw_mode_callback()
1237 (mac->cur_40_prime_sc == in rtl8723be_phy_set_bw_mode_callback()
1242 rtlphy->current_chan_bw); in rtl8723be_phy_set_bw_mode_callback()
1245 rtl8723be_phy_rf6052_set_bandwidth(hw, rtlphy->current_chan_bw); in rtl8723be_phy_set_bw_mode_callback()
1246 rtlphy->set_bwmode_inprogress = false; in rtl8723be_phy_set_bw_mode_callback()
1254 struct rtl_phy *rtlphy = &rtlpriv->phy; in rtl8723be_phy_set_bw_mode()
1256 u8 tmp_bw = rtlphy->current_chan_bw; in rtl8723be_phy_set_bw_mode()
1258 if (rtlphy->set_bwmode_inprogress) in rtl8723be_phy_set_bw_mode()
1260 rtlphy->set_bwmode_inprogress = true; in rtl8723be_phy_set_bw_mode()
1266 rtlphy->set_bwmode_inprogress = false; in rtl8723be_phy_set_bw_mode()
1267 rtlphy->current_chan_bw = tmp_bw; in rtl8723be_phy_set_bw_mode()
1275 struct rtl_phy *rtlphy = &rtlpriv->phy; in rtl8723be_phy_sw_chnl_callback()
1279 "switch to channel%d\n", rtlphy->current_channel); in rtl8723be_phy_sw_chnl_callback()
1283 if (!rtlphy->sw_chnl_inprogress) in rtl8723be_phy_sw_chnl_callback()
1286 rtlphy->current_channel, in rtl8723be_phy_sw_chnl_callback()
1287 &rtlphy->sw_chnl_stage, in rtl8723be_phy_sw_chnl_callback()
1288 &rtlphy->sw_chnl_step, in rtl8723be_phy_sw_chnl_callback()
1295 rtlphy->sw_chnl_inprogress = false; in rtl8723be_phy_sw_chnl_callback()
1305 struct rtl_phy *rtlphy = &rtlpriv->phy; in rtl8723be_phy_sw_chnl()
1308 if (rtlphy->sw_chnl_inprogress) in rtl8723be_phy_sw_chnl()
1310 if (rtlphy->set_bwmode_inprogress) in rtl8723be_phy_sw_chnl()
1312 WARN_ONCE((rtlphy->current_channel > 14), in rtl8723be_phy_sw_chnl()
1314 rtlphy->sw_chnl_inprogress = true; in rtl8723be_phy_sw_chnl()
1315 rtlphy->sw_chnl_stage = 0; in rtl8723be_phy_sw_chnl()
1316 rtlphy->sw_chnl_step = 0; in rtl8723be_phy_sw_chnl()
1321 rtlphy->current_channel); in rtl8723be_phy_sw_chnl()
1322 rtlphy->sw_chnl_inprogress = false; in rtl8723be_phy_sw_chnl()
1326 rtlphy->sw_chnl_inprogress = false; in rtl8723be_phy_sw_chnl()
1336 struct rtl_phy *rtlphy = &rtlpriv->phy; in _rtl8723be_phy_sw_chnl_step_by_step()
1345 u8 num_total_rfpath = rtlphy->num_total_rfpath; in _rtl8723be_phy_sw_chnl_step_by_step()
1392 if (currentcmd->cmdid == CMDID_END) { in _rtl8723be_phy_sw_chnl_step_by_step()
1402 switch (currentcmd->cmdid) { in _rtl8723be_phy_sw_chnl_step_by_step()
1407 rtl_write_dword(rtlpriv, currentcmd->para1, in _rtl8723be_phy_sw_chnl_step_by_step()
1408 currentcmd->para2); in _rtl8723be_phy_sw_chnl_step_by_step()
1411 rtl_write_word(rtlpriv, currentcmd->para1, in _rtl8723be_phy_sw_chnl_step_by_step()
1412 (u16)currentcmd->para2); in _rtl8723be_phy_sw_chnl_step_by_step()
1415 rtl_write_byte(rtlpriv, currentcmd->para1, in _rtl8723be_phy_sw_chnl_step_by_step()
1416 (u8)currentcmd->para2); in _rtl8723be_phy_sw_chnl_step_by_step()
1420 rtlphy->rfreg_chnlval[rfpath] = in _rtl8723be_phy_sw_chnl_step_by_step()
1421 ((rtlphy->rfreg_chnlval[rfpath] & in _rtl8723be_phy_sw_chnl_step_by_step()
1422 0xfffffc00) | currentcmd->para2); in _rtl8723be_phy_sw_chnl_step_by_step()
1425 currentcmd->para1, in _rtl8723be_phy_sw_chnl_step_by_step()
1427 rtlphy->rfreg_chnlval[rfpath]); in _rtl8723be_phy_sw_chnl_step_by_step()
1433 currentcmd->cmdid); in _rtl8723be_phy_sw_chnl_step_by_step()
1440 (*delay) = currentcmd->msdelay; in _rtl8723be_phy_sw_chnl_step_by_step()
1461 /* path-A IQK setting */ in _rtl8723be_phy_path_a_iqk()
1465 /* path-A IQK setting */ in _rtl8723be_phy_path_a_iqk()
1504 tmp = 0x400 - tmp; in _rtl8723be_phy_path_a_iqk()
1542 /* path-A IQK setting */ in _rtl8723be_phy_path_a_rx_iqk()
1583 tmp = 0x400 - tmp; in _rtl8723be_phy_path_a_rx_iqk()
1613 /* path-A IQK setting */ in _rtl8723be_phy_path_a_rx_iqk()
1650 tmp = 0x400 - tmp; in _rtl8723be_phy_path_a_rx_iqk()
1683 /* path-A IQK setting */ in _rtl8723be_phy_path_b_iqk()
1724 tmp = 0x400 - tmp; in _rtl8723be_phy_path_b_iqk()
1763 /* path-B IQK setting */ in _rtl8723be_phy_path_b_rx_iqk()
1802 tmp = 0x400 - tmp; in _rtl8723be_phy_path_b_rx_iqk()
1833 /* path-B IQK setting */ in _rtl8723be_phy_path_b_rx_iqk()
1864 tmp = 0x400 - tmp; in _rtl8723be_phy_path_b_rx_iqk()
1953 diff = (tmp1 > tmp2) ? (tmp1 - tmp2) : (tmp2 - tmp1); in _rtl8723be_phy_simularity_compare()
1971 for (j = i * 4; j < (i + 1) * 4 - 2; j++) in _rtl8723be_phy_simularity_compare()
2003 struct rtl_phy *rtlphy = &rtlpriv->phy; in _rtl8723be_phy_iq_calibrate()
2033 rtlphy->adda_backup, 16); in _rtl8723be_phy_iq_calibrate()
2035 rtlphy->iqk_mac_backup); in _rtl8723be_phy_iq_calibrate()
2037 rtlphy->iqk_bb_backup, in _rtl8723be_phy_iq_calibrate()
2042 rtlphy->rfpi_enable = (u8)rtl_get_bbreg(hw, in _rtl8723be_phy_iq_calibrate()
2050 rtlphy->iqk_mac_backup); in _rtl8723be_phy_iq_calibrate()
2134 rtlphy->adda_backup, 16); in _rtl8723be_phy_iq_calibrate()
2136 rtlphy->iqk_mac_backup); in _rtl8723be_phy_iq_calibrate()
2138 rtlphy->iqk_bb_backup, in _rtl8723be_phy_iq_calibrate()
2172 return place - 13; in _get_right_chnl_place_for_iqk()
2248 struct rtl_phy *rtlphy = &rtlpriv->phy; in rtl8723be_phy_iq_calibrate()
2268 if (rtlphy->lck_inprogress) in rtl8723be_phy_iq_calibrate()
2271 spin_lock(&rtlpriv->locks.iqk_lock); in rtl8723be_phy_iq_calibrate()
2272 rtlphy->lck_inprogress = true; in rtl8723be_phy_iq_calibrate()
2273 spin_unlock(&rtlpriv->locks.iqk_lock); in rtl8723be_phy_iq_calibrate()
2277 rtlphy->iqk_bb_backup, 9); in rtl8723be_phy_iq_calibrate()
2341 rtlphy->reg_e94 = reg_e94; in rtl8723be_phy_iq_calibrate()
2343 rtlphy->reg_e9c = reg_e9c; in rtl8723be_phy_iq_calibrate()
2346 rtlphy->reg_eb4 = reg_eb4; in rtl8723be_phy_iq_calibrate()
2348 rtlphy->reg_ebc = reg_ebc; in rtl8723be_phy_iq_calibrate()
2353 rtlphy->reg_e94 = 0x100; in rtl8723be_phy_iq_calibrate()
2354 rtlphy->reg_eb4 = 0x100; in rtl8723be_phy_iq_calibrate()
2355 rtlphy->reg_e9c = 0x0; in rtl8723be_phy_iq_calibrate()
2356 rtlphy->reg_ebc = 0x0; in rtl8723be_phy_iq_calibrate()
2367 idx = _get_right_chnl_place_for_iqk(rtlphy->current_channel); in rtl8723be_phy_iq_calibrate()
2371 rtlphy->iqk_matrix[idx].value[0][i] = in rtl8723be_phy_iq_calibrate()
2373 rtlphy->iqk_matrix[idx].iqk_done = true; in rtl8723be_phy_iq_calibrate()
2377 rtlphy->iqk_bb_backup, 9); in rtl8723be_phy_iq_calibrate()
2383 spin_lock(&rtlpriv->locks.iqk_lock); in rtl8723be_phy_iq_calibrate()
2384 rtlphy->lck_inprogress = false; in rtl8723be_phy_iq_calibrate()
2385 spin_unlock(&rtlpriv->locks.iqk_lock); in rtl8723be_phy_iq_calibrate()
2391 struct rtl_phy *rtlphy = &rtlpriv->phy; in rtl8723be_phy_lc_calibrate()
2392 struct rtl_hal *rtlhal = &rtlpriv->rtlhal; in rtl8723be_phy_lc_calibrate()
2395 while (rtlpriv->mac80211.act_scanning && timecount < timeout) { in rtl8723be_phy_lc_calibrate()
2400 rtlphy->lck_inprogress = true; in rtl8723be_phy_lc_calibrate()
2403 rtlhal->current_bandtype, timecount); in rtl8723be_phy_lc_calibrate()
2407 rtlphy->lck_inprogress = false; in rtl8723be_phy_lc_calibrate()
2418 struct rtl_phy *rtlphy = &rtlpriv->phy; in rtl8723be_phy_set_io_cmd()
2422 "-->IO Cmd(%#x), set_io_inprogress(%d)\n", in rtl8723be_phy_set_io_cmd()
2423 iotype, rtlphy->set_io_inprogress); in rtl8723be_phy_set_io_cmd()
2442 if (b_postprocessing && !rtlphy->set_io_inprogress) { in rtl8723be_phy_set_io_cmd()
2443 rtlphy->set_io_inprogress = true; in rtl8723be_phy_set_io_cmd()
2444 rtlphy->current_io_type = iotype; in rtl8723be_phy_set_io_cmd()
2456 struct dig_t *dm_digtable = &rtlpriv->dm_digtable; in rtl8723be_phy_set_io()
2457 struct rtl_phy *rtlphy = &rtlpriv->phy; in rtl8723be_phy_set_io()
2460 "--->Cmd(%#x), set_io_inprogress(%d)\n", in rtl8723be_phy_set_io()
2461 rtlphy->current_io_type, rtlphy->set_io_inprogress); in rtl8723be_phy_set_io()
2462 switch (rtlphy->current_io_type) { in rtl8723be_phy_set_io()
2464 dm_digtable->cur_igvalue = rtlphy->initgain_backup.xaagccore1; in rtl8723be_phy_set_io()
2466 rtl8723be_phy_set_txpower_level(hw, rtlphy->current_channel); in rtl8723be_phy_set_io()
2470 rtlphy->initgain_backup.xaagccore1 = dm_digtable->cur_igvalue; in rtl8723be_phy_set_io()
2471 dm_digtable->cur_igvalue = 0x17; in rtl8723be_phy_set_io()
2477 rtlphy->current_io_type); in rtl8723be_phy_set_io()
2480 rtlphy->set_io_inprogress = false; in rtl8723be_phy_set_io()
2482 "(%#x)\n", rtlphy->current_io_type); in rtl8723be_phy_set_io()
2519 if ((ppsc->rfpwr_state == ERFOFF) && in _rtl8723be_phy_set_rf_power_state()
2533 jiffies_to_msecs(jiffies - in _rtl8723be_phy_set_rf_power_state()
2534 ppsc->last_sleep_jiffies)); in _rtl8723be_phy_set_rf_power_state()
2535 ppsc->last_awake_jiffies = jiffies; in _rtl8723be_phy_set_rf_power_state()
2538 if (mac->link_state == MAC80211_LINKED) in _rtl8723be_phy_set_rf_power_state()
2539 rtlpriv->cfg->ops->led_control(hw, LED_CTL_LINK); in _rtl8723be_phy_set_rf_power_state()
2541 rtlpriv->cfg->ops->led_control(hw, LED_CTL_NO_LINK); in _rtl8723be_phy_set_rf_power_state()
2548 ring = &pcipriv->dev.tx_ring[queue_id]; in _rtl8723be_phy_set_rf_power_state()
2554 skb_queue_len(&ring->queue) == 0) { in _rtl8723be_phy_set_rf_power_state()
2561 skb_queue_len(&ring->queue)); in _rtl8723be_phy_set_rf_power_state()
2571 skb_queue_len(&ring->queue)); in _rtl8723be_phy_set_rf_power_state()
2576 if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_HALT_NIC) { in _rtl8723be_phy_set_rf_power_state()
2582 if (ppsc->rfoff_reason == RF_CHANGE_BY_IPS) { in _rtl8723be_phy_set_rf_power_state()
2583 rtlpriv->cfg->ops->led_control(hw, in _rtl8723be_phy_set_rf_power_state()
2586 rtlpriv->cfg->ops->led_control(hw, in _rtl8723be_phy_set_rf_power_state()
2593 if (ppsc->rfpwr_state == ERFOFF) in _rtl8723be_phy_set_rf_power_state()
2597 ring = &pcipriv->dev.tx_ring[queue_id]; in _rtl8723be_phy_set_rf_power_state()
2598 if (skb_queue_len(&ring->queue) == 0) { in _rtl8723be_phy_set_rf_power_state()
2605 skb_queue_len(&ring->queue)); in _rtl8723be_phy_set_rf_power_state()
2615 skb_queue_len(&ring->queue)); in _rtl8723be_phy_set_rf_power_state()
2621 jiffies_to_msecs(jiffies - in _rtl8723be_phy_set_rf_power_state()
2622 ppsc->last_awake_jiffies)); in _rtl8723be_phy_set_rf_power_state()
2623 ppsc->last_sleep_jiffies = jiffies; in _rtl8723be_phy_set_rf_power_state()
2634 ppsc->rfpwr_state = rfpwr_state; in _rtl8723be_phy_set_rf_power_state()
2645 if (rfpwr_state == ppsc->rfpwr_state) in rtl8723be_phy_set_rf_power_state()