Lines Matching +full:0 +full:x2c
36 .reg_0e00 = 0x0a0c0c0c,
37 .reg_0e04 = 0x02040608,
38 .reg_0e08 = 0x00000000,
39 .reg_086c = 0x00000000,
41 .reg_0e10 = 0x0a0c0d0e,
42 .reg_0e14 = 0x02040608,
43 .reg_0e18 = 0x0a0c0d0e,
44 .reg_0e1c = 0x02040608,
46 .reg_0830 = 0x0a0c0c0c,
47 .reg_0834 = 0x02040608,
48 .reg_0838 = 0x00000000,
49 .reg_086c_2 = 0x00000000,
51 .reg_083c = 0x0a0c0d0e,
52 .reg_0848 = 0x02040608,
53 .reg_084c = 0x0a0c0d0e,
54 .reg_0868 = 0x02040608,
58 {0x00, 0x00030159}, {0x01, 0x00031284},
59 {0x02, 0x00098000}, {0x03, 0x00039c63},
60 {0x04, 0x000210e7}, {0x09, 0x0002044f},
61 {0x0a, 0x0001a3f1}, {0x0b, 0x00014787},
62 {0x0c, 0x000896fe}, {0x0d, 0x0000e02c},
63 {0x0e, 0x00039ce7}, {0x0f, 0x00000451},
64 {0x19, 0x00000000}, {0x1a, 0x00030355},
65 {0x1b, 0x00060a00}, {0x1c, 0x000fc378},
66 {0x1d, 0x000a1250}, {0x1e, 0x0000024f},
67 {0x1f, 0x00000000}, {0x20, 0x0000b614},
68 {0x21, 0x0006c000}, {0x22, 0x00000000},
69 {0x23, 0x00001558}, {0x24, 0x00000060},
70 {0x25, 0x00000483}, {0x26, 0x0004f000},
71 {0x27, 0x000ec7d9}, {0x28, 0x00057730},
72 {0x29, 0x00004783}, {0x2a, 0x00000001},
73 {0x2b, 0x00021334}, {0x2a, 0x00000000},
74 {0x2b, 0x00000054}, {0x2a, 0x00000001},
75 {0x2b, 0x00000808}, {0x2b, 0x00053333},
76 {0x2c, 0x0000000c}, {0x2a, 0x00000002},
77 {0x2b, 0x00000808}, {0x2b, 0x0005b333},
78 {0x2c, 0x0000000d}, {0x2a, 0x00000003},
79 {0x2b, 0x00000808}, {0x2b, 0x00063333},
80 {0x2c, 0x0000000d}, {0x2a, 0x00000004},
81 {0x2b, 0x00000808}, {0x2b, 0x0006b333},
82 {0x2c, 0x0000000d}, {0x2a, 0x00000005},
83 {0x2b, 0x00000808}, {0x2b, 0x00073333},
84 {0x2c, 0x0000000d}, {0x2a, 0x00000006},
85 {0x2b, 0x00000709}, {0x2b, 0x0005b333},
86 {0x2c, 0x0000000d}, {0x2a, 0x00000007},
87 {0x2b, 0x00000709}, {0x2b, 0x00063333},
88 {0x2c, 0x0000000d}, {0x2a, 0x00000008},
89 {0x2b, 0x0000060a}, {0x2b, 0x0004b333},
90 {0x2c, 0x0000000d}, {0x2a, 0x00000009},
91 {0x2b, 0x0000060a}, {0x2b, 0x00053333},
92 {0x2c, 0x0000000d}, {0x2a, 0x0000000a},
93 {0x2b, 0x0000060a}, {0x2b, 0x0005b333},
94 {0x2c, 0x0000000d}, {0x2a, 0x0000000b},
95 {0x2b, 0x0000060a}, {0x2b, 0x00063333},
96 {0x2c, 0x0000000d}, {0x2a, 0x0000000c},
97 {0x2b, 0x0000060a}, {0x2b, 0x0006b333},
98 {0x2c, 0x0000000d}, {0x2a, 0x0000000d},
99 {0x2b, 0x0000060a}, {0x2b, 0x00073333},
100 {0x2c, 0x0000000d}, {0x2a, 0x0000000e},
101 {0x2b, 0x0000050b}, {0x2b, 0x00066666},
102 {0x2c, 0x0000001a}, {0x2a, 0x000e0000},
103 {0x10, 0x0004000f}, {0x11, 0x000e31fc},
104 {0x10, 0x0006000f}, {0x11, 0x000ff9f8},
105 {0x10, 0x0002000f}, {0x11, 0x000203f9},
106 {0x10, 0x0003000f}, {0x11, 0x000ff500},
107 {0x10, 0x00000000}, {0x11, 0x00000000},
108 {0x10, 0x0008000f}, {0x11, 0x0003f100},
109 {0x10, 0x0009000f}, {0x11, 0x00023100},
110 {0x12, 0x00032000}, {0x12, 0x00071000},
111 {0x12, 0x000b0000}, {0x12, 0x000fc000},
112 {0x13, 0x000287b3}, {0x13, 0x000244b7},
113 {0x13, 0x000204ab}, {0x13, 0x0001c49f},
114 {0x13, 0x00018493}, {0x13, 0x0001429b},
115 {0x13, 0x00010299}, {0x13, 0x0000c29c},
116 {0x13, 0x000081a0}, {0x13, 0x000040ac},
117 {0x13, 0x00000020}, {0x14, 0x0001944c},
118 {0x14, 0x00059444}, {0x14, 0x0009944c},
119 {0x14, 0x000d9444}, {0x15, 0x0000f474},
120 {0x15, 0x0004f477}, {0x15, 0x0008f455},
121 {0x15, 0x000cf455}, {0x16, 0x00000339},
122 {0x16, 0x00040339}, {0x16, 0x00080339},
123 {0x16, 0x000c0366}, {0x00, 0x00010159},
124 {0x18, 0x0000f401}, {0xfe, 0x00000000},
125 {0xfe, 0x00000000}, {0x1f, 0x00000003},
126 {0xfe, 0x00000000}, {0xfe, 0x00000000},
127 {0x1e, 0x00000247}, {0x1f, 0x00000000},
128 {0x00, 0x00030159},
129 {0xff, 0xffffffff}
136 if (efuse->rtl_id != cpu_to_le16(0x8129)) in rtl8723au_parse_efuse()
169 if (priv->efuse_wifi.efuse8723.version >= 0x01) { in rtl8723au_parse_efuse()
171 priv->xtalk = priv->efuse_wifi.efuse8723.xtal_k & 0x3f; in rtl8723au_parse_efuse()
180 return 0; in rtl8723au_parse_efuse()
189 case 0: in rtl8723au_load_firmware()
214 rtl8xxxu_write32(priv, REG_AFE_XTAL_CTRL, 0x0381808d); in rtl8723au_init_phy_rf()
215 rtl8xxxu_write32(priv, REG_AFE_PLL_CTRL, 0xf0ffff83); in rtl8723au_init_phy_rf()
216 rtl8xxxu_write32(priv, REG_AFE_PLL_CTRL, 0xf0ffff82); in rtl8723au_init_phy_rf()
217 rtl8xxxu_write32(priv, REG_AFE_PLL_CTRL, 0xf0ffff83); in rtl8723au_init_phy_rf()
226 int count, ret = 0; in rtl8723a_emu_to_active()
228 /* 0x20[0] = 1 enable LDOA12 MACRO block for all interface*/ in rtl8723a_emu_to_active()
233 /* 0x67[0] = 0 to disable BT_GPS_SEL pins*/ in rtl8723a_emu_to_active()
234 val8 = rtl8xxxu_read8(priv, 0x0067); in rtl8723a_emu_to_active()
236 rtl8xxxu_write8(priv, 0x0067, val8); in rtl8723a_emu_to_active()
240 /* 0x00[5] = 0 release analog Ips to digital, 1:isolation */ in rtl8723a_emu_to_active()
245 /* disable SW LPS 0x04[10]= 0 */ in rtl8723a_emu_to_active()
250 /* wait till 0x04[17] = 1 power ready*/ in rtl8723a_emu_to_active()
266 /* release WLON reset 0x04[16]= 1*/ in rtl8723a_emu_to_active()
268 val8 |= BIT(0); in rtl8723a_emu_to_active()
271 /* disable HWPDN 0x04[15]= 0*/ in rtl8723a_emu_to_active()
281 /* set, then poll until 0 */ in rtl8723a_emu_to_active()
288 if ((val32 & APS_FSMCO_MAC_ENABLE) == 0) { in rtl8723a_emu_to_active()
289 ret = 0; in rtl8723a_emu_to_active()
300 /* 0x4C[23] = 0x4E[7] = 1, switch DPDT_SEL_P output from WL BB */ in rtl8723a_emu_to_active()
322 * RSV_CTRL 0x001C[7:0] = 0x00, unlock ISO/CLK/Power control register in rtl8723au_power_on()
324 rtl8xxxu_write8(priv, REG_RSV_CTRL, 0x0); in rtl8723au_power_on()
333 * 0x0004[19] = 1, reset 8051 in rtl8723au_power_on()
354 val32 |= (0x06 << 28); in rtl8723au_power_on()
384 .adda_1t_init = 0x0b1b25a0,
385 .adda_1t_path_on = 0x0bdb25a0,
386 .adda_2t_path_on_a = 0x04db25a4,
387 .adda_2t_path_on_b = 0x0b1b25a4,
388 .trxff_boundary = 0x27ff,