496 	rtl8xxxu_write32(priv, REG_TX_AGC_A_CCK1_MCS32, val32);  in rtl8192e_set_tx_power()
501 	rtl8xxxu_write32(priv, REG_TX_AGC_B_CCK11_A_CCK2_11, val32);  in rtl8192e_set_tx_power()
507 	rtl8xxxu_write32(priv, REG_TX_AGC_A_RATE18_06, ofdm);  in rtl8192e_set_tx_power()
508 	rtl8xxxu_write32(priv, REG_TX_AGC_A_RATE54_24, ofdm);  in rtl8192e_set_tx_power()
517 	rtl8xxxu_write32(priv, REG_TX_AGC_A_MCS03_MCS00, mcs);  in rtl8192e_set_tx_power()
518 	rtl8xxxu_write32(priv, REG_TX_AGC_A_MCS07_MCS04, mcs);  in rtl8192e_set_tx_power()
519 	rtl8xxxu_write32(priv, REG_TX_AGC_A_MCS11_MCS08, mcs);  in rtl8192e_set_tx_power()
520 	rtl8xxxu_write32(priv, REG_TX_AGC_A_MCS15_MCS12, mcs);  in rtl8192e_set_tx_power()
528 		rtl8xxxu_write32(priv, REG_TX_AGC_B_CCK1_55_MCS32, val32);  in rtl8192e_set_tx_power()
533 		rtl8xxxu_write32(priv, REG_TX_AGC_B_CCK11_A_CCK2_11, val32);  in rtl8192e_set_tx_power()
540 		rtl8xxxu_write32(priv, REG_TX_AGC_B_RATE18_06, ofdm);  in rtl8192e_set_tx_power()
541 		rtl8xxxu_write32(priv, REG_TX_AGC_B_RATE54_24, ofdm);  in rtl8192e_set_tx_power()
550 		rtl8xxxu_write32(priv, REG_TX_AGC_B_MCS03_MCS00, mcs);  in rtl8192e_set_tx_power()
551 		rtl8xxxu_write32(priv, REG_TX_AGC_B_MCS07_MCS04, mcs);  in rtl8192e_set_tx_power()
552 		rtl8xxxu_write32(priv, REG_TX_AGC_B_MCS11_MCS08, mcs);  in rtl8192e_set_tx_power()
553 		rtl8xxxu_write32(priv, REG_TX_AGC_B_MCS15_MCS12, mcs);  in rtl8192e_set_tx_power()
735 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);  in rtl8192eu_iqk_path_a()
737 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);  in rtl8192eu_iqk_path_a()
740 	rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x18008c1c);  in rtl8192eu_iqk_path_a()
741 	rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x38008c1c);  in rtl8192eu_iqk_path_a()
742 	rtl8xxxu_write32(priv, REG_TX_IQK_TONE_B, 0x38008c1c);  in rtl8192eu_iqk_path_a()
743 	rtl8xxxu_write32(priv, REG_RX_IQK_TONE_B, 0x38008c1c);  in rtl8192eu_iqk_path_a()
745 	rtl8xxxu_write32(priv, REG_TX_IQK_PI_A, 0x82140303);  in rtl8192eu_iqk_path_a()
746 	rtl8xxxu_write32(priv, REG_RX_IQK_PI_A, 0x68160000);  in rtl8192eu_iqk_path_a()
749 	rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x00462911);  in rtl8192eu_iqk_path_a()
752 	rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf9000000);  in rtl8192eu_iqk_path_a()
753 	rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf8000000);  in rtl8192eu_iqk_path_a()
776 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00);  in rtl8192eu_rx_iqk_path_a()
789 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);  in rtl8192eu_rx_iqk_path_a()
792 	rtl8xxxu_write32(priv, REG_TX_IQK, 0x01007c00);  in rtl8192eu_rx_iqk_path_a()
793 	rtl8xxxu_write32(priv, REG_RX_IQK, 0x01004800);  in rtl8192eu_rx_iqk_path_a()
796 	rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x18008c1c);  in rtl8192eu_rx_iqk_path_a()
797 	rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x38008c1c);  in rtl8192eu_rx_iqk_path_a()
798 	rtl8xxxu_write32(priv, REG_TX_IQK_TONE_B, 0x38008c1c);  in rtl8192eu_rx_iqk_path_a()
799 	rtl8xxxu_write32(priv, REG_RX_IQK_TONE_B, 0x38008c1c);  in rtl8192eu_rx_iqk_path_a()
801 	rtl8xxxu_write32(priv, REG_TX_IQK_PI_A, 0x82160c1f);  in rtl8192eu_rx_iqk_path_a()
802 	rtl8xxxu_write32(priv, REG_RX_IQK_PI_A, 0x68160c1f);  in rtl8192eu_rx_iqk_path_a()
805 	rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x0046a911);  in rtl8192eu_rx_iqk_path_a()
808 	rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xfa000000);  in rtl8192eu_rx_iqk_path_a()
809 	rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf8000000);  in rtl8192eu_rx_iqk_path_a()
824 		rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);  in rtl8192eu_rx_iqk_path_a()
831 	rtl8xxxu_write32(priv, REG_TX_IQK, val32);  in rtl8192eu_rx_iqk_path_a()
834 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);  in rtl8192eu_rx_iqk_path_a()
846 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);  in rtl8192eu_rx_iqk_path_a()
849 	rtl8xxxu_write32(priv, REG_RX_IQK, 0x01004800);  in rtl8192eu_rx_iqk_path_a()
852 	rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x38008c1c);  in rtl8192eu_rx_iqk_path_a()
853 	rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x18008c1c);  in rtl8192eu_rx_iqk_path_a()
854 	rtl8xxxu_write32(priv, REG_TX_IQK_TONE_B, 0x38008c1c);  in rtl8192eu_rx_iqk_path_a()
855 	rtl8xxxu_write32(priv, REG_RX_IQK_TONE_B, 0x38008c1c);  in rtl8192eu_rx_iqk_path_a()
857 	rtl8xxxu_write32(priv, REG_TX_IQK_PI_A, 0x82160c1f);  in rtl8192eu_rx_iqk_path_a()
858 	rtl8xxxu_write32(priv, REG_RX_IQK_PI_A, 0x28160c1f);  in rtl8192eu_rx_iqk_path_a()
861 	rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x0046a891);  in rtl8192eu_rx_iqk_path_a()
864 	rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xfa000000);  in rtl8192eu_rx_iqk_path_a()
865 	rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf8000000);  in rtl8192eu_rx_iqk_path_a()
872 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);  in rtl8192eu_rx_iqk_path_a()
892 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);  in rtl8192eu_iqk_path_b()
894 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);  in rtl8192eu_iqk_path_b()
896 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);  in rtl8192eu_iqk_path_b()
897 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);  in rtl8192eu_iqk_path_b()
900 	rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x38008c1c);  in rtl8192eu_iqk_path_b()
901 	rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x38008c1c);  in rtl8192eu_iqk_path_b()
902 	rtl8xxxu_write32(priv, REG_TX_IQK_TONE_B, 0x18008c1c);  in rtl8192eu_iqk_path_b()
903 	rtl8xxxu_write32(priv, REG_RX_IQK_TONE_B, 0x38008c1c);  in rtl8192eu_iqk_path_b()
905 	rtl8xxxu_write32(priv, REG_TX_IQK_PI_B, 0x821403e2);  in rtl8192eu_iqk_path_b()
906 	rtl8xxxu_write32(priv, REG_RX_IQK_PI_B, 0x68160000);  in rtl8192eu_iqk_path_b()
909 	rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x00492911);  in rtl8192eu_iqk_path_b()
912 	rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xfa000000);  in rtl8192eu_iqk_path_b()
913 	rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf8000000);  in rtl8192eu_iqk_path_b()
939 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);  in rtl8192eu_rx_iqk_path_b()
952 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);  in rtl8192eu_rx_iqk_path_b()
955 	rtl8xxxu_write32(priv, REG_TX_IQK, 0x01007c00);  in rtl8192eu_rx_iqk_path_b()
956 	rtl8xxxu_write32(priv, REG_RX_IQK, 0x01004800);  in rtl8192eu_rx_iqk_path_b()
959 	rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x38008c1c);  in rtl8192eu_rx_iqk_path_b()
960 	rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x38008c1c);  in rtl8192eu_rx_iqk_path_b()
961 	rtl8xxxu_write32(priv, REG_TX_IQK_TONE_B, 0x18008c1c);  in rtl8192eu_rx_iqk_path_b()
962 	rtl8xxxu_write32(priv, REG_RX_IQK_TONE_B, 0x38008c1c);  in rtl8192eu_rx_iqk_path_b()
964 	rtl8xxxu_write32(priv, REG_TX_IQK_PI_B, 0x82160c1f);  in rtl8192eu_rx_iqk_path_b()
965 	rtl8xxxu_write32(priv, REG_RX_IQK_PI_B, 0x68160c1f);  in rtl8192eu_rx_iqk_path_b()
968 	rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x0046a911);  in rtl8192eu_rx_iqk_path_b()
971 	rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xfa000000);  in rtl8192eu_rx_iqk_path_b()
972 	rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf8000000);  in rtl8192eu_rx_iqk_path_b()
990 		rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);  in rtl8192eu_rx_iqk_path_b()
997 	rtl8xxxu_write32(priv, REG_TX_IQK, val32);  in rtl8192eu_rx_iqk_path_b()
1000 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);  in rtl8192eu_rx_iqk_path_b()
1012 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);  in rtl8192eu_rx_iqk_path_b()
1015 	rtl8xxxu_write32(priv, REG_RX_IQK, 0x01004800);  in rtl8192eu_rx_iqk_path_b()
1018 	rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x38008c1c);  in rtl8192eu_rx_iqk_path_b()
1019 	rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x38008c1c);  in rtl8192eu_rx_iqk_path_b()
1020 	rtl8xxxu_write32(priv, REG_TX_IQK_TONE_B, 0x38008c1c);  in rtl8192eu_rx_iqk_path_b()
1021 	rtl8xxxu_write32(priv, REG_RX_IQK_TONE_B, 0x18008c1c);  in rtl8192eu_rx_iqk_path_b()
1023 	rtl8xxxu_write32(priv, REG_TX_IQK_PI_A, 0x82160c1f);  in rtl8192eu_rx_iqk_path_b()
1024 	rtl8xxxu_write32(priv, REG_RX_IQK_PI_A, 0x28160c1f);  in rtl8192eu_rx_iqk_path_b()
1027 	rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x0046a891);  in rtl8192eu_rx_iqk_path_b()
1030 	rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xfa000000);  in rtl8192eu_rx_iqk_path_b()
1031 	rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf8000000);  in rtl8192eu_rx_iqk_path_b()
1039 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);  in rtl8192eu_rx_iqk_path_b()
1105 	rtl8xxxu_write32(priv, REG_CCK0_AFE_SETTING, val32);  in rtl8192eu_phy_iqcalibrate()
1107 	rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, 0x03a05600);  in rtl8192eu_phy_iqcalibrate()
1108 	rtl8xxxu_write32(priv, REG_OFDM0_TR_MUX_PAR, 0x000800e4);  in rtl8192eu_phy_iqcalibrate()
1109 	rtl8xxxu_write32(priv, REG_FPGA0_XCD_RF_SW_CTRL, 0x22208200);  in rtl8192eu_phy_iqcalibrate()
1113 	rtl8xxxu_write32(priv, REG_FPGA0_XAB_RF_SW_CTRL, val32);  in rtl8192eu_phy_iqcalibrate()
1117 	rtl8xxxu_write32(priv, REG_FPGA0_XA_RF_INT_OE, val32);  in rtl8192eu_phy_iqcalibrate()
1120 	rtl8xxxu_write32(priv, REG_FPGA0_XB_RF_INT_OE, val32);  in rtl8192eu_phy_iqcalibrate()
1122 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);  in rtl8192eu_phy_iqcalibrate()
1123 	rtl8xxxu_write32(priv, REG_TX_IQK, 0x01007c00);  in rtl8192eu_phy_iqcalibrate()
1124 	rtl8xxxu_write32(priv, REG_RX_IQK, 0x01004800);  in rtl8192eu_phy_iqcalibrate()
1162 		rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);  in rtl8192eu_phy_iqcalibrate()
1164 		rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);  in rtl8192eu_phy_iqcalibrate()
1169 		rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);  in rtl8192eu_phy_iqcalibrate()
1170 		rtl8xxxu_write32(priv, REG_TX_IQK, 0x01007c00);  in rtl8192eu_phy_iqcalibrate()
1171 		rtl8xxxu_write32(priv, REG_RX_IQK, 0x01004800);  in rtl8192eu_phy_iqcalibrate()
1205 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);  in rtl8192eu_phy_iqcalibrate()
1222 		rtl8xxxu_write32(priv, REG_OFDM0_XA_AGC_CORE1, val32 | 0x50);  in rtl8192eu_phy_iqcalibrate()
1223 		rtl8xxxu_write32(priv, REG_OFDM0_XA_AGC_CORE1, val32 | xa_agc);  in rtl8192eu_phy_iqcalibrate()
1228 			rtl8xxxu_write32(priv, REG_OFDM0_XB_AGC_CORE1,  in rtl8192eu_phy_iqcalibrate()
1230 			rtl8xxxu_write32(priv, REG_OFDM0_XB_AGC_CORE1,  in rtl8192eu_phy_iqcalibrate()
1235 		rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x01008c00);  in rtl8192eu_phy_iqcalibrate()
1236 		rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x01008c00);  in rtl8192eu_phy_iqcalibrate()
1348 	rtl8xxxu_write32(priv, REG_AFE_CTRL4, val32);  in rtl8192e_crystal_afe_adjust()
1363 	rtl8xxxu_write32(priv, REG_AFE_CTRL4, val32);  in rtl8192e_crystal_afe_adjust()
1421 	rtl8xxxu_write32(priv, REG_APS_FSMCO, val32);  in rtl8192e_emu_to_active()
1567 		rtl8xxxu_write32(priv, REG_8192E_LDOV12_CTRL, val32);  in rtl8192eu_power_on()
1640 	rtl8xxxu_write32(priv, REG_RX_WAIT_CCA, val32);  in rtl8192e_enable_rf()
1653 	rtl8xxxu_write32(priv, REG_PWR_DATA, val32);  in rtl8192e_enable_rf()
1657 	rtl8xxxu_write32(priv, REG_RFE_BUFFER, val32);  in rtl8192e_enable_rf()
1664 	rtl8xxxu_write32(priv, REG_LEDCFG0, val32);  in rtl8192e_enable_rf()