Lines Matching +full:txpower +full:-

1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 	Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
25  * Default offset is required for RSSI <-> dBm conversion.
153  * CSR11: Back-off control register.
154  * CWMIN: CWmin. Default cwmin is 31 (2^5 - 1).
155  * CWMAX: CWmax. Default cwmax is 1023 (2^10 - 1).
190  * TSF_SYNC: Tsf sync, 0: disable, 1: infra, 2: ad-hoc/master mode.
210  * CFP: ASIC is in contention-free period.
459  * ENABLE_CLK: Enable clk_run, pci clock can't going down to non-operational.
544  * KICK_RX: Kick one-shot rx in one-shot rx mode.
545  * ONESHOT_RXMODE: Enable one-shot rx mode for debugging.
562  * RALINKCSR: Ralink Rx auto-reset BBCR.
684  * MACCSR2: TX_PE to RX_PE turn-around time control register
799  * EEPROM TXPOWER
929  * Macros for converting txpower from EEPROM to mac80211 value
931  * NOTE: Logics in rt2400pci for txpower are reversed
932  * compared to the other rt2x00 drivers. A higher txpower
933  * value means that the txpower must be lowered. This is
945 	((__CLAMP_TX(__txpower) - MAX_TXPOWER) + MIN_TXPOWER)
948 	(MAX_TXPOWER - (__CLAMP_TX(__txpower) - MIN_TXPOWER))