Lines Matching refs:mt76_wr
81 mt76_wr(dev, MT_MCUQ_EXT_CTRL(MT_MCUQ_FWDL) + ofs, PREFETCH(0x0, 0x4)); in __mt7915_dma_prefetch()
82 mt76_wr(dev, MT_MCUQ_EXT_CTRL(MT_MCUQ_WM) + ofs, PREFETCH(0x40, 0x4)); in __mt7915_dma_prefetch()
83 mt76_wr(dev, MT_TXQ_EXT_CTRL(0) + ofs, PREFETCH(0x80, 0x4)); in __mt7915_dma_prefetch()
84 mt76_wr(dev, MT_TXQ_EXT_CTRL(1) + ofs, PREFETCH(0xc0, 0x4)); in __mt7915_dma_prefetch()
85 mt76_wr(dev, MT_MCUQ_EXT_CTRL(MT_MCUQ_WA) + ofs, PREFETCH(0x100, 0x4)); in __mt7915_dma_prefetch()
87 mt76_wr(dev, MT_RXQ_BAND1_CTRL(MT_RXQ_MCU) + ofs, in __mt7915_dma_prefetch()
89 mt76_wr(dev, MT_RXQ_BAND1_CTRL(MT_RXQ_MCU_WA) + ofs, in __mt7915_dma_prefetch()
92 mt76_wr(dev, MT_RXQ_BAND1_CTRL(MT_RXQ_MAIN_WA) + ofs, in __mt7915_dma_prefetch()
96 mt76_wr(dev, MT_RXQ_BAND1_CTRL(MT_RXQ_BAND1_WA) + ofs, in __mt7915_dma_prefetch()
98 mt76_wr(dev, MT_RXQ_BAND1_CTRL(MT_RXQ_MAIN) + ofs, in __mt7915_dma_prefetch()
100 mt76_wr(dev, MT_RXQ_BAND1_CTRL(MT_RXQ_BAND1) + ofs, in __mt7915_dma_prefetch()
108 mt76_wr(dev, MT_MCUQ_EXT_CTRL(MT_MCUQ_WA) + ofs, in __mt7915_dma_prefetch()
110 mt76_wr(dev, MT_RXQ_BAND1_CTRL(MT_RXQ_BAND1_WA) + ofs, in __mt7915_dma_prefetch()
112 mt76_wr(dev, MT_RXQ_BAND1_CTRL(MT_RXQ_BAND1) + ofs, in __mt7915_dma_prefetch()
217 mt76_wr(dev, MT_WFDMA0_RST_DTX_PTR, ~0); in mt7915_dma_enable()
219 mt76_wr(dev, MT_WFDMA1_RST_DTX_PTR, ~0); in mt7915_dma_enable()
221 mt76_wr(dev, MT_WFDMA0_RST_DTX_PTR + hif1_ofs, ~0); in mt7915_dma_enable()
223 mt76_wr(dev, MT_WFDMA1_RST_DTX_PTR + hif1_ofs, ~0); in mt7915_dma_enable()
227 mt76_wr(dev, MT_WFDMA0_PRI_DLY_INT_CFG0, 0); in mt7915_dma_enable()
229 mt76_wr(dev, MT_WFDMA1_PRI_DLY_INT_CFG0, 0); in mt7915_dma_enable()
231 mt76_wr(dev, MT_WFDMA0_PRI_DLY_INT_CFG1, 0); in mt7915_dma_enable()
232 mt76_wr(dev, MT_WFDMA0_PRI_DLY_INT_CFG2, 0); in mt7915_dma_enable()
236 mt76_wr(dev, MT_WFDMA0_PRI_DLY_INT_CFG0 + hif1_ofs, 0); in mt7915_dma_enable()
238 mt76_wr(dev, MT_WFDMA1_PRI_DLY_INT_CFG0 + in mt7915_dma_enable()
241 mt76_wr(dev, MT_WFDMA0_PRI_DLY_INT_CFG1 + in mt7915_dma_enable()
243 mt76_wr(dev, MT_WFDMA0_PRI_DLY_INT_CFG2 + in mt7915_dma_enable()
326 mt76_wr(dev, MT_INT_WED_MASK_CSR, wed_irq_mask); in mt7915_dma_enable()
354 mt76_wr(dev, MT_WFDMA_WED_RING_CONTROL, in mt7915_dma_init()