127 	u32 hif1_ofs = 0;  in mt7915_dma_disable()  local
130 		hif1_ofs = MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0);  in mt7915_dma_disable()
153 			mt76_clear(dev, MT_WFDMA0_RST + hif1_ofs,  in mt7915_dma_disable()
157 			mt76_set(dev, MT_WFDMA0_RST + hif1_ofs,  in mt7915_dma_disable()
162 				mt76_clear(dev, MT_WFDMA1_RST + hif1_ofs,  in mt7915_dma_disable()
166 				mt76_set(dev, MT_WFDMA1_RST + hif1_ofs,  in mt7915_dma_disable()
190 		mt76_clear(dev, MT_WFDMA0_GLO_CFG + hif1_ofs,  in mt7915_dma_disable()
198 			mt76_clear(dev, MT_WFDMA1_GLO_CFG + hif1_ofs,  in mt7915_dma_disable()
210 	u32 hif1_ofs = 0;  in mt7915_dma_enable()  local
214 		hif1_ofs = MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0);  in mt7915_dma_enable()
221 		mt76_wr(dev, MT_WFDMA0_RST_DTX_PTR + hif1_ofs, ~0);  in mt7915_dma_enable()
223 			mt76_wr(dev, MT_WFDMA1_RST_DTX_PTR + hif1_ofs, ~0);  in mt7915_dma_enable()
236 		mt76_wr(dev, MT_WFDMA0_PRI_DLY_INT_CFG0 + hif1_ofs, 0);  in mt7915_dma_enable()
239 				hif1_ofs, 0);  in mt7915_dma_enable()
242 				hif1_ofs, 0);  in mt7915_dma_enable()
244 				hif1_ofs, 0);  in mt7915_dma_enable()
264 		mt76_set(dev, MT_WFDMA0_BUSY_ENA + hif1_ofs,  in mt7915_dma_enable()
270 			mt76_set(dev, MT_WFDMA1_BUSY_ENA + hif1_ofs,  in mt7915_dma_enable()
294 		mt76_set(dev, MT_WFDMA0_GLO_CFG + hif1_ofs,  in mt7915_dma_enable()
301 			mt76_set(dev, MT_WFDMA1_GLO_CFG + hif1_ofs,  in mt7915_dma_enable()
339 	u32 hif1_ofs = 0;  in mt7915_dma_init()  local
347 		hif1_ofs = MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0);  in mt7915_dma_init()
455 				       MT_RXQ_RING_BASE(MT_RXQ_BAND1) + hif1_ofs);  in mt7915_dma_init()
464 				       MT_RXQ_RING_BASE(MT_RXQ_BAND1_WA) + hif1_ofs);  in mt7915_dma_init()