Lines Matching +full:rates +full:- +full:mcs
1 // SPDX-License-Identifier: ISC
28 memset(dev->mt76.aggr_stats, 0, sizeof(dev->mt76.aggr_stats)); in mt76x02_mac_reset_counters()
39 if (key->keylen > 32) in mt76x02_mac_get_key_info()
42 memcpy(key_data, key->key, key->keylen); in mt76x02_mac_get_key_info()
44 switch (key->cipher) { in mt76x02_mac_get_key_info()
67 return -EOPNOTSUPP; in mt76x02_mac_shared_key_setup()
103 atomic64_set(&key->tx_pn, pn); in mt76x02_mac_wcid_sync_pn()
116 return -EOPNOTSUPP; in mt76x02_mac_wcid_set_key()
124 !!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)); in mt76x02_mac_wcid_set_key()
126 pn = atomic64_read(&key->tx_pn); in mt76x02_mac_wcid_set_key()
128 iv_data[3] = key->keyidx << 6; in mt76x02_mac_wcid_set_key()
186 if (rate->flags & IEEE80211_TX_RC_VHT_MCS) { in mt76x02_mac_tx_rate_val()
187 rate_idx = rate->idx; in mt76x02_mac_tx_rate_val()
188 nss = 1 + (rate->idx >> 4); in mt76x02_mac_tx_rate_val()
190 if (rate->flags & IEEE80211_TX_RC_80_MHZ_WIDTH) in mt76x02_mac_tx_rate_val()
192 else if (rate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH) in mt76x02_mac_tx_rate_val()
194 } else if (rate->flags & IEEE80211_TX_RC_MCS) { in mt76x02_mac_tx_rate_val()
195 rate_idx = rate->idx; in mt76x02_mac_tx_rate_val()
196 nss = 1 + (rate->idx >> 3); in mt76x02_mac_tx_rate_val()
198 if (rate->flags & IEEE80211_TX_RC_GREEN_FIELD) in mt76x02_mac_tx_rate_val()
200 if (rate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH) in mt76x02_mac_tx_rate_val()
204 int band = dev->mphy.chandef.chan->band; in mt76x02_mac_tx_rate_val()
207 r = &dev->mt76.hw->wiphy->bands[band]->bitrates[rate->idx]; in mt76x02_mac_tx_rate_val()
208 if (rate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE) in mt76x02_mac_tx_rate_val()
209 val = r->hw_value_short; in mt76x02_mac_tx_rate_val()
211 val = r->hw_value; in mt76x02_mac_tx_rate_val()
221 if (rate->flags & IEEE80211_TX_RC_SHORT_GI) in mt76x02_mac_tx_rate_val()
241 wcid->tx_info = tx_info; in mt76x02_mac_wcid_set_rate()
260 stat->valid = !!(stat1 & MT_TX_STAT_FIFO_VALID); in mt76x02_mac_load_tx_status()
261 if (!stat->valid) in mt76x02_mac_load_tx_status()
264 stat->success = !!(stat1 & MT_TX_STAT_FIFO_SUCCESS); in mt76x02_mac_load_tx_status()
265 stat->aggr = !!(stat1 & MT_TX_STAT_FIFO_AGGR); in mt76x02_mac_load_tx_status()
266 stat->ack_req = !!(stat1 & MT_TX_STAT_FIFO_ACKREQ); in mt76x02_mac_load_tx_status()
267 stat->wcid = FIELD_GET(MT_TX_STAT_FIFO_WCID, stat1); in mt76x02_mac_load_tx_status()
268 stat->rate = FIELD_GET(MT_TX_STAT_FIFO_RATE, stat1); in mt76x02_mac_load_tx_status()
270 stat->retry = FIELD_GET(MT_TX_STAT_FIFO_EXT_RETRY, stat2); in mt76x02_mac_load_tx_status()
271 stat->pktid = FIELD_GET(MT_TX_STAT_FIFO_EXT_PKTID, stat2); in mt76x02_mac_load_tx_status()
284 txrate->idx = 0; in mt76x02_mac_process_tx_rate()
285 txrate->flags = 0; in mt76x02_mac_process_tx_rate()
286 txrate->count = 1; in mt76x02_mac_process_tx_rate()
293 txrate->idx = idx; in mt76x02_mac_process_tx_rate()
297 idx -= 8; in mt76x02_mac_process_tx_rate()
299 txrate->idx = idx; in mt76x02_mac_process_tx_rate()
302 txrate->flags |= IEEE80211_TX_RC_GREEN_FIELD; in mt76x02_mac_process_tx_rate()
305 txrate->flags |= IEEE80211_TX_RC_MCS; in mt76x02_mac_process_tx_rate()
306 txrate->idx = idx; in mt76x02_mac_process_tx_rate()
309 txrate->flags |= IEEE80211_TX_RC_VHT_MCS; in mt76x02_mac_process_tx_rate()
310 txrate->idx = idx; in mt76x02_mac_process_tx_rate()
313 return -EINVAL; in mt76x02_mac_process_tx_rate()
320 txrate->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH; in mt76x02_mac_process_tx_rate()
323 txrate->flags |= IEEE80211_TX_RC_80_MHZ_WIDTH; in mt76x02_mac_process_tx_rate()
326 return -EINVAL; in mt76x02_mac_process_tx_rate()
330 txrate->flags |= IEEE80211_TX_RC_SHORT_GI; in mt76x02_mac_process_tx_rate()
339 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; in mt76x02_mac_write_txwi()
341 struct ieee80211_tx_rate *rate = &info->control.rates[0]; in mt76x02_mac_write_txwi()
342 struct ieee80211_key_conf *key = info->control.hw_key; in mt76x02_mac_write_txwi()
348 u8 ccmp_pn[8], nstreams = dev->mphy.chainmask & 0xf; in mt76x02_mac_write_txwi()
354 if (!info->control.hw_key && wcid && wcid->hw_key_idx != 0xff && in mt76x02_mac_write_txwi()
355 ieee80211_has_protected(hdr->frame_control)) { in mt76x02_mac_write_txwi()
357 ieee80211_get_tx_rates(info->control.vif, sta, skb, in mt76x02_mac_write_txwi()
358 info->control.rates, 1); in mt76x02_mac_write_txwi()
362 txwi->wcid = wcid->idx; in mt76x02_mac_write_txwi()
364 txwi->wcid = 0xff; in mt76x02_mac_write_txwi()
366 if (wcid && wcid->sw_iv && key) { in mt76x02_mac_write_txwi()
367 u64 pn = atomic64_inc_return(&key->tx_pn); in mt76x02_mac_write_txwi()
372 ccmp_pn[3] = 0x20 | (key->keyidx << 6); in mt76x02_mac_write_txwi()
377 txwi->iv = *((__le32 *)&ccmp_pn[0]); in mt76x02_mac_write_txwi()
378 txwi->eiv = *((__le32 *)&ccmp_pn[4]); in mt76x02_mac_write_txwi()
381 if (wcid && (rate->idx < 0 || !rate->count)) { in mt76x02_mac_write_txwi()
382 wcid_tx_info = wcid->tx_info; in mt76x02_mac_write_txwi()
391 txwi->rate = cpu_to_le16(rateval); in mt76x02_mac_write_txwi()
393 txpwr_adj = mt76x02_tx_get_txpwr_adj(dev, dev->txpower_conf, in mt76x02_mac_write_txwi()
395 txwi->ctl2 = FIELD_PREP(MT_TX_PWR_ADJ, txpwr_adj); in mt76x02_mac_write_txwi()
397 if (nstreams > 1 && mt76_rev(&dev->mt76) >= MT76XX_REV_E4) in mt76x02_mac_write_txwi()
398 txwi->txstream = 0x13; in mt76x02_mac_write_txwi()
399 else if (nstreams > 1 && mt76_rev(&dev->mt76) >= MT76XX_REV_E3 && in mt76x02_mac_write_txwi()
400 !(txwi->rate & cpu_to_le16(rate_ht_mask))) in mt76x02_mac_write_txwi()
401 txwi->txstream = 0x93; in mt76x02_mac_write_txwi()
403 if (is_mt76x2(dev) && (info->flags & IEEE80211_TX_CTL_LDPC)) in mt76x02_mac_write_txwi()
404 txwi->rate |= cpu_to_le16(MT_RXWI_RATE_LDPC); in mt76x02_mac_write_txwi()
405 if ((info->flags & IEEE80211_TX_CTL_STBC) && nss == 1) in mt76x02_mac_write_txwi()
406 txwi->rate |= cpu_to_le16(MT_RXWI_RATE_STBC); in mt76x02_mac_write_txwi()
407 if (nss > 1 && sta && sta->deflink.smps_mode == IEEE80211_SMPS_DYNAMIC) in mt76x02_mac_write_txwi()
409 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) in mt76x02_mac_write_txwi()
410 txwi->ack_ctl |= MT_TXWI_ACK_CTL_REQ; in mt76x02_mac_write_txwi()
411 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) in mt76x02_mac_write_txwi()
412 txwi->ack_ctl |= MT_TXWI_ACK_CTL_NSEQ; in mt76x02_mac_write_txwi()
413 if ((info->flags & IEEE80211_TX_CTL_AMPDU) && sta) { in mt76x02_mac_write_txwi()
415 u8 ampdu_density = sta->deflink.ht_cap.ampdu_density; in mt76x02_mac_write_txwi()
417 ba_size <<= sta->deflink.ht_cap.ampdu_factor; in mt76x02_mac_write_txwi()
418 ba_size = min_t(int, 63, ba_size - 1); in mt76x02_mac_write_txwi()
419 if (info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE) in mt76x02_mac_write_txwi()
421 txwi->ack_ctl |= FIELD_PREP(MT_TXWI_ACK_CTL_BA_WINDOW, ba_size); in mt76x02_mac_write_txwi()
430 if (ieee80211_is_probe_resp(hdr->frame_control) || in mt76x02_mac_write_txwi()
431 ieee80211_is_beacon(hdr->frame_control)) in mt76x02_mac_write_txwi()
434 txwi->flags |= cpu_to_le16(txwi_flags); in mt76x02_mac_write_txwi()
435 txwi->len_ctl = cpu_to_le16(len); in mt76x02_mac_write_txwi()
440 mt76x02_tx_rate_fallback(struct ieee80211_tx_rate *rates, int idx, int phy) in mt76x02_tx_rate_fallback() argument
442 u8 mcs, nss; in mt76x02_tx_rate_fallback() local
447 rates += idx - 1; in mt76x02_tx_rate_fallback()
448 rates[1] = rates[0]; in mt76x02_tx_rate_fallback()
451 mcs = ieee80211_rate_get_vht_mcs(rates); in mt76x02_tx_rate_fallback()
452 nss = ieee80211_rate_get_vht_nss(rates); in mt76x02_tx_rate_fallback()
454 if (mcs == 0) in mt76x02_tx_rate_fallback()
455 nss = max_t(int, nss - 1, 1); in mt76x02_tx_rate_fallback()
457 mcs--; in mt76x02_tx_rate_fallback()
459 ieee80211_rate_set_vht(rates + 1, mcs, nss); in mt76x02_tx_rate_fallback()
463 /* MCS 8 falls back to MCS 0 */ in mt76x02_tx_rate_fallback()
464 if (rates[0].idx == 8) { in mt76x02_tx_rate_fallback()
465 rates[1].idx = 0; in mt76x02_tx_rate_fallback()
470 rates[1].idx = max_t(int, rates[0].idx - 1, 0); in mt76x02_tx_rate_fallback()
480 struct ieee80211_tx_rate *rate = info->status.rates; in mt76x02_mac_fill_tx_status()
483 int retry = st->retry; in mt76x02_mac_fill_tx_status()
490 phy = FIELD_GET(MT_RXWI_RATE_PHY, st->rate); in mt76x02_mac_fill_tx_status()
492 if (st->pktid & MT_PACKET_ID_HAS_RATE) { in mt76x02_mac_fill_tx_status()
493 first_rate = st->rate & ~MT_PKTID_RATE; in mt76x02_mac_fill_tx_status()
494 first_rate |= st->pktid & MT_PKTID_RATE; in mt76x02_mac_fill_tx_status()
497 dev->mphy.chandef.chan->band); in mt76x02_mac_fill_tx_status()
502 mt76x02_mac_process_tx_rate(&rate[0], msta->wcid.tx_info, in mt76x02_mac_fill_tx_status()
503 dev->mphy.chandef.chan->band); in mt76x02_mac_fill_tx_status()
506 mt76x02_mac_process_tx_rate(&last_rate, st->rate, in mt76x02_mac_fill_tx_status()
507 dev->mphy.chandef.chan->band); in mt76x02_mac_fill_tx_status()
509 for (i = 0; i < ARRAY_SIZE(info->status.rates); i++) { in mt76x02_mac_fill_tx_status()
510 retry--; in mt76x02_mac_fill_tx_status()
511 if (i + 1 == ARRAY_SIZE(info->status.rates)) { in mt76x02_mac_fill_tx_status()
512 info->status.rates[i] = last_rate; in mt76x02_mac_fill_tx_status()
513 info->status.rates[i].count = max_t(int, retry, 1); in mt76x02_mac_fill_tx_status()
517 mt76x02_tx_rate_fallback(info->status.rates, i, phy); in mt76x02_mac_fill_tx_status()
518 if (info->status.rates[i].idx == last_rate.idx) in mt76x02_mac_fill_tx_status()
522 if (i + 1 < ARRAY_SIZE(info->status.rates)) { in mt76x02_mac_fill_tx_status()
523 info->status.rates[i + 1].idx = -1; in mt76x02_mac_fill_tx_status()
524 info->status.rates[i + 1].count = 0; in mt76x02_mac_fill_tx_status()
527 info->status.ampdu_len = n_frames; in mt76x02_mac_fill_tx_status()
528 info->status.ampdu_ack_len = st->success ? n_frames : 0; in mt76x02_mac_fill_tx_status()
530 if (st->aggr) in mt76x02_mac_fill_tx_status()
531 info->flags |= IEEE80211_TX_CTL_AMPDU | in mt76x02_mac_fill_tx_status()
534 if (!st->ack_req) in mt76x02_mac_fill_tx_status()
535 info->flags |= IEEE80211_TX_CTL_NO_ACK; in mt76x02_mac_fill_tx_status()
536 else if (st->success) in mt76x02_mac_fill_tx_status()
537 info->flags |= IEEE80211_TX_STAT_ACK; in mt76x02_mac_fill_tx_status()
555 struct mt76_dev *mdev = &dev->mt76; in mt76x02_send_tx_status()
562 if (stat->pktid == MT_PACKET_ID_NO_ACK) in mt76x02_send_tx_status()
567 if (stat->wcid < MT76x02_N_WCIDS) in mt76x02_send_tx_status()
568 wcid = rcu_dereference(dev->mt76.wcid[stat->wcid]); in mt76x02_send_tx_status()
570 if (wcid && wcid->sta) { in mt76x02_send_tx_status()
581 if (mt76_is_skb_pktid(stat->pktid)) in mt76x02_send_tx_status()
583 stat->pktid, &list); in mt76x02_send_tx_status()
588 if (!status.skb && !(stat->pktid & MT_PACKET_ID_HAS_RATE)) { in mt76x02_send_tx_status()
594 if (msta && stat->aggr && !status.skb) { in mt76x02_send_tx_status()
597 stat_val = stat->rate; in mt76x02_send_tx_status()
598 stat_val |= ((u32)stat->retry) << 16; in mt76x02_send_tx_status()
599 stat_cache = msta->status.rate; in mt76x02_send_tx_status()
600 stat_cache |= ((u32)msta->status.retry) << 16; in mt76x02_send_tx_status()
603 stat->wcid == msta->status.wcid && msta->n_frames < 32) { in mt76x02_send_tx_status()
604 msta->n_frames++; in mt76x02_send_tx_status()
609 cur_pktid = msta->status.pktid; in mt76x02_send_tx_status()
611 &msta->status, msta->n_frames); in mt76x02_send_tx_status()
613 msta->status = *stat; in mt76x02_send_tx_status()
614 msta->n_frames = 1; in mt76x02_send_tx_status()
617 cur_pktid = stat->pktid; in mt76x02_send_tx_status()
624 len = status.skb->len; in mt76x02_send_tx_status()
628 len = status.info->status.ampdu_len * ewma_pktlen_read(&msta->pktlen); in mt76x02_send_tx_status()
642 spin_lock_bh(&dev->mt76.cc_lock); in mt76x02_send_tx_status()
643 dev->tx_airtime += duration; in mt76x02_send_tx_status()
644 spin_unlock_bh(&dev->mt76.cc_lock); in mt76x02_send_tx_status()
665 if (status->band == NL80211_BAND_2GHZ) in mt76x02_mac_process_rate()
668 status->rate_idx = idx; in mt76x02_mac_process_rate()
672 idx -= 8; in mt76x02_mac_process_rate()
673 status->enc_flags |= RX_ENC_FLAG_SHORTPRE; in mt76x02_mac_process_rate()
679 status->rate_idx = idx; in mt76x02_mac_process_rate()
682 status->enc_flags |= RX_ENC_FLAG_HT_GF; in mt76x02_mac_process_rate()
685 status->encoding = RX_ENC_HT; in mt76x02_mac_process_rate()
686 status->rate_idx = idx; in mt76x02_mac_process_rate()
689 u8 n_rxstream = dev->mphy.chainmask & 0xf; in mt76x02_mac_process_rate()
691 status->encoding = RX_ENC_VHT; in mt76x02_mac_process_rate()
692 status->rate_idx = FIELD_GET(MT_RATE_INDEX_VHT_IDX, idx); in mt76x02_mac_process_rate()
693 status->nss = min_t(u8, n_rxstream, in mt76x02_mac_process_rate()
698 return -EINVAL; in mt76x02_mac_process_rate()
702 status->enc_flags |= RX_ENC_FLAG_LDPC; in mt76x02_mac_process_rate()
705 status->enc_flags |= RX_ENC_FLAG_SHORT_GI; in mt76x02_mac_process_rate()
708 status->enc_flags |= 1 << RX_ENC_FLAG_STBC_SHIFT; in mt76x02_mac_process_rate()
714 status->bw = RATE_INFO_BW_40; in mt76x02_mac_process_rate()
717 status->bw = RATE_INFO_BW_80; in mt76x02_mac_process_rate()
731 ether_addr_copy(dev->mphy.macaddr, addr); in mt76x02_mac_setaddr()
733 if (!is_valid_ether_addr(dev->mphy.macaddr)) { in mt76x02_mac_setaddr()
734 eth_random_addr(dev->mphy.macaddr); in mt76x02_mac_setaddr()
735 dev_info(dev->mt76.dev, in mt76x02_mac_setaddr()
737 dev->mphy.macaddr); in mt76x02_mac_setaddr()
740 mt76_wr(dev, MT_MAC_ADDR_DW0, get_unaligned_le32(dev->mphy.macaddr)); in mt76x02_mac_setaddr()
742 get_unaligned_le16(dev->mphy.macaddr + 4) | in mt76x02_mac_setaddr()
746 get_unaligned_le32(dev->mphy.macaddr)); in mt76x02_mac_setaddr()
748 get_unaligned_le16(dev->mphy.macaddr + 4) | in mt76x02_mac_setaddr()
762 struct mt76x02_rx_freq_cal *cal = &dev->cal.rx; in mt76x02_mac_get_rssi()
764 rssi += cal->rssi_offset[chain]; in mt76x02_mac_get_rssi()
765 rssi -= cal->lna_gain; in mt76x02_mac_get_rssi()
773 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb; in mt76x02_mac_process_rx()
777 u32 rxinfo = le32_to_cpu(rxwi->rxinfo); in mt76x02_mac_process_rx()
778 u32 ctl = le32_to_cpu(rxwi->ctl); in mt76x02_mac_process_rx()
779 u16 rate = le16_to_cpu(rxwi->rate); in mt76x02_mac_process_rx()
780 u16 tid_sn = le16_to_cpu(rxwi->tid_sn); in mt76x02_mac_process_rx()
781 bool unicast = rxwi->rxinfo & cpu_to_le32(MT_RXINFO_UNICAST); in mt76x02_mac_process_rx()
782 int pad_len = 0, nstreams = dev->mphy.chainmask & 0xf; in mt76x02_mac_process_rx()
788 if (!test_bit(MT76_STATE_RUNNING, &dev->mphy.state)) in mt76x02_mac_process_rx()
789 return -EINVAL; in mt76x02_mac_process_rx()
795 status->flag |= RX_FLAG_DECRYPTED; in mt76x02_mac_process_rx()
796 status->flag |= RX_FLAG_MMIC_STRIPPED; in mt76x02_mac_process_rx()
797 status->flag |= RX_FLAG_MIC_STRIPPED; in mt76x02_mac_process_rx()
798 status->flag |= RX_FLAG_IV_STRIPPED; in mt76x02_mac_process_rx()
802 sta = mt76x02_rx_get_sta(&dev->mt76, wcid); in mt76x02_mac_process_rx()
803 status->wcid = mt76x02_rx_get_sta_wcid(sta, unicast); in mt76x02_mac_process_rx()
809 u8 *data = skb->data + offset; in mt76x02_mac_process_rx()
811 status->iv[0] = data[7]; in mt76x02_mac_process_rx()
812 status->iv[1] = data[6]; in mt76x02_mac_process_rx()
813 status->iv[2] = data[5]; in mt76x02_mac_process_rx()
814 status->iv[3] = data[4]; in mt76x02_mac_process_rx()
815 status->iv[4] = data[1]; in mt76x02_mac_process_rx()
816 status->iv[5] = data[0]; in mt76x02_mac_process_rx()
823 status->flag &= ~RX_FLAG_IV_STRIPPED; in mt76x02_mac_process_rx()
826 len -= pn_len << 2; in mt76x02_mac_process_rx()
833 status->aggr = true; in mt76x02_mac_process_rx()
836 status->flag |= RX_FLAG_AMPDU_DETAILS; in mt76x02_mac_process_rx()
837 status->ampdu_ref = dev->ampdu_ref; in mt76x02_mac_process_rx()
840 * When receiving an A-MPDU subframe and RSSI info is not valid, in mt76x02_mac_process_rx()
841 * we can assume that more subframes belonging to the same A-MPDU in mt76x02_mac_process_rx()
845 if (!++dev->ampdu_ref) in mt76x02_mac_process_rx()
846 dev->ampdu_ref++; in mt76x02_mac_process_rx()
850 if (WARN_ON_ONCE(len > skb->len)) in mt76x02_mac_process_rx()
851 return -EINVAL; in mt76x02_mac_process_rx()
855 status->chains = BIT(0); in mt76x02_mac_process_rx()
856 signal = mt76x02_mac_get_rssi(dev, rxwi->rssi[0], 0); in mt76x02_mac_process_rx()
857 status->chain_signal[0] = signal; in mt76x02_mac_process_rx()
859 status->chains |= BIT(1); in mt76x02_mac_process_rx()
860 status->chain_signal[1] = mt76x02_mac_get_rssi(dev, in mt76x02_mac_process_rx()
861 rxwi->rssi[1], in mt76x02_mac_process_rx()
864 status->freq = dev->mphy.chandef.chan->center_freq; in mt76x02_mac_process_rx()
865 status->band = dev->mphy.chandef.chan->band; in mt76x02_mac_process_rx()
867 hdr = (struct ieee80211_hdr *)skb->data; in mt76x02_mac_process_rx()
868 status->qos_ctl = *ieee80211_get_qos_ctl(hdr); in mt76x02_mac_process_rx()
869 status->seqno = FIELD_GET(MT_RXWI_SN, tid_sn); in mt76x02_mac_process_rx()
880 if (!test_bit(MT76_STATE_RUNNING, &dev->mphy.state)) in mt76x02_mac_poll_tx_status()
885 while (!irq || !kfifo_is_full(&dev->txstatus_fifo)) { in mt76x02_mac_poll_tx_status()
886 if (!spin_trylock(&dev->txstatus_fifo_lock)) in mt76x02_mac_poll_tx_status()
890 spin_unlock(&dev->txstatus_fifo_lock); in mt76x02_mac_poll_tx_status()
900 kfifo_put(&dev->txstatus_fifo, stat); in mt76x02_mac_poll_tx_status()
910 if (!e->txwi) { in mt76x02_tx_complete_skb()
911 dev_kfree_skb_any(e->skb); in mt76x02_tx_complete_skb()
917 txwi_ptr = mt76_get_txwi_ptr(mdev, e->txwi); in mt76x02_tx_complete_skb()
919 trace_mac_txdone(mdev, txwi->wcid, txwi->pktid); in mt76x02_tx_complete_skb()
921 mt76_tx_complete_skb(mdev, e->wcid, e->skb); in mt76x02_tx_complete_skb()
1026 struct mt76x02_dev *dev = container_of(mphy->dev, struct mt76x02_dev, mt76); in mt76x02_update_channel()
1029 state = mphy->chan_state; in mt76x02_update_channel()
1030 state->cc_busy += mt76_rr(dev, MT_CH_BUSY); in mt76x02_update_channel()
1032 spin_lock_bh(&dev->mt76.cc_lock); in mt76x02_update_channel()
1033 state->cc_tx += dev->tx_airtime; in mt76x02_update_channel()
1034 dev->tx_airtime = 0; in mt76x02_update_channel()
1035 spin_unlock_bh(&dev->mt76.cc_lock); in mt76x02_update_channel()
1041 if (dev->mt76.beacon_mask) { in mt76x02_check_mac_err()
1043 dev->beacon_hang_check = 0; in mt76x02_check_mac_err()
1047 if (dev->beacon_hang_check < 10) in mt76x02_check_mac_err()
1056 dev_err(dev->mt76.dev, "MAC error detected\n"); in mt76x02_check_mac_err()
1059 if (!mt76x02_wait_for_txrx_idle(&dev->mt76)) { in mt76x02_check_mac_err()
1060 dev_err(dev->mt76.dev, "MAC stop failed\n"); in mt76x02_check_mac_err()
1064 dev->beacon_hang_check = 0; in mt76x02_check_mac_err()
1081 /* enable pa-lna */ in mt76x02_edcca_tx_enable()
1091 /* disable pa-lna */ in mt76x02_edcca_tx_enable()
1095 dev->ed_tx_blocked = !enable; in mt76x02_edcca_tx_enable()
1100 dev->ed_trigger = 0; in mt76x02_edcca_init()
1101 dev->ed_silent = 0; in mt76x02_edcca_init()
1103 if (dev->ed_monitor) { in mt76x02_edcca_init()
1104 struct ieee80211_channel *chan = dev->mphy.chandef.chan; in mt76x02_edcca_init()
1105 u8 ed_th = chan->band == NL80211_BAND_5GHZ ? 0x0e : 0x20; in mt76x02_edcca_init()
1126 dev->ed_monitor_learning = true; in mt76x02_edcca_init()
1130 dev->ed_time = ktime_get_boottime(); in mt76x02_edcca_init()
1148 active = ktime_to_us(ktime_sub(cur_time, dev->ed_time)); in mt76x02_edcca_check()
1149 dev->ed_time = cur_time; in mt76x02_edcca_check()
1155 dev->ed_trigger++; in mt76x02_edcca_check()
1156 dev->ed_silent = 0; in mt76x02_edcca_check()
1158 dev->ed_silent++; in mt76x02_edcca_check()
1159 dev->ed_trigger = 0; in mt76x02_edcca_check()
1162 if (dev->cal.agc_lowest_gain && in mt76x02_edcca_check()
1163 dev->cal.false_cca > MT_EDCCA_LEARN_CCA && in mt76x02_edcca_check()
1164 dev->ed_trigger > MT_EDCCA_LEARN_TH) { in mt76x02_edcca_check()
1165 dev->ed_monitor_learning = false; in mt76x02_edcca_check()
1166 dev->ed_trigger_timeout = jiffies + 20 * HZ; in mt76x02_edcca_check()
1167 } else if (!dev->ed_monitor_learning && in mt76x02_edcca_check()
1168 time_is_after_jiffies(dev->ed_trigger_timeout)) { in mt76x02_edcca_check()
1169 dev->ed_monitor_learning = true; in mt76x02_edcca_check()
1173 if (dev->ed_monitor_learning) in mt76x02_edcca_check()
1176 if (dev->ed_trigger > MT_EDCCA_BLOCK_TH && !dev->ed_tx_blocked) in mt76x02_edcca_check()
1178 else if (dev->ed_silent > MT_EDCCA_BLOCK_TH && dev->ed_tx_blocked) in mt76x02_edcca_check()
1188 mutex_lock(&dev->mt76.mutex); in mt76x02_mac_work()
1190 mt76_update_survey(&dev->mphy); in mt76x02_mac_work()
1194 dev->mt76.aggr_stats[idx++] += val & 0xffff; in mt76x02_mac_work()
1195 dev->mt76.aggr_stats[idx++] += val >> 16; in mt76x02_mac_work()
1200 if (dev->ed_monitor) in mt76x02_mac_work()
1203 mutex_unlock(&dev->mt76.mutex); in mt76x02_mac_work()
1205 mt76_tx_status_check(&dev->mt76, false); in mt76x02_mac_work()
1207 ieee80211_queue_delayed_work(mt76_hw(dev), &dev->mphy.mac_work, in mt76x02_mac_work()
1213 dev->mphy.survey_time = ktime_get_boottime(); in mt76x02_mac_cc_reset()
1224 /* channel cycle counters read-and-clear */ in mt76x02_mac_cc_reset()